LPC GPIO binding was wrong in that the reg address
on the simple soc bus was given as an index of the gpio ports
within a gpio controller. Fix this by putting the GPIO node
on the simple bus as a single node with the correct base address,
and make the ports children of this node.
Change the driver to get the port number from the reg address
instead of a custom property, and get base address from DT instead
of the SDK macro definition.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Use some new kernel features to make the experience of finding and
dealing with GPIO devices much more ergonomic by allowing the use of
devicetree node labels to identify GPIO devices by default.
Users who wish to avoid the associated footprint penalty can set
CONFIG_DEVICE_DT_METADATA=n by hand, but I think the convenience is
worth the price as a default. If we're running a shell, then we've
already paid a heavy footprint penalty.
Example output for qemu_cortex_m3:
uart:~$ gpio devices
Device Other names
gpio@40004000 gpio0
gpio@40005000 gpio1
gpio@40006000 gpio2
gpio@40007000 gpio3
gpio@40024000 gpio4
gpio@40025000 gpio5
gpio@40026000 gpio6
Signed-off-by: Martí Bolívar <mbolivar@amperecomputing.com>
Removed the unnecessary initialization of the `ret` variable in
`gpio_stm32_clock_request` where its value is guaranteed to be
overwritten by subsequent operations, then simply returned `ret`.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Introduced `GPIO_DEVICE_INIT_STM32_IF_OKAY` which utilizes `COND_CODE_1`
to reduce the chain of #if DT_NODE_HAS_STATUS(...) #endif
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
In function pcal64xxa_process_input, lock was not released in case of
error when calling inputs_read.
This was causing an infinite wait in the following calls of functions
using I2C bus.
Signed-off-by: Vincent Geneves <vgeneves@kalray.eu>
Introduce the stm32h7RS serie to the gpio driver,
based on the stm32h7
The SBS controller is used to configure the EXTI line among
the different GPIO port.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Introduce a custom STM32_GPIO_WKUP GPIO flag.
Use the newly introduced stm32_pwr_wkup_pin_cfg_gpio() public
function to configure GPIO pins, that have the STM32_GPIO_WKUP
flag in DT, as sources for STM32 PWR wake-up pins, on the condition
that there is a wake-up pin that corresponds to each of them.
These GPIO pins can then be used to power on the system after Poweroff
like a reset pin.
Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
Remove address-of operator ('&') when assigning `gpio_xxx_init`
function pointer in `DEVICE_DT_INST_DEFINE` macro.
This change aims to maintain consistency among the drivers in
`drivers/gpio`, ensuring that all function pointer assignments
follow the same pattern.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Namespaced the generated headers with `zephyr` to prevent
potential conflict with other headers.
Introduce a temporary Kconfig `LEGACY_GENERATED_INCLUDE_PATH`
that is enabled by default. This allows the developers to
continue the use of the old include paths for the time being
until it is deprecated and eventually removed. The Kconfig will
generate a build-time warning message, similar to the
`CONFIG_TIMER_RANDOM_GENERATOR`.
Updated the includes path of in-tree sources accordingly.
Most of the changes here are scripted, check the PR for more
info.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
- Add initial version of CYW920829M2EVK-02 board
- [drivers: clock_control] Make it possible to set up both iho and imo
clocks instead of just one or the other
Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
The GPIO API performs unprotected RMW operations that
can cause glitching and race conditions when GPIOs are used by
different threads or ISRs.
Signed-off-by: Jérémy LOCHE - MAKEEN Energy <jlh@makeenenergy.com>
For DA1469x if PM config is selected PM_DEVICE must also
be selected for GPIO to work when device enters/exists
deep sleep.
Previously GPIO and regulator drivers selected PM_DEVICE
when PM was enabled.
Now it is moved to SOC instead.
PM_DEVICE selection in GPIO could result in circular dependency
for mcux if MEMC_MCUX_FLEXSPI (which is already dependent on PM_DEVICE)
was to be additionally dependent on GPIO.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Add mfd_adp5585 and gpio_adp5585 driver. This driver enables ADP5585
as an GPIO expander.
This chip is used as an GPIO expander on i.MX93 EVK. GPIO pinctrl,
read/write and interrupt is supported.
Note that ADP5585 has 2 GPIO banks with 5 pins each. The driver combines
two group into a 16-bit port. Index 0~4 correspond to R0~R4 lines, index
8~12 correspond to C0~C4 lines. Index 5~7 is reserved unavailable.
Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
Usage:
gpio toggle [device] [pin]
Also added Kconfig option so this command can be removed if
resources need to be conserved.
Signed-off-by: Nick Ward <nix.ward@gmail.com>
Fix condition in pin number check so that PA15, PB15, etc. can be properly
accessed..
Co-authored-by: Денис <baden.i.ua@gmail.com>
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
This adds automatic GPIO latching before going to extended sleep and
restoring state after wakeup.
Mode and state for each pin is stored, then ports are latched to retain
state when PD_COM is disabled during sleep. On wakeup mode and state for
each pin is restored and ports are unlatched to make it work again.
Signed-off-by: Andrzej Kaczmarek <andrzej.kaczmarek@codecoup.pl>
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
add gpio_intel driver with acpi based resource enumeration support.
Also updated test cases overlay with new dts entires.
Signed-off-by: Najumon B.A <najumon.ba@intel.com>
Warn about potential device tree errors for cases when driver's
client tries to configure a pin as GPIO but which is not
in GPIO mode.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
Rename ad5592 files in dts, driver and include to ad559x and add support
for I2C bus which is required for AD5593.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Fix compiler errors and warnings that are issued when compiling this
driver for use without the optional interrupt facilities.
When interrupts are not enabled for any instance of this device,
there's currently a compiler error in gpio_xlnx_axi_pin_interrupt_configure
due to the function's header being located within the ifdef-block for
interrupt-driven operation.
Fully encapsulate the interrupt-related functions
gpio_xlnx_axi_pin_interrupt_configure, gpio_xlnx_axi_manage_callback
and gpio_xlnx_axi_get_pending_int with ifdefs checking for interrupt
mode inorder to remove compiler warnings caused by those functions
being always present so far, while not being used in the API function
pointer table when all instances of this GPIO controller are operating
in polling mode. This circumstance causes a "declared, but not used"
compiler warning for each of those functions.
Signed-off-by: Immo Birnbaum <mail@birnbaum.immo>
This commit conditionally masks out `gpio_dw_isr` to prevent a build
warning if none of the instances of this driver are connected to an IRQ.
Signed-off-by: Chen Xingyu <hi@xingrz.me>
Switch to using `DT_*IRQN` helpers for obtaining the IRQ number instead of
directly accessing the `irq` cell. This change ensures that the encoded
values for multi-level interrupts are correctly retrieved.
Signed-off-by: Chen Xingyu <hi@xingrz.me>
Configuration of GPIO as input now sets rising/falling
event orientation based on ACTIVE_HIGH/LOW setting.
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
Split up the driver for the low side switch BD8LB600FS into a GPIO
and MFD part.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Add support for devices that use the kinetis
GPIO/PORT scheme but with the slight modification
that the interrupt control bits are in the GPIO
peripheral instead of the PORT peripheral.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Support MCI_IO_MUX pinctrl in LPC GPIO driver
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Co-authored-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Convert the internal uint16_t data of the driver to an internal type
that automatically switches from uint8_t to uint16_t depending on
whether any 16 bit device is present in the system or not. This shrinks
the internal structures by few bytes when the extra data is not needed.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
AXP192 features an EXTEN pin that is on output only.
This commit appends control of EXTEN pin to gpio functionality
of AXP192.
Port-Mapping is as follows:
- [0..4]: GPIO0..4
- [5]: EXTEN
Signed-off-by: Martin Kiepfer <mrmarteng@teleschirm.org>
Process the GPIO_INT_WAKEUP flag and set appropraite bits
in the SoC to wakeup the system from deep sleep mode.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
The pin in the loop start counting from 0, so the condition of the
for loop should not be equal to num_pins.
Fixes#69118
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Interrupt handling in this chip is broken beyond repair, anyone unfortunate
enough to have to use it will probably come across this error and wonder
what's up.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Fix the build of the gpio driver BD8LB600FS on the
board intel_adl_crb.
Fixes#68219.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Use gpio_is_ready_dt in the driver for the TLE9104 before
actually using the GPIO.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
In some hardware designs it might happen that the reset signal
for the TLE9104 is not used only for this purpose, but instead for
instance to reset other devices at the same time. For such a hardware
design it is then necessary to make the reset GPIO optional. The reset
will have to be triggered earlier on.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
This implements the daisy chain feature of the low side switch
BD8LB600FS. The daisy chaining is in hardware achieved via
connecting the MISO and MOSI lines of multiple instances of the IC
in a row. It is implemented in the driver through a variable number
of GPIOs on one instance. Therefore, one device tree instance of the
IC will handle multiple daisy chained physical instances.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Fix a bug where after a standby, it was impossible to reenable a GPIO
clock.
A counter is incremented each time pm_device_runtime_get is called, and
decremented each time pm_device_runtime_put is called. The
clock is only enabled if this counter equals 1.
When configuring a GPIO (as input or output), the timer is incremented, and
when disconnecting it, it is both incremented and decremented. Thus the
next time we try to configuring it, the clock is not enabled (since the
counter will now be equal to 2).
This causes a problem when using low power standby mode: after wakeup all
clocks are disabled and the GPIO clock can not be reenabled.
This commit fixes this bug by not incrementing the counter when disconnect
is asked (or in other words incrementing it only when configuring either
an input or an output).
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
When set, this GPIO controller has pins associated with the
keyboard controller. In this case the reg_gpcr property is
overloaded and used to write the keyboard GCTRL register
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Remove gpio_clock_names and gpio_mcux_lpc_config->clock_ip_name from
drivers/gpio/gpio_mcux_lpc.c.
The drivers/gpio/gpio_mcux_lpc.c file did not compile with xt-clang
RI-2021.8-win32, as the gpio_clock_names was initialised with a
reference to a static const array. The clock_ip_name member was
initialised from this variable, but it isn't used anywhere else.
Signed-off-by: Vit Stanicek <vit.stanicek@nxp.com>
Add RGPIO gpio driver. This driver is used for i.MX93 and i.MX8ULP.
GPIO pinctrl, read/write and interrupt is supported. Runtime mmio
configuration is enabled, so no need for region definition in
mimx9/mmu_region.c
Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
Ignore communication faults of the TLE9104 which are reported
before the communication watchdog is configured.
Fixes#67370
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Driver is using the RISC-V PLIC interrupt controller without including
the necessary headers.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Employ a code spell checking tool to scan and correct spelling errors
in all files within the drivers/gpio directory.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Set suspended as initial power state, only when the
CONFIG_PM_DEVICE_RUNTIME config is enabled.
The initial state was incorrect, when CONFIG_PM_DEVICE=y and
CONFIG_PM_DEVICE_RUNTIME=n. In that case, the power state was SUSPENDED,
but the device was actually enabled.
Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
Updated API version enables multi-instance GPIOTE driver.
Additionally obsolete symbol that was used to specify
API version in the past was removed.
Affected drivers have been adjusted and appropriate changes
in affected files have been made.
Signed-off-by: Jakub Zymelka <jakub.zymelka@nordicsemi.no>
Check the return values from the I2C API functions called in init() and
fail driver initialization if unsuccessful.
Fixes: #66827
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Implement level based gpio interrupts, by using a worker queue to
repeatedly call the gpio callbacks until the gpio is no longer active.
Update unit test for new interrupts.
Bug #66401
Signed-off-by: Jeremy Bettis <jbettis@google.com>
Use #if instead of IS_ENABLED for
CONFIG_SOC_IT8XXX2_GPIO_GROUP_K_L_DEFAULT_PULL_DOWN, otherwise DTS files
are required to provide gpiok and gpiol even if they are not used.
Bug #66401
Signed-off-by: Jeremy Bettis <jbettis@google.com>
Similar to other ITE drivers, wrap register accesses in ECREG. This will
allow mocking out the registers in tests.
Bug #66401
Signed-off-by: Jeremy Bettis <jbettis@google.com>
Generic Connector for the apollo4p_evb
Ran tests/drivers/gpio/gpio_basic_api
Ambiq does not support DUAL Edged Interrupts.
Added Connector Usages as defined by the Ambiq BSP.
Signed-off-by: Richard Wheatley <richard.wheatley@ambiq.com>
The gpio_pca953x gpio driver doesn't have
the input latch and interrupt mask
configuration which causes a lack of accessing
and using those features on an gpio expander
device. Fix it by adding input latch and
interrupt mask configurations in this driver.
Signed-off-by: Vudang Thaihai <vudang.thaihai@brillpower.com>
Added a spinlock to accesses of registers and struct gpio_ite_data,
except for gpio_ite_isr() function.
Bug #66401
Signed-off-by: Jeremy Bettis <jbettis@google.com>
For the Ambiq Apollo4x soc, every 32 pins share the same IRQ
number. irq_disable() should not be called for the pin interrupt
disablement, otherwise the interrupt of pins in the same GPIO
group will be disabled as well.
Signed-off-by: Aaron Ye <aye@ambiq.com>
Use the "ambiq,gpio" binding to combine the "ambiq,gpio-bank"
child nodes for Apollo4 Plus soc.
Also update the GPIO driver accordingly.
Signed-off-by: Aaron Ye <aye@ambiq.com>
The wake-up control input is IT8XXX2_IRQ_WU66.
Testing the wake-up functionality on GPF6 is normal.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Renesas Gen4 SoCs GPIO IPs are using one more
register comparing to Gen3 SoCs.
The new "INEN" register is used to enable general input.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Use gpio toggle api instead of manually toggling.
Remove redundant text.
Print error and break from blinking if it occurs.
Only print 'how to exit' text if first toggle is successful.
Saves roughly 40 bytes.
Signed-off-by: Nick Ward <nix.ward@gmail.com>
Usage:
gpio info [device]
The new command prints gpio controller information
for a specific device if specified or if no device is specified
it prints out all controller information ordered by line name.
Also added Kconfig option so this command can be removed if
resources need to be conserved.
Signed-off-by: Nick Ward <nix.ward@gmail.com>
This commit implements this enhancement:
https://github.com/zephyrproject-rtos/zephyr/issues/63018
The forms of the gpio commands are now:
gpio conf device pin ol0
gpio set device pin 1
gpio get device pin
gpio blink device pin
Device name and pin subcommands now are
suggested/completed when tab is used.
Pin names are suggested with numbers and line names if
available from the gpio controller’s Devicetree node.
GPIO pin command is now limited to pins that are not assigned
as reserved.
Signed-off-by: Nick Ward <nix.ward@gmail.com>
Add Renesas rzt2m gpio driver with basic functionality.
It supports pin mode configuration and writing/reading to/from gpio ports.
Includes dts changes to build blinky sample.
Signed-off-by: Jakub Michalski <jmichalski@internships.antmicro.com>
Add pinctrl to the Davinci GPIO driver to allow muxing pins dirctly
in this driver.
Also aligned the macro backslashes as line continuation character at
the end of each line with each at the same position and removed the
GPIO_DAVINCI_DEVICE_INIT macro which seems to be not used.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
If the gpio had pull previous enabled, but new config
request wants the pull disabled, the code was failing
to clear the previous pull setting.
Signed-off-by: Mike J. Chen <mjchen@google.com>
Move the syscall_handler.h header, used internally only to a dedicated
internal folder that should not be used outside of Zephyr.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Add initial support for Renesas RA GPIO.
To avoid complicating the initial code for supporting the SoC,
I have implemented only the bare minimum for now.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
The multi-level encoding of the interrupt number currently
happens in the `gen_defines.py`, which is called in the
`dts.cmake` module after `kconfig.cmake`. However, the number
of bits used by each level is defined in Kconfig and this means
that `gen_defines.py` will not be able to get that information
during build.
To fix this, do the multi-level encoding in C devicetree macro
magic instead of the python script. This ticks one of a
long-standing TODO item from the `gen_defines.py`.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Relocate multi-level interrupts APIs out of `irq.h` into
a new file named `irq_multilevel.h` to provide cleaner
separation between typical irq & multilevel ones.
Added preprocessor versions of `irq_to_level_x` as `IRQ_TO_Lx`.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
To avoid glitches when configuring GPIO output, make logic closer to
that of V2 after 79ee5a876f.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
The BCM2711 SoC exposes 58 GPIOs. The first 28 (bank 0) are accessible
to users via the 40-pin header, while the others (bank 1) are used for
controlling on-board peripherals.
This also update doc of `rpi_4b` board.
Signed-off-by: Chen Xingyu <hi@xingrz.me>
Extend the NXP S32 GPIO driver to be able to route external interrupts
to either SIUL2 EIRQ interrupt controller or, when available on the
SoC, WKPU interrupt controller.
Since WKPU can support up to 64 external interrupt sources and SIUL2
EIRQ up to 32, gpio_get_pending_int() is removed and the interrupt
controller specific API must be used instead.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
The number of IRQ first level bits is not necessarily 8 bits
now, so use `CONFIG_1ST_LEVEL_INTERRUPT_BITS` instead of
hardcoded value.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
NOCACHE_MEMORY depends on ARCH_HAS_NOCACHE_MEMORY_SUPPORT, so
don't try to select the symbol if not supported.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Change introduces a new configuration option that can be used to disable
GPIO interrupt support to reduce memory footprint.
Signed-off-by: Marek Pieta <Marek.Pieta@nordicsemi.no>
This commit resolves an internal dependecy between GET_DIRECTION and
GET_CONFIG configuration. GET_CONFIG api is internally needed by
GET_DIRECTION api.
Signed-off-by: Martin Kiepfer <m.kiepfer@teleschirm.org>
The Nuvoton NCT38xx is a multi-function device providing a TCPC
controller and a I/O expander (GPIO driver). Add a multi-function
driver to manage exclusive access to the device.
Tested with "twister -T tests/drivers/build_all/gpio".
Signed-off-by: Keith Short <keithshort@google.com>
Only provide implementations for optional operations if needed. This
patch deletes quite a few dummy `pin_interrupt_configure` ops (now
optional), and adjusts ifdeffery on some drivers so that optional ops
are only provided if they implement real functionality.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
This change allows to have GPIO interrupts configured
that will work while chip enters low power modes where
PD_COM is turned off.
PDC controller can wake up system on GPIO changes even when
PD_COM is off.
This is done by adding PDC entries that will wakeup Cortex-M33
at the same time when WAKEUP controller is programmed to
handle GPIO state changes.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Hardware supports only one edge for GPIO interrupt.
This adds software implementation that hides hardware restriction.
With this change user code can use GPIO_INT_TRIG_BOTH and does not
have to do it in application code.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Init level for GPIO drivers is set PRE_KERNEL_1.
Smartbond(tm) driver had it set to POST_KERNEL by accident.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Davinci gpio controller support to add various soc gpio
support (J721E, AM654).
TRM for J721e https://www.ti.com/lit/zip/spruil1
File: spruil1c.pdf
GPIO: section 12.1.2
BeagleBone AI_64 https://beagleboard.org/ai-64
Signed-off-by: Prashanth S <slpp95prashanth@yahoo.com>
Current setup tries to initialize the bank driver before the parent one,
which is the inverse of what the devicetree hierarchy implies and
causes a bunch of:
ERROR: /soc/gpio@e000a000/psgpio_bank@3 PRE_KERNEL_1 40 32 <
/soc/gpio@e000a000 PRE_KERNEL_2 40 10
Change the bank driver to initialize at PRE_KERNEL_1 as the parent
drivers so that ordinals take care of priority between these two.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This gpio data register and keyboard scan out register are shared
register. To prevent race condition caused by access from different
thread, add critical section.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Increase the default init priority of nct38xx so that they work well
with the default I2C init priority (50).
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The CMSIS module glue code was part of arch/ directory. Move it to
modules/cmsis, and provide a single entry point for it: cmsis_core.h.
This entry header will include the right CMSIS header (M or A/R).
To make this change possible, CMSIS module Kconfig/CMake are declared as
external, allowing us to add a new Zephyr include directory.
All files including CMSIS have been updated.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
AXP192 is a small power management IC, that also
features 5 GPIOS.
Besides GPIO driver this commit also includes needed modifications
in axp192 regulator and mfd driver as LDOIO0 functioanlity
is multiplexed with GPIO0 pin.
Signed-off-by: Martin Kiepfer <mrmarteng@teleschirm.org>
Implement `gpio_pin_get_config` for the stellaris platform, and by
extension `qemu_cortex_m3`.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Refactor the ESP32 target SOCs together with
all related boards. Most braking changes includes:
- changing the CONFIG_SOC_ESP32* to refer to
the actual soc line (esp32,esp32s2,esp32s3,esp32c3)
- replacing CONFIG_SOC with the CONFIG_SOC_SERIES
- creating CONFIG_SOC_FAMILY_ESP32 to embrace all
the ESP32 across all used architectures
- introducing CONFIG_SOC_PART_NUMBER_* to
provide a SOC model config
- introducing the 'common' folder to hide all
commonly used configs and files.
- updating west.yml to reflect previous changes in hal
Signed-off-by: Marek Matej <marek.matej@espressif.com>
Implement `gpio_pin_get_config` for the stellaris platform, and by
extension `qemu_cortex_m3`.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Interrupt callbacks may want to configure GPIO pins on the port expander,
e.g. to change the polarity of a level interrupt. This would cause a
deadlock because the callback handler would still be holding the lock.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
memcpy of a sub-structure in a structure was using the structure size
of the parent structure instead of the sub-structure.
fixes: #59548
Signed-off-by: David Leach <david.leach@nxp.com>
gpio_nrfx_port_get_direction() is meant to check which inputs
are enabled, and does so by checking one bit at a time
and setting that bit into the "input" parameter.
But "input" was never zeroed, so any garbage ones it
may have remains.
Zero it.
This fixes a problem where if the "input" parameter was not
zeroed by the caller, the result of the funcion call
is undefined.
Detected by valgrind on:
tests/drivers/gpio/gpio_get_direction
Conditional jump or move depends on uninitialised value(s)
by gpio_get_direction_test_disconnect (main.c:64)
Conditional jump or move depends on uninitialised value(s)
by gpio_get_direction_test_output (main.c:102)
When running this test for the nrf52_bsim.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Split the SDL GPIO emulator driver in a top and bottom
to enable using it with embedded libCs.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
The blink command should blink until the user presses a key, however on
some systems a pending keypress is present when entering the loop
causing it to immediate exit before getting a chance to blink.
Add a dummy read to clear the buffer before starting the blink loop.
Signed-off-by: Eric Holmberg <eric.holmberg@northriversystems.co.nz>
To ease building for workstation tests, instead of using
the ARM CMSIS instructions instrinsics directly,
use the NRFX macro that uses the compiler builtins when
necessary.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Instead of getting the hardcoded address from the DT structure
use its symbolic name (Also from DT) which will be resolved
by the nRF HAL definitions.
This allows the GPIO peripherals' addresses to be redefined
for the simulated targets.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Guard NXP PINT related code with #ifdef CONFIG_NXP_PINT.
This prevents build errors on platforms that do not have a PINT but have
LPC GPIO.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
