Use the RTIO work queue to fake the i2c submit calls for drivers which
haven't yet implemented the API. Applications can change the size of
the work queue pool depending on how much traffic they have on the buses.
Signed-off-by: Yuval Peress <peress@google.com>
When a target was registered with the controller but a controller-mode
request was performed, the driver failed to mask the interrupts that
were occurring as a result of the controller-mode transfer, causing an
interrupt flood. Ensure that all interrupts not handled by target mode
are handled as potential controller-mode events and acknowledged
properly.
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
It appears that a controller re-initialization is sometimes needed for
proper operation when handling target mode requests after a request from
the core is completed in controller mode. Add this re-initialization as
was already done between controller mode requests.
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Use PRIxPTR macros to fix compiler warnings of the form:
i2c_xilinx_axi.c:266:50: warning: format specifies type 'unsigned long'
but the argument has type 'mem_addr_t' (aka 'unsigned int') [-Wformat]
LOG_INF("Configuring %s at 0x%08lx", dev->name, config->base);
~~~~~ ^~~~~~~~~~~~
%08x
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
Add a driver to support the Xilinx AXI IIC Bus Interface logic core, as
described in Xilinx document PG090. This can be configured for use on
most Xilinx FPGA-based platforms such as the Digilent Arty.
Both the 2.00a and 2.1 versions of the core are supported. The 2.00a
revision has a bug causing dynamic read mode to not be reliable. With
this version of the core the driver falls back to reading only 1 byte
per interrupt.
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
