Commit graph

166 commits

Author SHA1 Message Date
Pieter De Gendt
29c9b91340 drivers: serial: Place API into iterable section
Add wrapper DEVICE_API macro to all uart_driver_api instances.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2024-12-02 22:08:56 +00:00
Yong Cong Sin
b9df2bed64 drivers: uart: ns16550: add support for Synopsys DesignWare 8250
Extended functionality of the current driver to support
Synopsys DesignWare 8250 UART.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2024-10-17 10:48:02 -04:00
Yong Cong Sin
b0a872c908 drivers: uart: ns16550: refactor read into a function
Refactor the char read into a function, check for availability
before reading.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2024-10-17 10:48:02 -04:00
Yong Cong Sin
1d571fff4c drivers: serial: ns16550: rename config to uart_ns16550_dev_config
Rename `uart_ns16550_device_config` to `uart_ns16550_dev_config` so
that it looks consistent with the device data structure.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2024-10-17 10:48:02 -04:00
Pisit Sawangvonganan
c20126f950 drivers: serial: ns16550: apply __maybe_unused to ns16550_out,inword
Instead of disabling code with a specific compilation switch, enable it
and apply `__maybe_unused` in the `ns16550_outword` and `ns16550_inword`
functions to make the codebase cleaner.

Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
2024-08-14 09:40:00 +02:00
Pisit Sawangvonganan
e868b6b49d drivers: serial: ns16550: fix typo
Correct the following typo in Kconfig and
the corresponding function.
- Kconfig.it8xxx2 from `BUADRATE` to `BAUDRATE`
- Correspoding function from `burdrate` to `baudrate`

Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
2024-08-14 09:40:00 +02:00
Pisit Sawangvonganan
a2e0b1d366 drivers: serial: remove '&' when assigning init_fn
Remove address-of operator ('&') when assigning `init_fn`
function pointer in `DEVICE_DT_INST_DEFINE` macro.

This change aims to maintain consistency among the drivers in
`drivers/serial`, ensuring that all function pointer assignments
follow the same pattern.

Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
2024-07-27 20:48:34 +03:00
Hess Nathan
958a4505bd coding guidelines: comply with MISRA Rule 12.1.
-added parentheses verifying lack of ambiguities

Signed-off-by: Hess Nathan <nhess@baumer.com>
2024-05-13 16:05:53 -04:00
Tom Burdick
4180d70439 dma: Fix error_callback enable/disable confusion
Previously the logic was inverted for error_callback_en where 0 was
enablement and 1 was disable. This was likely done so that the default,
sensibly so, was to enable the error callback if possible. A variety of
in tree users had confused the enable/disable value.

Change the name of the flag to error_callback_dis where the default
remains 0 (do not disable the callback!) and correct in tree uses of the
flag where it seemed incorrect.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2024-04-11 17:08:10 -04:00
Anisetti Avinash Krishna
14c68c9438 drivers: serial: ns16550: Add IOPORT_ENABLED check condition
io_map check to enable LPSS DMA initialization is kept under
condition IOPORT_ENABLED.

Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
2024-01-09 15:52:10 -06:00
Anisetti Avinash Krishna
e76ace4647 drivers: serial: ns16550: Condition added for dma_callback
Enable a condition as define dma_callback function only if
any one instance of ns16550 has dmas parameter in dts.
This resolves conflict of dma_callback function defined but
not used warning in case of UART_ASYNC_API enabled but dmas
parameter is not provided to any ns16550 UARTs dts instances.

Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
2023-11-24 08:30:04 +01:00
Anisetti Avinash Krishna
69d62add98 drivers: serial: ns16550: Fixed few bugs causing CI failure
Removed if (IS_ENABLED()) and used #if as they are causing CI failures
and removed LPSS related functions which are not under LPSS config.

Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
2023-11-23 17:21:20 +01:00
Anisetti Avinash Krishna
f66930fd3e drivers: uart: uart_ns16550: Enable Async operations using DMA
Enabled Async API feature for ns16550 driver using DMA support.

Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
2023-11-22 17:31:08 +01:00
Najumon B.A
608cc4d1f2 drivers: ns16550: remove parent init level dependency
remove parent init level dependency such as PRE_KERNEL or
POST_KERNEL. Uart driver init level change always to PRE_KERNEL

Signed-off-by: Najumon B.A <najumon.ba@intel.com>
2023-11-22 14:56:18 +00:00
Grant Ramsay
4fe2605160 drivers: serial: Fix pinctrl usage in NS16550 driver
pinctrl-0 property should not be directly referenced in this driver

Signed-off-by: Grant Ramsay <gramsay@enphaseenergy.com>
2023-11-13 16:55:47 -06:00
Tim Lin
0bb77191c0 drivers/serial: ns16550: Add high speed baud rate support for IT8XXX2
Add the support of high speed baud rate 230.4k and 460.8k
for IT8XXX2 of ITE.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2023-10-20 14:56:06 +02:00
Daniel Leung
3374e81438 uart: ns16550: separate IO/MMIO and PCIe init macros
This separates the DT device init macros into two: one for
UART accessed via IO port or MMIO, the other for PCIe UART.
All the conditions needed to setup the device structs are
getting complicated. Hopefully separating them would make
them easier to decode, and to avoid the conditions having
too many levels.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-09-26 12:03:04 +02:00
Daniel Leung
9f9b4a8afa uart: ns16550: use io-mapped DT property for IO port access
The old CONFIG_UART_NS16550_ACCESS_IOPORT has been used to
indicate whether to access the NS16550 UART via IO port
before device tree is used to describe hardware. Now we have
device tree, and we can specify whether a particular UART
needs to be accessed via IO port using property io-mapped.
Therefore, CONFIG_UART_NS16550_ACCESS_IOPORT is no longer
needed (and thus also CONFIG_UART_NS16550_SIMULT_ACCESS).
Remove these two kconfigs and modify code to use device tree
to figure out how to access the UART hardware.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-09-26 12:03:04 +02:00
Daniel Leung
3296956331 uart: ns16550: move setting .reset_spec inside initializer
This moves setting .reset_spec inside struct initializer
instead of using macro trampoline.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-09-26 12:03:04 +02:00
Daniel Leung
53bc95e218 uart: ns16550: refactor UART_NS16550_IRQ_CONFIG_*
Instead of PCIE0 and PCIE1, use no suffix for IO port/MMIO IRQ
configuration funct, and suffix PCIE for IRQ config on PCIE
bus.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-09-26 12:03:04 +02:00
Daniel Leung
566d21804c uart: ns16550: simplify DEV_DATA_FLOW_CTRL
Use COND_CODE_1() instead of macro trampoline and move it
into struct initializer.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-09-26 12:03:04 +02:00
Daniel Leung
8b54cb859e uart: ns16550: simplify BOOT_LEVEL
Use CODE_CODE_1() instead of macro trampolines when
CONFIG_UART_NS16550_PARENT_INIT_LEVEL is enabled.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-09-26 12:03:04 +02:00
Daniel Leung
7d0e223112 uart: ns16550: simplify DEV_CONFIG_PCIE_INIT/DEV_PCIE_DECLARE
Use COND_CODE_1() instead of macro trampolines.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-09-26 12:03:04 +02:00
Daniel Leung
39f8b7d51d uart: ns16550: simplify UART_NS16550_IRQ_FLAGS
Using COND_CODE_1() is more intuitive when looking at the code,
instead of some macro trampoline magic.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-09-26 12:03:04 +02:00
Daniel Leung
fe10897f70 uart: ns16550: simplify DLF and PCP related macros
This simplifies DLF and PCP enabling devicetree macros with
DT_ANY_INST_HAS_PROP_STATUS_OKAY() instead of the complicated
ones.

Also, this moves the macro to initialize struct elements into
the struct initializer itself. This makes it clearer on which
element is being initialized directly inside the struct
initializer instead of having to do mental macro trampoline
to find the correct macro.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-09-26 12:03:04 +02:00
Daniel Leung
2899df629f uart: ns16550: remove unused forward declaration
Remove the unused forward declaration of the driver API struct.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-09-26 12:03:04 +02:00
Girisha Dengi
f0ac2347da drivers: serial: Add optional reset line for uart_ns16550
If the optional hardware reset line is available, this change
will use that reset line to assert the uart module and bring
it out of reset state to use.

Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
2023-07-25 16:58:01 +00:00
Daniel Leung
20021abf0a serial: ns16550: check return of clock_control_get_rate()
This adds a check of the return of clock_control_get_rate(),
and returns error in uart_configure() if unsuccessful in
getting clock rate.

Fixes #60478

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-07-24 09:07:11 +00:00
L Lakshmanan
24759511f4 drivers: uart: Add support for UART_NS16550 TI K3 variant
TI K3 family of SoCs requires an extended set of registers to operate.
Extended functionality of the current driver to support the variant.

Signed-off-by: L Lakshmanan <l-lakshmanan@ti.com>
2023-07-14 09:37:44 +02:00
Najumon B.A
b4ed6c4300 drivers: serial: driver init level based on parent node
Boot level based on parent node (PCI or no PCI device). Some platforms the
PCI bus driver depends on ACPI sub system to retrieve platform information
such as interrupt routing information. But ACPI sub system currently
support only post kernel and hence such platforms the UART driver instance
init should be invoked only post kernel in case parent node is PCI.

Signed-off-by: Najumon B.A <najumon.ba@intel.com>
2023-07-08 09:00:03 +03:00
Daniel Leung
d88840a8aa Revert "drivers: serial: ns16550: Add support for Async APIs"
This reverts commit 2d03aaf99f.

The async API for NS16550 is incomplete. We are near the next
release so it is better to revert it for now, and a proper
correct implementation can be done before next-next release.

Relates to #57103

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-06-13 06:59:33 -04:00
Anisetti Avinash Krishna
79f2b5471c drivers: serial: ns16550: Fixed a bug related to shell failure
Updated boot priority to PRE_KERNEL_1 for all instances
and removed dependency on PCIe. As shell is not working
in a situation where console is using a UART instance
under PCIe and boot priority set to POST_KERNEL.

Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
2023-04-13 20:50:41 -04:00
Anisetti Avinash Krishna
2d03aaf99f drivers: serial: ns16550: Add support for Async APIs
Added support for async APIs for ns16550. This will be
enabled by kconfig CONFIG_UART_ASYNC_API.

Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
2023-04-06 07:50:42 +00:00
Anisetti Avinash Krishna
26133e995d drivers: serial: ns16550: Enable simultaneous support of IO, MMIO and PCIe
Enabled simultaneous support by adding a DTS variable named “io-mapped”.
There are 3 possibilities through instance in dtsi file.
Under PCIe, PCIe ns16550.
Under soc and has a variable io-mapped, legacy(IO mapped).
Under soc and don’t have a variable io-mapped, MMIO mapped.
Simultaneous access can be enabled by a Kconfig.
For PCIe instances UART initialization should be done post-kernel as it
depends on PCIe initialization.

Co-authored-by: Najumon BA <najumon.ba@intel.com>
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
2023-03-30 09:43:29 -04:00
Anisetti Avinash Krishna
00991e4720 drivers: serial: ns16550: Moved PCIe probe to init function
Moved PCIe probe from configure function to init function
because whenever uart_configure api is called MMIO address
is getting updated.

Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
2023-03-21 18:10:12 +00:00
Anisetti Avinash Krishna
712dab4f04 drivers: serial: ns16550: Fixed set_baud_rate usage in line ctrl set
Added pclk parameter to set_baud_rate function in line_ctrl_set api
which was missed during update of set_baud_rate function definition
update.

Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
2023-03-21 18:10:12 +00:00
Grant Ramsay
9df37fff79 drivers: serial: Add pinctrl support to the NS16550 driver
This enables configuring pins for the UART

Signed-off-by: Grant Ramsay <gramsay@enphaseenergy.com>
2023-03-02 13:50:06 +01:00
Johan Hedberg
fcfff0633e drivers: uart_ns16550: Convert to use runtime PCIe BDF lookup
Convert the ns16550 driver to use the new centralized runtime BDF lookup
of PCIe devices.

Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2022-11-16 11:18:43 +01:00
Daniel Leung
bbb2f8277a uart: ns16550: move command macro to public header
This moves the CMD_SET_DLF command macro to public header
so application can use it without weird include path to
include the "private" header file under drivers/serial.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2022-11-10 22:40:21 -05:00
Henrik Brix Andersen
3c99a1e015 drivers: pcie: reintroduce support for I/O BARs
Reintroduce support for accessing I/O BARs which was removed in
43d84147d9.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2022-11-01 15:22:31 -04:00
Gerard Marull-Paretas
178bdc4afc include: add missing zephyr/irq.h include
Change automated searching for files using "IRQ_CONNECT()" API not
including <zephyr/irq.h>.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-17 22:57:39 +09:00
Henrik Brix Andersen
9456eca5c0 drivers: serial: check if clock device is ready before accessing
Add check for device_is_ready() before accessing clock control devices.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-08-09 17:16:16 +02:00
Teik Heng Chong
f551c29576 drivers: serial: Uart ns16550 get clock frequency from clock manager
This patch is to enhance the uart ns16550 driver to get clock frequency
from clock manager or devicetree if clock_frequency is defined.

Signed-off-by: Teik Heng Chong <teik.heng.chong@intel.com>
2022-07-05 15:38:54 +00:00
Gerard Marull-Paretas
985bdcd076 drivers: serial: ns16550: simplify reg-shift code
The driver supported getting register shift from Devicetree, from a
custom definition in SoC headers (fragile) or, it took a default value.
This change simplifies things by making reg-shift property required in
all instances.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-06-15 16:59:02 -05:00
Gerard Marull-Paretas
4cafd8df7e drivers: serial: ns16550: remove redundant soc.h include
<soc.h> has been traditionally been used as a proxy to HAL headers,
register definitions, etc. Nowadays, <soc.h> is anarchy. It serves a
different purpose depending on the SoC. In some cases it includes HALs,
in some others it works as a header sink/proxy (for no good reason), as
a register definition when there's no HAL... To make things worse, it is
being included in code that is, in theory, non-SoC specific.

This patch is part of a series intended to improve the situation by
removing <soc.h> usage when not needed, and by eventually removing it.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-06-05 14:48:40 +02:00
Gerard Marull-Paretas
92f488497f drivers: serial: ns16550: use MMIO device depending on Kconfig option
Add a new selectable Kconfig option to decide wether the device driver
is a MMIO device or not. Previous to this patch, the decision was maded
based on the existence of a definition in <soc.h>. The design was
fragile, as code compiled anyway if the definition was not present.

All platforms/boards that had the definition in <soc.h> select the
Kconfig option in their respective defconfig files.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-06-05 14:48:40 +02:00
Dino Li
5a1c084447 driver/serial: ns16550: set NS16550 as default variant
This add UART_NS16550_VARIANT_16550 configuration inside the choice
of UART_NS16550_VARIANT_NS16750 and UART_NS16550_VARIANT_NS16950.
The configuration is enabled by default to make NS16550 device to get
correct FIFO size configuration (16 bytes).

fixes #45783

Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
2022-05-27 11:55:31 -07:00
Esteban Valverde
797b6784bb drivers: serial: modify ns16550 to use extended FIFO
Cyclone V SoC FPGA supports 128Byte FIFO for UART communication,
this modification adds a feature to use 128byte FIFO serial UART

Signed-off-by: Esteban Valverde <esteban.valverde.vega@intel.com>
2022-05-10 13:29:47 -04:00
Gerard Marull-Paretas
fb60aab245 drivers: migrate includes to <zephyr/...>
In order to bring consistency in-tree, migrate all drivers to the new
prefix <zephyr/...>. Note that the conversion has been scripted, refer
to #45388 for more details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-06 19:58:21 +02:00
Carlo Caione
69b28bfd07 pm: policy: Consider substates for state lock functions
Extend the current pm_policy_state_lock_*() functions to support
substates.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2022-04-28 16:32:23 +02:00