- Add Flash HP support for ra6-cm4, ra6-cm33, ra4-cm33 (except
r7fa4w1ad2cng)
- Add config to set the minimal size of data which can be written
for RA4E2, RA4M2, RA4M3, RA6E1, RA6E2, RA6M1, RA6M2, RA6M3, RA6M4,
RA6M5
Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
Signed-off-by: Phi Tran <phi.tran.jg@bp.renesas.com>
- Bring macro defined of RA8 in flash_hp_ra.h to device tree
- Change to use irq_lock instead of semaphore for code flash
- Modify and add conditions to check and make decision to perform
action at last block.
Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
Signed-off-by: Tran Van Quy <quy.tran.pz@renesas.com>
Add dts node to support for gpio interrupt on Renesas RA SoC
- Add external interrupt node
- Add gpio interrupt pins
Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
Move ioport6, ioport7, ioport8 to r7fa6m4ax due to it is common
part of RA6M4
Impacted file:
- dts/arm/renesas/ra/ra6/r7fa6m4ax.dtsi
- dts/arm/renesas/ra/ra6/r7fa6m4af3cfb.dtsi
Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
- Add "channel-available-mask" property in ADC node
to detect which channels are available to use
- Add "add-average-count" property in ADC node to chose
number of count of the addition or average mode
- Change the source code of ADC to match with 2 new properties.
Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
This is the initial commit to support UART driver for Renesas RZ/G3S.
The driver only implements polling API for minimal support.
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
Signed-off-by: Binh Nguyen <binh.nguyen.xw@renesas.com>
This is the initial commit to support pinctrl driver for Renesas RZ/G3S
Signed-off-by: Quang Le <quang.le.eb@bp.renesas.com>
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
This adds minimal support for a new SoC Renesas RZ/G3S
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
Signed-off-by: Binh Nguyen <binh.nguyen.xw@renesas.com>
This commit is to enable Ethernet drivers support on Renesas RA
MCU, first target support is the Renesas RA8 series
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
The new update of clock device tree make the pll p q r clock
source cannot be choose by other node
This fix add 1 new dts binding for pll out p q r out line
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
- Modify the macro in source code AGT to get the right data from
device tree
- Modify name of agt node
Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
Additional IO ports (6,7 and 8) are availble on the r7fa6m4af3cfb
variant of the RA6M4 Microcontroller.
Signed-off-by: Ian Morris <ian.d.morris@outlook.com>
- boards: renesas: Add support for agt.
- drivers: counter: Add support for counter driver use agt
- dts: arm: Add support for agt.
- dts: bindings: Add support for agt counter driver.
- soc: renesas: Add support for agt counter driver.
- samples: drivers: counter: alarm: Add support for RA8
This is initial support with only basic functionality for counter
operation on Zephyr using AGT hardware, current support for
count source is limited to LOCO and PCLKB, other count source
like underflow signal external pin or AGTIO from another AGT
channel will be added in later support
Signed-off-by: Ha Nguyen <ha.nguyen.fz@bp.renesas.com>
Signed-off-by: Thao Luong <thao.luong.uw@renesas.com>
Signed-off-by: Duy Phuong Hoang. Nguyen <duy.nguyen.xa@renesas.com>
Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
Move the process of replacing numerical values with macros to
the header, and set the division ratio in a numeric without
using macros in the device tree.
Change `clk-div` defined in `renesas,ra-cgc-pclk.yaml` to `div`.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
DeviceTree typically references the clock source using the `clocks`
property defined in `base.yaml`, so we'll change it to this.
Also delete the custom clock source definitions in
`renesas,ra-cgc-pclk-block.yaml`, `renesas,ra-cgc-pclk.yaml`, and
`renesas,ra-cgc-pll.yaml`.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Changes the path name of a DTS node so that it can be used
as the stem of a BSP macro.
All nodes to be changed are referenced via labels,
so only the name is changed.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
This fixes the following warning:
> unit address and first address in 'reg' (0x80280000) don't match for
> /soc/sckcr@81280004
Signed-off-by: Reto Schneider <reto.schneider@husqvarnagroup.com>
Change the interrupt number of flash in device tree due to duplication
And disable CONFIG_FLASH as default
Signed-off-by: Quy Tran <quy.tran.pz@renesas.com>
`-` is preferred over `_` in devicetree property names.
Since, change `clk_src`, `clk_div`, and `clk_out_div` to
`clk-src`, `clk-div`, and `clk-out-div`.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
