The Atmel SAM0 SoC enable peripherals clocks in distinct places: PM and
MCLK. The old devices had defined the peripheral clock enable bit at PM.
On the newer devices this was extracted on a dedicated memory section
called Master Clock (MCLK). This change excludes the dedicated bindings
in favor of a generic approach that cover all cases.
Now the clocks properties is complemented by the atmel,assigned-clocks
property. It gives the liberty to user to customize the clock source
from a generic clock or configure the direct connections.
All peripherals drivers were reworked with the newer solution.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Since all CAN controllers drivers seem to support automatic recovery (for
any future drivers for hardware without this hardware capability this can
easily be implemented in the driver), change the Zephyr CAN controller API
policy to:
- Always enable automatic bus recovery upon driver initialization,
regardless of Kconfig options. Since CAN controllers are initialized in
"stopped" state, no unwanted bus-off recovery will be started at this
point.
- Invert and rename the Kconfig CONFIG_CAN_AUTO_BUS_OFF_RECOVERY, which is
enabled by default, to CONFIG_CAN_MANUAL_RECOVERY_MODE, which is disabled
by default. Enabling CONFIG_CAN_MANUAL_RECOVERY_MODE=y enables support
for the can_recover() API function and a new manual recovery mode (see
next bullet). Keeping this guarded by Kconfig allows keeping the flash
footprint down for applications not using manual bus-off recovery.
- Introduce a new CAN controller operational mode
CAN_MODE_MANUAL_RECOVERY. Support for this is only enabled if
CONFIG_CAN_MANUAL_RECOVERY_MODE=y. Having this as a mode allows
applications to inquire whether the CAN controller supports manual
recovery mode via the can_get_capabilities() API function and either fail
or rely on automatic recovery - and it allows CAN controller drivers not
supporting manual recovery mode to fail early in can_set_mode() during
application startup instead of failing when can_recover() is called at a
later point in time.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Consistently use "int0" and "int1" as interrupt names for CAN controllers
based on the Bosch M_CAN IP core. This aligns with the upstream Linux
bindings.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add CAN stats for MCAN drivers.
Update MCAN drivers to use CAN_DEVICE_DT_INST_DEFINE
which initialises and registers CAN stats if enabled.
Signed-off-by: Grant Ramsay <gramsay@enphaseenergy.com>
Move the Bosch M_CAN header file to include/zephyr/drivers/can/can_mcan.h
for use in out-of-tree drivers.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The minimum/maximum CAN timing parameters for the Atmel SAM0 CAN driver
uses the wrong values for the minimum, nominal phase segment values. The
same goes for the maximum, nominal SJW value.
Using the static initializers fixes these and aligns them to the Bosch
M_CAN manual. The Atmel SAM C20/C21 family data sheet contains
contradicting limits for these register values.
Fixes: #58429
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Restructure the Bosch M_CAN driver backend to use per-instance Message RAM
configuration.
This removes the need for a common, artificial "can" devicetree node for
SoCs with multiple Bosch M_CAN-based CAN controllers and allows for
per-instance configuration of the number of e.g. standard (11-bit) and
extended (29-bit) filter elements.
As part of the restructure, software handling of CAN filter flags was moved
from per-flags bitfields to per-filter bitfields, solving an issue when
using more than 32 standard (11-bit) filter elements or more than 16
extended (29-bit) filter elements.
Fixes: #42030, #53417
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Let the Bosch M_CAN front-end drivers supply their own Message RAM
read/write/clear functions.
This is preparation for supporting per-instance Bosch M_CAN Message RAM
layouts and for accessing Bosch M_CAN IP cores over peripheral busses.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Driver was based on can_sam. SAMC21 has only 1 interrupt for one
can "output", so can interrupt has to executes two lines of
interrupts.
CAN is configured to use OSC48M clock via GLCK7. GLCK7 is set
by divider configured from dts.
Signed-off-by: Kamil Serwus <kserwus@gmail.com>
