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Author SHA1 Message Date
Girisha Dengi
36e71c839f drivers: clock_control: Agilex5 clock control driver updates 
The clock controller/manager registers are updated with
the correct divider values by bootloader via hand-off
data, so now we can use the clock controller to get the
clock value of each peripheral during the run time.

Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
 2024-12-16 17:12:34 -05:00
Girisha Dengi
2ca6ffcd79 drivers: clock_control: clock driver for Intel Agilex5 platform 
This is Intel's proprietary IP which supply the clock for all the
system peripherals. Clock manager is initialized only one time
during boot up by FSBL (ATF BL2) based on external user settings.

Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
 2023-07-25 16:58:01 +00:00