Add Zephyr support for the Audio DSP on the MT8196 SOC. This is a
very similar device to previous designs. Most of this patch is just
DTS.
The biggest delta is the more complicated second level interrupt
controller, though it is still able to be represented using some
vaguely clever DTS config over the older intc_mtk_adsp driver.
Also the memory layout is slightly different, requiring a little
indirection to set the initial boot stack address and log output
buffer. And the timer "irq_ack" register bits moved.
Signed-off-by: Andy Ross <andyross@google.com>
These devices have a somewhat odd hybrid design, with a free-running
64 bit up counter but no comparator. Instead interrupts are triggered
by (one of an array of) 32 bit down counters with reset (a-la SysTick,
but without the 24 bit precision issues). The combination actually
results in a fairly simple driver as we can skip the comparator
rounding math.
Signed-off-by: Andy Ross <andyross@google.com>
