Correct "zephyr,sram" property under /chosen node to make board and samples
compatible with new SoC memory description.
Signed-off-by: Marcio Ribeiro <marcio.ribeiro@espressif.com>
* Replace copies of fixed-partitions nodes in related boards by
referencing the apropriate partition table from the available list.
* For better reference the `partitions_*.dtsi` file has boot offset,
purpose and the flash size encoded in the file name. Default flash size
is considered to be 4MB.
* Added the flash size node for the boards which are not based on the
module.
* Removed flash size registry from the esp32.*common.dtsi
Signed-off-by: Marek Matej <marek.matej@espressif.com>
Fix missing flash and code partition.
Add missing dts entries and use common partition tables to all related
non-Espressif boards, previously ommited.
Add uart1 node in pinctrl for APPCPU.
Signed-off-by: Marek Matej <marek.matej@espressif.com>
The RTC subsystem in espressif's SOCs, among other tasks
is responsible for clock selection for CPU and for low
power domain clocks such as RTC_SLOW and RTC_FAST.
This commit allows for proper clock source and rate
selection for CPU, using the espressif,riscv and
espressif,xtensa-lx6/7 bindings.
It also enables clock selection for RTC_FAST and RTC_SLOW,
that impacts some peripherals, such as rtc_timer.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
There are several esp32-based boards that its conf and overlay
files are missing proper renaming to match cpu cluster.
This also removes all _SOC_ name from files.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2024-04-23 15:36:13 +02:00
Renamed from boards/espressif/esp32s3_devkitc/esp32s3_devkitc_esp32s3_appcpu.dts (Browse further)
