Commit graph

6 commits

Author SHA1 Message Date
Mathias Landolt
96146d5740 mcux: drivers: xbarb: add XBARB config option
Add the possibility to activate the XBARB driver
Update NXP HAL revision to include support for xbarb

Signed-off-by: Mathias Landolt <mathias.landolt@loepfe.com>
Signed-off-by: Adrian Bieri <adrian.bieri@loepfe.com>
2025-01-23 19:25:54 +01:00
Yangbo Lu
5bec2a3dde driver: pinctrl: add SCMI-based pinctrl driver for NXP i.MX SoCs
On some i.MX SoCs, such as i.MX95, the System Manager is running on a
Cortex-M core to manage the hardware resources and provide services for
SCMI requests.

So add the SCMI-based pinctrl driver to support these i.MX SoCs.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2024-09-11 09:34:04 +02:00
Laurentiu Mihalcea
d42dfc36d7 drivers: pinctrl: Kconfig.imx: enable PINCTRL_IMX by default
Currently, when using the `pinctrl_imx.c` driver one has
to manually enable `CONFIG_PINCTRL_IMX` even if the pinctrl
node using the driver is enabled. This is redundant and prone
to error as one would expect the driver to be enabled when
the node is also enabled.

This commit fixes the issue by enabling `CONFIG_PINCTRL_IMX`
by default and adding a new dependency on the state of the
pinctrl node (i.e: node needs to be enabled for the configuration
to also be set to `y`).

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2024-04-09 11:06:14 +02:00
Laurentiu Mihalcea
707759bd12 soc: xtensa: imx8: Add pinctrl support
This commit introduces support for pinctrl-related operations
on i.MX8QM/QXP.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2023-11-09 18:21:05 +01:00
Bartosz Bilas
9c251fc9ac nxp_imx: rt: add XBARA Inter-Peripheral Crossbar Switch Kconfig option
Add missing MCUX XBARA module Kconfig option.

Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
2022-07-01 16:23:11 +00:00
Daniel DeGrasse
bc841e1fb7 drivers: pinctrl: refactor pin control support for imx rt
Refactor iMX RT pin control support to use more generic names, as the
IOMUXC peripheral is present on non RT iMX application cores.
Additionally, make selection of the pin control driver occur at the SOC
level.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-05-12 16:57:17 -05:00