ea7a876cff
Change source tree organization for Synopsys nSIM platform. Classical ARC architectures arc_v2 arc_v3 moved to arc_classic SoC and boards family. nSIM SoCs were separated regarding series: EM, HS, SEM, VPX2. This PR sould be seeing as the preparation for addition new nSIM platform based on the RISC-V architecture. Signed-off-by: Nikolay Agishev <agishev@synopsys.com>
26 lines
685 B
C
26 lines
685 B
C
/*
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* Copyright (c) 2022-2023 Synopsys
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/arch/arc/cluster.h>
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#include <zephyr/devicetree.h>
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#include <zephyr/init.h>
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#define DT_SRAM_NODE_ADDR (DT_REG_ADDR(DT_CHOSEN(zephyr_sram)) / (1024 * 1024))
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#define DT_SRAM_NODE_SIZE (DT_REG_SIZE(DT_CHOSEN(zephyr_sram)) / (1024 * 1024))
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static int haps_arcv3_init(void)
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{
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arc_cln_write_reg_nolock(ARC_CLN_PER0_BASE, 0xF00);
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arc_cln_write_reg_nolock(ARC_CLN_PER0_SIZE, 1);
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arc_cln_write_reg_nolock(ARC_CLN_MST_NOC_0_0_ADDR, DT_SRAM_NODE_ADDR);
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arc_cln_write_reg_nolock(ARC_CLN_MST_NOC_0_0_SIZE, DT_SRAM_NODE_SIZE);
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return 0;
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}
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SYS_INIT(haps_arcv3_init, PRE_KERNEL_1, 0);
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