57723cf405
Replaces raw hex codes by using STM32_CLOCK macro Signed-off-by: Hubert Guan <hguan@ucsb.edu>
72 lines
1.8 KiB
Text
72 lines
1.8 KiB
Text
/*
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* Copyright (c) Bobby Noelte
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <st/f0/stm32f071.dtsi>
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/ {
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soc {
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compatible = "st,stm32f091", "st,stm32f0", "simple-bus";
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/*
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* USARTs 3-8 share the same IRQ on stm32f091xx devices. This
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* configuration is not currently supported, so at most one of
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* these may be enabled at a time. Enabling more than one will
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* result in a build failure.
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*/
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usart5: serial@40005000 {
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compatible = "st,stm32-usart", "st,stm32-uart";
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reg = <0x40005000 0x400>;
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clocks = <&rcc STM32_CLOCK(APB1, 20U)>;
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resets = <&rctl STM32_RESET(APB1, 20U)>;
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interrupts = <29 0>;
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status = "disabled";
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};
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usart6: serial@40011400 {
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compatible = "st,stm32-usart", "st,stm32-uart";
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reg = <0x40011400 0x400>;
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clocks = <&rcc STM32_CLOCK(APB2, 5U)>;
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resets = <&rctl STM32_RESET(APB2, 5U)>;
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interrupts = <29 0>;
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status = "disabled";
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};
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usart7: serial@40011800 {
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compatible = "st,stm32-usart", "st,stm32-uart";
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reg = <0x40011800 0x400>;
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clocks = <&rcc STM32_CLOCK(APB2, 6U)>;
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resets = <&rctl STM32_RESET(APB2, 6U)>;
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interrupts = <29 0>;
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status = "disabled";
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};
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usart8: serial@40011c00 {
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compatible = "st,stm32-usart", "st,stm32-uart";
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reg = <0x40011c00 0x400>;
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clocks = <&rcc STM32_CLOCK(APB2, 7U)>;
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resets = <&rctl STM32_RESET(APB2, 7U)>;
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interrupts = <29 0>;
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status = "disabled";
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};
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can1: can@40006400 {
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compatible = "st,stm32-bxcan";
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reg = <0x40006400 0x400>;
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interrupts = <30 0>;
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clocks = <&rcc STM32_CLOCK(APB1, 25U)>;
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status = "disabled";
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};
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dma2: dma@40020400 {
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compatible = "st,stm32-dma-v2bis";
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#dma-cells = <2>;
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reg = <0x40020400 0x400>;
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interrupts = <10 0 10 0 11 0 11 0 11 0>;
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clocks = <&rcc STM32_CLOCK(AHB1, 1U)>;
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status = "disabled";
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};
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};
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};
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