580e93e9b4
In ARM architectures the entry_cpu_exception_extend calls svc #0 when trying to generate a `K_ERR_CPU_EXCEPTION`, however z_arm_svc calls z_do_oops with a stack frame only, and gets the reason from `r0`. This means that the test working was just lucky and running it with another compiler (or setting the value of r0 before the svc #0 call, made the test fail). Cortex-A/R 32-bit architectures was doing a BKPT, this works better but will not be a hard exception when debugger is attached. I switched all the Cortex 32-bits to the ARM specified undefined instruction. Also RISC-V has a designated unimp instruction that should be used to guarantee trap. Signed-off-by: Robin Kastberg <robin.kastberg@iar.com> |
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| .. | ||
| boards | ||
| src | ||
| CMakeLists.txt | ||
| prj.conf | ||
| prj_arm_fpu_sharing.conf | ||
| prj_armv8m_mpu_stack_guard.conf | ||
| protection_no_userspace.conf | ||
| README | ||
| sentinel.conf | ||
| testcase.yaml | ||
This test case verifies that kernel fatal error handling works correctly. If a thread causes a CPU exception, and it is not in an ISR or "essential" thread, the thread gets aborted and the rest of the system executes normally.