d2c19a0535
Fix arch_timing_cycles_get() to prevent overflow on the clock rollover. The issue is observable on tests/benchmarks/wait_queues and tests/benchmarks/sched_queues with BENCHMARK_NUM_ITERATIONS is large enough, e.g. default 1000. Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
71 lines
1.7 KiB
C
71 lines
1.7 KiB
C
/*
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* Copyright (c) 2020 Intel Corporation.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/kernel.h>
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#include <zephyr/sys_clock.h>
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#include <zephyr/timing/timing.h>
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#include "altera_avalon_timer_regs.h"
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#define NIOS2_SUBTRACT_CLOCK_CYCLES(val) \
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((IORD_ALTERA_AVALON_TIMER_PERIODH(TIMER_0_BASE) << 16 | \
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(IORD_ALTERA_AVALON_TIMER_PERIODL(TIMER_0_BASE))) - \
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((uint32_t)val))
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#define TIMING_INFO_OS_GET_TIME() \
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(NIOS2_SUBTRACT_CLOCK_CYCLES( \
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((uint32_t)IORD_ALTERA_AVALON_TIMER_SNAPH(TIMER_0_BASE) \
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<< 16) | \
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((uint32_t)IORD_ALTERA_AVALON_TIMER_SNAPL(TIMER_0_BASE))))
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void arch_timing_init(void)
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{
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}
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void arch_timing_start(void)
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{
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}
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void arch_timing_stop(void)
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{
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}
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timing_t arch_timing_counter_get(void)
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{
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IOWR_ALTERA_AVALON_TIMER_SNAPL(TIMER_0_BASE, 10);
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return TIMING_INFO_OS_GET_TIME();
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}
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uint64_t arch_timing_cycles_get(volatile timing_t *const start,
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volatile timing_t *const end)
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{
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timing_t start_ = *start;
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timing_t end_ = *end;
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if (end_ >= start_) {
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return (end_ - start_);
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}
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return (end_ + NIOS2_SUBTRACT_CLOCK_CYCLES(start_));
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}
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uint64_t arch_timing_freq_get(void)
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{
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return sys_clock_hw_cycles_per_sec();
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}
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uint64_t arch_timing_cycles_to_ns(uint64_t cycles)
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{
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return k_cyc_to_ns_floor64(cycles);
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}
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uint64_t arch_timing_cycles_to_ns_avg(uint64_t cycles, uint32_t count)
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{
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return arch_timing_cycles_to_ns(cycles) / count;
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}
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uint32_t arch_timing_freq_get_mhz(void)
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{
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return (uint32_t)(arch_timing_freq_get() / 1000000U);
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}
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