2803dcd564
Remove the limitation of number of cpu support in x86 arch. Also add support for retrieve cpu informations such as for hybird cores. Signed-off-by: Najumon B.A <najumon.ba@intel.com>
130 lines
3.5 KiB
C
130 lines
3.5 KiB
C
/*
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* Copyright (c) 2019 Intel Corporation
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <cpuid.h>
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#include <zephyr/kernel.h>
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#include <zephyr/arch/cpu.h>
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#include <kernel_arch_data.h>
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#include <kernel_arch_func.h>
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#include <zephyr/kernel_structs.h>
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#include <kernel_internal.h>
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#include <zephyr/arch/x86/multiboot.h>
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#include <x86_mmu.h>
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#include <zephyr/drivers/interrupt_controller/loapic.h>
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#ifdef CONFIG_ACPI
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#include <zephyr/arch/x86/cpuid.h>
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#include <zephyr/acpi/acpi.h>
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#endif
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/*
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* Map of CPU logical IDs to CPU local APIC IDs. By default,
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* we assume this simple identity mapping, as found in QEMU.
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* The symbol is weak so that boards/SoC files can override.
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*/
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#if defined(CONFIG_ACPI)
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__weak uint8_t x86_cpu_loapics[CONFIG_MP_MAX_NUM_CPUS];
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#else
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#define INIT_CPUID(n, _) n
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__weak uint8_t x86_cpu_loapics[] = {
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LISTIFY(CONFIG_MP_MAX_NUM_CPUS, INIT_CPUID, (,)),};
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#endif
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extern char x86_ap_start[]; /* AP entry point in locore.S */
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LISTIFY(CONFIG_MP_MAX_NUM_CPUS, ACPI_CPU_INIT, (;));
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Z_GENERIC_SECTION(.boot_arg)
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x86_boot_arg_t x86_cpu_boot_arg;
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struct x86_cpuboot x86_cpuboot[] = {
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LISTIFY(CONFIG_MP_MAX_NUM_CPUS, X86_CPU_BOOT_INIT, (,)),
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};
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/*
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* Send the INIT/STARTUP IPI sequence required to start up CPU 'cpu_num', which
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* will enter the kernel at fn(arg), running on the specified stack.
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*/
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void arch_cpu_start(int cpu_num, k_thread_stack_t *stack, int sz,
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arch_cpustart_t fn, void *arg)
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{
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#if CONFIG_MP_MAX_NUM_CPUS > 1
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uint8_t vector = ((unsigned long) x86_ap_start) >> 12;
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uint8_t apic_id;
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IF_ENABLED(CONFIG_ACPI, ({
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ACPI_MADT_LOCAL_APIC *lapic = acpi_local_apic_get(cpu_num);
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if (lapic != NULL) {
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/* We update the apic_id, __start will need it. */
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x86_cpu_loapics[cpu_num] = lapic->Id;
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} else {
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/* TODO: kernel need to handle the error scenario if someone config
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* CONFIG_MP_MAX_NUM_CPUS more than what platform supported.
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*/
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__ASSERT(false, "CPU reached more than maximum supported!");
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return;
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}
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}));
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apic_id = x86_cpu_loapics[cpu_num];
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x86_cpuboot[cpu_num].sp = (uint64_t) K_KERNEL_STACK_BUFFER(stack) + sz;
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x86_cpuboot[cpu_num].stack_size = sz;
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x86_cpuboot[cpu_num].fn = fn;
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x86_cpuboot[cpu_num].arg = arg;
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x86_cpuboot[cpu_num].cpu_id = cpu_num;
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z_loapic_ipi(apic_id, LOAPIC_ICR_IPI_INIT, 0);
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k_busy_wait(10000);
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z_loapic_ipi(apic_id, LOAPIC_ICR_IPI_STARTUP, vector);
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while (x86_cpuboot[cpu_num].ready == 0) {
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}
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#else
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ARG_UNUSED(cpu_num);
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ARG_UNUSED(stack);
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ARG_UNUSED(sz);
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ARG_UNUSED(fn);
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ARG_UNUSED(arg);
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#endif
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}
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/* Per-CPU initialization, C domain. On the first CPU, z_prep_c is the
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* next step. For other CPUs it is probably smp_init_top().
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*/
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FUNC_NORETURN void z_x86_cpu_init(struct x86_cpuboot *cpuboot)
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{
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#if defined(CONFIG_ACPI)
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__ASSERT(z_x86_cpuid_get_current_physical_apic_id() ==
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x86_cpu_loapics[cpuboot->cpu_id], "APIC ID miss match!");
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#endif
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x86_sse_init(NULL);
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if (cpuboot->cpu_id == 0U) {
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/* Only need to do these once per boot */
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z_bss_zero();
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z_data_copy();
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}
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z_loapic_enable(cpuboot->cpu_id);
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#ifdef CONFIG_USERSPACE
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/* Set landing site for 'syscall' instruction */
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z_x86_msr_write(X86_LSTAR_MSR, (uint64_t)z_x86_syscall_entry_stub);
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/* Set segment descriptors for syscall privilege transitions */
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z_x86_msr_write(X86_STAR_MSR, (uint64_t)X86_STAR_UPPER << 32);
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/* Mask applied to RFLAGS when making a syscall */
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z_x86_msr_write(X86_FMASK_MSR, EFLAGS_SYSCALL);
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#endif
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/* Enter kernel, never return */
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cpuboot->ready++;
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cpuboot->fn(cpuboot->arg);
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CODE_UNREACHABLE; /* LCOV_EXCL_LINE */
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}
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