311 lines
7.9 KiB
C
311 lines
7.9 KiB
C
/*
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* SPDX-License-Identifier: Apache-2.0
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* Copyright (c) 2024 sensry.io
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*/
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#define DT_DRV_COMPAT sensry_sy1xx_uart
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#include <zephyr/device.h>
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#include <zephyr/drivers/uart.h>
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#include <soc.h>
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#include <zephyr/sys/printk.h>
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#include <udma.h>
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#include <pad_ctrl.h>
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#include <zephyr/drivers/pinctrl.h>
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struct sy1xx_uart_config {
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uint32_t base;
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uint32_t inst;
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const struct pinctrl_dev_config *pcfg;
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};
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typedef struct {
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uint16_t data_len;
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uint8_t *data;
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} sy1xx_uartTransfer_t;
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typedef enum {
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DRIVERS_UART_STOP_1,
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DRIVERS_UART_STOP_1_5,
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DRIVERS_UART_STOP_2
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} sy1xx_uart_stop_t;
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typedef enum {
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DRIVERS_UART_PAR_NONE,
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DRIVERS_UART_PAR_EVEN,
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DRIVERS_UART_PAR_ODD,
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DRIVERS_UART_PAR_MARK,
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DRIVERS_UART_PAR_SPACE
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} sy1xx_uart_parity_t;
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typedef struct {
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uint32_t baudrate;
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sy1xx_uart_stop_t stopbits;
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sy1xx_uart_parity_t parity;
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} sy1xx_uartConfig_t;
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#define DEVICE_MAX_BUFFER_SIZE (512)
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struct sy1xx_uart_data {
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uint8_t write[DEVICE_MAX_BUFFER_SIZE];
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uint8_t read[DEVICE_MAX_BUFFER_SIZE];
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};
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/* prototypes */
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static int32_t sy1xx_uart_read(const struct device *dev, sy1xx_uartTransfer_t *request);
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static int32_t sy1xx_uart_write(const struct device *dev, sy1xx_uartTransfer_t *request);
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static int32_t sy1xx_uart_configure(const struct device *dev, sy1xx_uartConfig_t *uart_cfg)
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{
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struct sy1xx_uart_config *config = (struct sy1xx_uart_config *)dev->config;
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if (uart_cfg->baudrate == 0) {
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return -1;
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}
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/*
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* The counter in the UDMA will count from 0 to div included
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* and then will restart from 0, so we must give div - 1 as
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* divider
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*/
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uint32_t divider = sy1xx_soc_get_peripheral_clock() / uart_cfg->baudrate - 1;
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/*
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* [31:16]: clock divider (from SoC clock)
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* [9]: RX enable
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* [8]: TX enable
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* [3]: stop bits 0 = 1 stop bit
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* 1 = 2 stop bits
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* [2:1]: bits 00 = 5 bits
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* 01 = 6 bits
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* 10 = 7 bits
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* 11 = 8 bits
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* [0]: parity
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*/
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/* default: both tx and rx enabled; 8N1 configuration; 1 stop bits */
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volatile uint32_t setup = 0x0306 | uart_cfg->parity;
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setup |= ((divider) << 16);
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SY1XX_UDMA_WRITE_REG(config->base, SY1XX_UDMA_SETUP_REG, setup);
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/* start initial reading request to get the dma running */
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uint8_t dummy_data[10];
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sy1xx_uartTransfer_t dummy_request = {
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.data_len = 10,
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.data = (uint8_t *)dummy_data,
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};
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sy1xx_uart_read(dev, &dummy_request);
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return 0;
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}
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/**
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* @return
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* - < 0: Error
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* - 0: OK
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* - > 0: Busy
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*/
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int32_t sy1xx_uart_read(const struct device *dev, sy1xx_uartTransfer_t *request)
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{
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struct sy1xx_uart_config *config = (struct sy1xx_uart_config *)dev->config;
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struct sy1xx_uart_data *data = (struct sy1xx_uart_data *)dev->data;
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if (request == 0) {
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return -1;
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}
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uint32_t max_read_size = request->data_len;
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request->data_len = 0;
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if (max_read_size > DEVICE_MAX_BUFFER_SIZE) {
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return -3;
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}
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int32_t ret = 0;
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/* rx is ready */
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int32_t remaining_bytes = SY1XX_UDMA_READ_REG(config->base, SY1XX_UDMA_RX_SIZE_REG);
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int32_t bytes_transferred = (DEVICE_MAX_BUFFER_SIZE - remaining_bytes);
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if (bytes_transferred > 0) {
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/* copy data to the user buffer */
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uint32_t copy_len =
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bytes_transferred > max_read_size ? max_read_size : bytes_transferred;
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for (uint32_t i = 0; i < copy_len; i++) {
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request->data[i] = data->read[i];
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}
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/* update actual read length */
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request->data_len = bytes_transferred;
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/* stop and restart receiving */
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SY1XX_UDMA_CANCEL_RX(config->base);
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/* start another read request, with maximum buffer size */
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SY1XX_UDMA_START_RX(config->base, (int32_t)data->read, DEVICE_MAX_BUFFER_SIZE, 0);
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/* return: some data received */
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ret = 0;
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} else {
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/* return: (busy) stay in receiving mode */
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ret = 1;
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}
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return ret;
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}
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/**
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* @return
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* - < 0: Error
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* - 0: OK
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* - > 0: Busy
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*/
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int32_t sy1xx_uart_write(const struct device *dev, sy1xx_uartTransfer_t *request)
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{
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struct sy1xx_uart_config *config = (struct sy1xx_uart_config *)dev->config;
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struct sy1xx_uart_data *data = (struct sy1xx_uart_data *)dev->data;
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if (request == 0) {
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return -1;
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}
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if (request->data_len == 0) {
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return -1;
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}
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if (request->data_len > DEVICE_MAX_BUFFER_SIZE) {
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/* more data than possible requested */
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return -2;
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}
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if (0 == SY1XX_UDMA_IS_FINISHED_TX(config->base)) {
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/* writing not finished => busy */
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return 1;
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}
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uint32_t remaining_bytes = SY1XX_UDMA_GET_REMAINING_TX(config->base);
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if (remaining_bytes != 0) {
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SY1XX_UDMA_CANCEL_TX(config->base);
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return -3;
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}
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/* copy the data to transmission buffer */
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for (uint32_t i = 0; i < request->data_len; i++) {
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data->write[i] = request->data[i];
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}
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/* start new transmission */
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SY1XX_UDMA_START_TX(config->base, (uint32_t)data->write, request->data_len, 0);
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/* success */
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return 0;
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}
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/*
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* it should be avoided to read single characters only
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*/
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static int sy1xx_uart_poll_in(const struct device *dev, unsigned char *c)
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{
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sy1xx_uartTransfer_t request = {
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.data_len = 1,
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.data = c,
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};
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if (0 == sy1xx_uart_read(dev, &request)) {
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return 0;
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}
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return -1;
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}
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/*
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* it should be avoided to write single characters only
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*/
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static void sy1xx_uart_poll_out(const struct device *dev, unsigned char c)
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{
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sy1xx_uartTransfer_t request = {
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.data_len = 1,
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.data = &c,
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};
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while (1) {
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if (0 == sy1xx_uart_write(dev, &request)) {
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break;
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}
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}
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}
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static int sy1xx_uart_err_check(const struct device *dev)
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{
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int err = 0;
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return err;
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}
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static int sy1xx_uart_init(const struct device *dev)
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{
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struct sy1xx_uart_config *config = (struct sy1xx_uart_config *)dev->config;
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struct sy1xx_uart_data *data = (struct sy1xx_uart_data *)dev->data;
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for (uint32_t i = 0; i < DEVICE_MAX_BUFFER_SIZE; i++) {
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data->write[i] = 0xa5;
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data->read[i] = 0xb4;
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}
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/* UDMA clock enable */
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sy1xx_udma_enable_clock(SY1XX_UDMA_MODULE_UART, config->inst);
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/* PAD config */
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int32_t ret = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT);
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if (ret < 0) {
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return ret;
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}
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sy1xx_uartConfig_t default_config = {
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.baudrate = 1000000,
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.parity = DRIVERS_UART_PAR_NONE,
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.stopbits = DRIVERS_UART_STOP_1,
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};
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SY1XX_UDMA_CANCEL_RX(config->base);
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SY1XX_UDMA_CANCEL_TX(config->base);
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sy1xx_uart_configure(dev, &default_config);
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return 0;
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}
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static DEVICE_API(uart, sy1xx_uart_driver_api) = {
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.poll_in = sy1xx_uart_poll_in,
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.poll_out = sy1xx_uart_poll_out,
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.err_check = sy1xx_uart_err_check,
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};
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#define SYS1XX_UART_INIT(n) \
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\
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PINCTRL_DT_INST_DEFINE(n); \
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\
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static const struct sy1xx_uart_config sy1xx_uart_##n##_cfg = { \
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.base = (uint32_t)DT_INST_REG_ADDR(n), \
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.inst = (uint32_t)DT_INST_PROP(n, instance), \
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.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
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}; \
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\
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static struct sy1xx_uart_data __attribute__((section(".udma_access"))) \
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__aligned(4) sy1xx_uart_##n##_data = { \
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\
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}; \
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\
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DEVICE_DT_INST_DEFINE(n, &sy1xx_uart_init, NULL, &sy1xx_uart_##n##_data, \
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&sy1xx_uart_##n##_cfg, PRE_KERNEL_1, CONFIG_SERIAL_INIT_PRIORITY, \
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&sy1xx_uart_driver_api);
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DT_INST_FOREACH_STATUS_OKAY(SYS1XX_UART_INIT)
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