90530cba96
Add generic functions that will be common to all TCPCI compliant drivers. Signed-off-by: Jianxiong Gu <jianxiong.gu@outlook.com>
684 lines
17 KiB
C
684 lines
17 KiB
C
/*
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* Copyright 2024 Google LLC
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/device.h>
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#include <zephyr/logging/log.h>
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#include <zephyr/sys/util.h>
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#include <zephyr/kernel.h>
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#include <zephyr/usb_c/usbc.h>
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#include <zephyr/usb_c/tcpci.h>
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#include <zephyr/sys/byteorder.h>
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#include <zephyr/drivers/usb_c/tcpci_priv.h>
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LOG_MODULE_REGISTER(tcpci, CONFIG_USBC_LOG_LEVEL);
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#define LOG_COMM_ERR_STR "Can't communicate with TCPC %s@%x (%s %x = %04x)"
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const struct tcpci_reg_dump_map tcpci_std_regs[TCPCI_STD_REGS_SIZE] = {
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{
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.addr = TCPC_REG_VENDOR_ID,
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.name = "VENDOR_ID",
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.size = 2,
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},
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{
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.addr = TCPC_REG_PRODUCT_ID,
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.name = "PRODUCT_ID",
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.size = 2,
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},
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{
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.addr = TCPC_REG_BCD_DEV,
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.name = "DEVICE_ID",
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.size = 2,
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},
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{
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.addr = TCPC_REG_TC_REV,
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.name = "USBTYPEC_REV",
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.size = 2,
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},
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{
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.addr = TCPC_REG_PD_REV,
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.name = "USBPD_REV_VER",
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.size = 2,
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},
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{
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.addr = TCPC_REG_PD_INT_REV,
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.name = "PD_INTERFACE_REV",
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.size = 2,
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},
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{
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.addr = TCPC_REG_ALERT,
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.name = "ALERT",
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.size = 2,
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},
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{
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.addr = TCPC_REG_ALERT_MASK,
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.name = "ALERT_MASK",
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.size = 2,
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},
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{
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.addr = TCPC_REG_POWER_STATUS_MASK,
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.name = "POWER_STATUS_MASK",
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.size = 1,
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},
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{
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.addr = TCPC_REG_FAULT_STATUS_MASK,
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.name = "FAULT_STATUS_MASK",
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.size = 1,
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},
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{
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.addr = TCPC_REG_EXT_STATUS_MASK,
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.name = "EXTENDED_STATUS_MASK",
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.size = 1,
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},
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{
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.addr = TCPC_REG_ALERT_EXT_MASK,
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.name = "ALERT_EXTENDED_MASK",
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.size = 1,
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},
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{
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.addr = TCPC_REG_CONFIG_STD_OUTPUT,
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.name = "CFG_STANDARD_OUTPUT",
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.size = 1,
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},
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{
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.addr = TCPC_REG_TCPC_CTRL,
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.name = "TCPC_CONTROL",
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.size = 1,
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},
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{
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.addr = TCPC_REG_ROLE_CTRL,
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.name = "ROLE_CONTROL",
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.size = 1,
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},
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{
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.addr = TCPC_REG_FAULT_CTRL,
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.name = "FAULT_CONTROL",
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.size = 1,
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},
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{
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.addr = TCPC_REG_POWER_CTRL,
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.name = "POWER_CONTROL",
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.size = 1,
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},
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{
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.addr = TCPC_REG_CC_STATUS,
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.name = "CC_STATUS",
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.size = 1,
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},
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{
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.addr = TCPC_REG_POWER_STATUS,
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.name = "POWER_STATUS",
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.size = 1,
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},
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{
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.addr = TCPC_REG_FAULT_STATUS,
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.name = "FAULT_STATUS",
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.size = 1,
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},
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{
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.addr = TCPC_REG_EXT_STATUS,
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.name = "EXTENDED_STATUS",
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.size = 1,
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},
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{
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.addr = TCPC_REG_ALERT_EXT,
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.name = "ALERT_EXTENDED",
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.size = 1,
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},
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{
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.addr = TCPC_REG_DEV_CAP_1,
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.name = "DEVICE_CAPABILITIES_1",
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.size = 2,
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},
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{
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.addr = TCPC_REG_DEV_CAP_2,
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.name = "DEVICE_CAPABILITIES_2",
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.size = 2,
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},
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{
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.addr = TCPC_REG_STD_INPUT_CAP,
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.name = "STANDARD_INPUT_CAPABILITIES",
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.size = 1,
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},
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{
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.addr = TCPC_REG_STD_OUTPUT_CAP,
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.name = "STANDARD_OUTPUT_CAPABILITIES",
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.size = 1,
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},
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{
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.addr = TCPC_REG_CONFIG_EXT_1,
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.name = "CFG_EXTENDED1",
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.size = 1,
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},
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{
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.addr = TCPC_REG_GENERIC_TIMER,
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.name = "GENERIC_TIMER",
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.size = 2,
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},
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{
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.addr = TCPC_REG_MSG_HDR_INFO,
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.name = "MESSAGE_HEADER_INFO",
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.size = 1,
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},
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{
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.addr = TCPC_REG_RX_DETECT,
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.name = "RECEIVE_DETECT",
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.size = 1,
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},
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{
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.addr = TCPC_REG_TRANSMIT,
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.name = "TRANSMIT",
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.size = 1,
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},
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{
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.addr = TCPC_REG_VBUS_VOLTAGE,
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.name = "VBUS_VOLTAGE",
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.size = 2,
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},
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{
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.addr = TCPC_REG_VBUS_SINK_DISCONNECT_THRESH,
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.name = "VBUS_SINK_DISCONNECT_THRESHOLD",
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.size = 2,
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},
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{
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.addr = TCPC_REG_VBUS_STOP_DISCHARGE_THRESH,
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.name = "VBUS_STOP_DISCHARGE_THRESHOLD",
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.size = 2,
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},
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{
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.addr = TCPC_REG_VBUS_VOLTAGE_ALARM_HI_CFG,
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.name = "VBUS_VOLTAGE_ALARM_HI_CFG",
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.size = 2,
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},
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{
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.addr = TCPC_REG_VBUS_VOLTAGE_ALARM_LO_CFG,
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.name = "VBUS_VOLTAGE_ALARM_LO_CFG",
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.size = 2,
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},
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{
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.addr = TCPC_REG_VBUS_NONDEFAULT_TARGET,
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.name = "VBUS_NONDEFAULT_TARGET",
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.size = 2,
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},
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{
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.addr = TCPC_REG_DEV_CAP_3,
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.name = "DEVICE_CAPABILITIES_3",
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.size = 2,
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},
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};
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int tcpci_read_reg8(const struct i2c_dt_spec *i2c, uint8_t reg, uint8_t *value)
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{
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int ret;
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for (int a = 0; a < CONFIG_USBC_TCPC_TCPCI_I2C_RETRIES; a++) {
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ret = i2c_write_read(i2c->bus, i2c->addr, ®, sizeof(reg), value, sizeof(*value));
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if (ret == 0) {
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break;
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}
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}
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if (ret != 0) {
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LOG_ERR(LOG_COMM_ERR_STR, i2c->bus->name, i2c->addr, "r8", reg, *value);
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}
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return ret;
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}
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int tcpci_write_reg8(const struct i2c_dt_spec *i2c, uint8_t reg, uint8_t value)
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{
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uint8_t buf[2] = {reg, value};
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int ret;
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for (int a = 0; a < CONFIG_USBC_TCPC_TCPCI_I2C_RETRIES; a++) {
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ret = i2c_write(i2c->bus, buf, 2, i2c->addr);
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if (ret == 0) {
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break;
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}
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}
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if (ret != 0) {
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LOG_ERR(LOG_COMM_ERR_STR, i2c->bus->name, i2c->addr, "w8", reg, value);
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}
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return ret;
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}
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int tcpci_update_reg8(const struct i2c_dt_spec *i2c, uint8_t reg, uint8_t mask, uint8_t value)
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{
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uint8_t old_value;
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int ret;
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ret = tcpci_read_reg8(i2c, reg, &old_value);
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if (ret != 0) {
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return ret;
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}
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old_value &= ~mask;
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old_value |= (value & mask);
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ret = tcpci_write_reg8(i2c, reg, old_value);
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return ret;
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}
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int tcpci_read_reg16(const struct i2c_dt_spec *i2c, uint8_t reg, uint16_t *value)
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{
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int ret;
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for (int a = 0; a < CONFIG_USBC_TCPC_TCPCI_I2C_RETRIES; a++) {
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ret = i2c_write_read(i2c->bus, i2c->addr, ®, sizeof(reg), value, sizeof(*value));
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if (ret == 0) {
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*value = sys_le16_to_cpu(*value);
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break;
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}
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}
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if (ret != 0) {
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LOG_ERR(LOG_COMM_ERR_STR, i2c->bus->name, i2c->addr, "r16", reg, *value);
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}
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return ret;
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}
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int tcpci_write_reg16(const struct i2c_dt_spec *i2c, uint8_t reg, uint16_t value)
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{
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value = sys_cpu_to_le16(value);
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uint8_t *value_ptr = (uint8_t *)&value;
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uint8_t buf[3] = {reg, value_ptr[0], value_ptr[1]};
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int ret;
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for (int a = 0; a < CONFIG_USBC_TCPC_TCPCI_I2C_RETRIES; a++) {
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ret = i2c_write(i2c->bus, buf, 3, i2c->addr);
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if (ret == 0) {
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break;
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}
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}
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if (ret != 0) {
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LOG_ERR(LOG_COMM_ERR_STR, i2c->bus->name, i2c->addr, "w16", reg, value);
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}
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return ret;
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}
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enum tcpc_alert tcpci_alert_reg_to_enum(uint16_t reg)
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{
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/**
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* Hard reset enum has priority since it causes other bits to be ignored. Other values
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* are sorted by corresponding bits index in the register.
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*/
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if (reg & TCPC_REG_ALERT_RX_HARD_RST) {
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/** Received Hard Reset message */
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return TCPC_ALERT_HARD_RESET_RECEIVED;
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} else if (reg & TCPC_REG_ALERT_CC_STATUS) {
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/** CC status changed */
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return TCPC_ALERT_CC_STATUS;
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} else if (reg & TCPC_REG_ALERT_POWER_STATUS) {
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/** Power status changed */
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return TCPC_ALERT_POWER_STATUS;
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} else if (reg & TCPC_REG_ALERT_RX_STATUS) {
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/** Receive Buffer register changed */
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return TCPC_ALERT_MSG_STATUS;
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} else if (reg & TCPC_REG_ALERT_TX_FAILED) {
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/** SOP* message transmission not successful */
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return TCPC_ALERT_TRANSMIT_MSG_FAILED;
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} else if (reg & TCPC_REG_ALERT_TX_DISCARDED) {
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/**
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* Reset or SOP* message transmission not sent
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* due to an incoming receive message
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*/
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return TCPC_ALERT_TRANSMIT_MSG_DISCARDED;
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} else if (reg & TCPC_REG_ALERT_TX_SUCCESS) {
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/** Reset or SOP* message transmission successful */
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return TCPC_ALERT_TRANSMIT_MSG_SUCCESS;
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} else if (reg & TCPC_REG_ALERT_V_ALARM_HI) {
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/** A high-voltage alarm has occurred */
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return TCPC_ALERT_VBUS_ALARM_HI;
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} else if (reg & TCPC_REG_ALERT_V_ALARM_LO) {
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/** A low-voltage alarm has occurred */
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return TCPC_ALERT_VBUS_ALARM_LO;
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} else if (reg & TCPC_REG_ALERT_FAULT) {
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/** A fault has occurred. Read the FAULT_STATUS register */
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return TCPC_ALERT_FAULT_STATUS;
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} else if (reg & TCPC_REG_ALERT_RX_BUF_OVF) {
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/** TCPC RX buffer has overflowed */
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return TCPC_ALERT_RX_BUFFER_OVERFLOW;
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} else if (reg & TCPC_REG_ALERT_VBUS_DISCNCT) {
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/** The TCPC in Attached.SNK state has detected a sink disconnect */
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return TCPC_ALERT_VBUS_SNK_DISCONNECT;
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} else if (reg & TCPC_REG_ALERT_RX_BEGINNING) {
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/** Receive buffer register changed */
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return TCPC_ALERT_BEGINNING_MSG_STATUS;
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} else if (reg & TCPC_REG_ALERT_EXT_STATUS) {
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/** Extended status changed */
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return TCPC_ALERT_EXTENDED_STATUS;
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} else if (reg & TCPC_REG_ALERT_ALERT_EXT) {
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/**
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* An extended interrupt event has occurred. Read the alert_extended
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* register
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*/
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return TCPC_ALERT_EXTENDED;
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} else if (reg & TCPC_REG_ALERT_VENDOR_DEF) {
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/** A vendor defined alert has been detected */
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return TCPC_ALERT_VENDOR_DEFINED;
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}
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LOG_ERR("Invalid alert register value");
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return -1;
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}
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int tcpci_tcpm_get_cc(const struct i2c_dt_spec *bus, enum tc_cc_voltage_state *cc1,
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enum tc_cc_voltage_state *cc2)
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{
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uint8_t role;
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uint8_t status;
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int cc1_present_rd, cc2_present_rd;
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int rv;
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if (cc1 == NULL || cc2 == NULL) {
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return -EINVAL;
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}
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/* errors will return CC as open */
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*cc1 = TC_CC_VOLT_OPEN;
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*cc2 = TC_CC_VOLT_OPEN;
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/* Get the ROLE CONTROL and CC STATUS values */
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rv = tcpci_read_reg8(bus, TCPC_REG_ROLE_CTRL, &role);
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if (rv != 0) {
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return rv;
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}
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rv = tcpci_read_reg8(bus, TCPC_REG_CC_STATUS, &status);
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if (rv != 0) {
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return rv;
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}
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/* Get the current CC values from the CC STATUS */
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*cc1 = TCPC_REG_CC_STATUS_CC1_STATE(status);
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*cc2 = TCPC_REG_CC_STATUS_CC2_STATE(status);
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/* Determine if we are presenting Rd */
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cc1_present_rd = 0;
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cc2_present_rd = 0;
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if (role & TCPC_REG_ROLE_CTRL_DRP_MASK) {
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/*
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* We are doing DRP. We will use the CC STATUS
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* ConnectResult to determine if we are presenting
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* Rd or Rp.
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*/
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int term;
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term = !!(status & TCPC_REG_CC_STATUS_CONNECT_RESULT);
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if (*cc1 != TC_CC_VOLT_OPEN) {
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cc1_present_rd = term;
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}
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if (*cc2 != TC_CC_VOLT_OPEN) {
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cc2_present_rd = term;
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}
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} else {
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/*
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* We are not doing DRP. We will use the ROLE CONTROL
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* CC values to determine if we are presenting Rd or Rp.
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*/
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int role_cc1, role_cc2;
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role_cc1 = TCPC_REG_ROLE_CTRL_CC1(role);
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role_cc2 = TCPC_REG_ROLE_CTRL_CC2(role);
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if (*cc1 != TC_CC_VOLT_OPEN) {
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cc1_present_rd = (role_cc1 == TC_CC_RD);
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}
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if (*cc2 != TC_CC_VOLT_OPEN) {
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cc2_present_rd = (role_cc2 == TC_CC_RD);
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}
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}
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*cc1 |= cc1_present_rd << 2;
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*cc2 |= cc2_present_rd << 2;
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return 0;
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}
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int tcpci_tcpm_get_chip_info(const struct i2c_dt_spec *bus, struct tcpc_chip_info *chip_info)
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{
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int ret;
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if (chip_info == NULL) {
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return -EIO;
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}
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ret = tcpci_read_reg16(bus, TCPC_REG_VENDOR_ID, &chip_info->vendor_id);
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if (ret != 0) {
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return ret;
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}
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ret = tcpci_read_reg16(bus, TCPC_REG_PRODUCT_ID, &chip_info->product_id);
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if (ret != 0) {
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return ret;
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}
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return tcpci_read_reg16(bus, TCPC_REG_BCD_DEV, &chip_info->device_id);
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}
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int tcpci_tcpm_dump_std_reg(const struct i2c_dt_spec *bus)
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{
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uint16_t value;
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for (unsigned int a = 0; a < ARRAY_SIZE(tcpci_std_regs); a++) {
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switch (tcpci_std_regs[a].size) {
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case 1:
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tcpci_read_reg8(bus, tcpci_std_regs[a].addr, (uint8_t *)&value);
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LOG_INF("- %-30s(0x%02x) = 0x%02x", tcpci_std_regs[a].name,
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tcpci_std_regs[a].addr, (uint8_t)value);
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break;
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case 2:
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tcpci_read_reg16(bus, tcpci_std_regs[a].addr, &value);
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LOG_INF("- %-30s(0x%02x) = 0x%04x", tcpci_std_regs[a].name,
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tcpci_std_regs[a].addr, value);
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break;
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}
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}
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return 0;
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}
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int tcpci_tcpm_set_bist_test_mode(const struct i2c_dt_spec *bus, bool enable)
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{
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return tcpci_update_reg8(bus, TCPC_REG_TCPC_CTRL, TCPC_REG_TCPC_CTRL_BIST_TEST_MODE,
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enable ? TCPC_REG_TCPC_CTRL_BIST_TEST_MODE : 0);
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}
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int tcpci_tcpm_transmit_data(const struct i2c_dt_spec *bus, struct pd_msg *msg,
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const uint8_t retries)
|
|
{
|
|
int reg = TCPC_REG_TX_BUFFER;
|
|
int rv;
|
|
int cnt = 4 * msg->header.number_of_data_objects;
|
|
|
|
/* If not SOP* transmission, just write to the transmit register */
|
|
if (msg->header.message_type >= NUM_SOP_STAR_TYPES) {
|
|
/*
|
|
* Per TCPCI spec, do not specify retry (although the TCPC
|
|
* should ignore retry field for these 3 types).
|
|
*/
|
|
return tcpci_write_reg8(
|
|
bus, TCPC_REG_TRANSMIT,
|
|
TCPC_REG_TRANSMIT_SET_WITHOUT_RETRY(msg->header.message_type));
|
|
}
|
|
|
|
if (cnt > 0) {
|
|
reg = TCPC_REG_TX_BUFFER;
|
|
/* TX_BYTE_CNT includes extra bytes for message header */
|
|
cnt += sizeof(msg->header.raw_value);
|
|
|
|
struct i2c_msg buf[3];
|
|
|
|
uint8_t tmp[2] = {TCPC_REG_TX_BUFFER, cnt};
|
|
|
|
buf[0].buf = tmp;
|
|
buf[0].len = 2;
|
|
buf[0].flags = I2C_MSG_WRITE;
|
|
|
|
buf[1].buf = (uint8_t *)&msg->header.raw_value;
|
|
buf[1].len = sizeof(msg->header.raw_value);
|
|
buf[1].flags = I2C_MSG_WRITE;
|
|
|
|
buf[2].buf = (uint8_t *)msg->data;
|
|
buf[2].len = msg->len;
|
|
buf[2].flags = I2C_MSG_WRITE | I2C_MSG_STOP;
|
|
|
|
if (cnt > sizeof(msg->header.raw_value)) {
|
|
rv = i2c_transfer(bus->bus, buf, 3, bus->addr);
|
|
} else {
|
|
buf[1].flags |= I2C_MSG_STOP;
|
|
rv = i2c_transfer(bus->bus, buf, 2, bus->addr);
|
|
}
|
|
|
|
/* If tcpc write fails, return error */
|
|
if (rv) {
|
|
return rv;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* We always retry in TCPC hardware since the TCPM is too slow to
|
|
* respond within tRetry (~195 usec).
|
|
*
|
|
* The retry count used is dependent on the maximum PD revision
|
|
* supported at build time.
|
|
*/
|
|
rv = tcpci_write_reg8(bus, TCPC_REG_TRANSMIT,
|
|
TCPC_REG_TRANSMIT_SET_WITH_RETRY(retries, msg->type));
|
|
|
|
return rv;
|
|
}
|
|
|
|
int tcpci_tcpm_select_rp_value(const struct i2c_dt_spec *bus, enum tc_rp_value rp)
|
|
{
|
|
return tcpci_update_reg8(bus, TCPC_REG_ROLE_CTRL, TCPC_REG_ROLE_CTRL_RP_MASK,
|
|
TCPC_REG_ROLE_CTRL_SET(0, rp, 0, 0));
|
|
}
|
|
|
|
int tcpci_tcpm_get_rp_value(const struct i2c_dt_spec *bus, enum tc_rp_value *rp)
|
|
{
|
|
uint8_t reg_value = 0;
|
|
int ret;
|
|
|
|
ret = tcpci_read_reg8(bus, TCPC_REG_ROLE_CTRL, ®_value);
|
|
*rp = TCPC_REG_ROLE_CTRL_RP(reg_value);
|
|
|
|
return ret;
|
|
}
|
|
|
|
int tcpci_tcpm_set_cc(const struct i2c_dt_spec *bus, enum tc_cc_pull pull)
|
|
{
|
|
return tcpci_update_reg8(bus, TCPC_REG_ROLE_CTRL,
|
|
TCPC_REG_ROLE_CTRL_CC1_MASK | TCPC_REG_ROLE_CTRL_CC2_MASK,
|
|
TCPC_REG_ROLE_CTRL_SET(0, 0, pull, pull));
|
|
}
|
|
|
|
int tcpci_tcpm_set_vconn(const struct i2c_dt_spec *bus, bool enable)
|
|
{
|
|
return tcpci_update_reg8(bus, TCPC_REG_POWER_CTRL, TCPC_REG_POWER_CTRL_VCONN_EN,
|
|
enable ? TCPC_REG_POWER_CTRL_VCONN_EN : 0);
|
|
}
|
|
|
|
int tcpci_tcpm_set_roles(const struct i2c_dt_spec *bus, enum pd_rev_type pd_rev,
|
|
enum tc_power_role power_role, enum tc_data_role data_role)
|
|
{
|
|
return tcpci_update_reg8(bus, TCPC_REG_MSG_HDR_INFO, TCPC_REG_MSG_HDR_INFO_ROLES_MASK,
|
|
TCPC_REG_MSG_HDR_INFO_SET(pd_rev, data_role, power_role));
|
|
}
|
|
|
|
int tcpci_tcpm_set_drp_toggle(const struct i2c_dt_spec *bus, bool enable)
|
|
{
|
|
return tcpci_update_reg8(bus, TCPC_REG_ROLE_CTRL, TCPC_REG_ROLE_CTRL_DRP_MASK,
|
|
TCPC_REG_ROLE_CTRL_SET(enable, 0, 0, 0));
|
|
}
|
|
|
|
int tcpci_tcpm_set_rx_type(const struct i2c_dt_spec *bus, uint8_t rx_type)
|
|
{
|
|
return tcpci_write_reg8(bus, TCPC_REG_RX_DETECT, rx_type);
|
|
}
|
|
|
|
int tcpci_tcpm_set_cc_polarity(const struct i2c_dt_spec *bus, enum tc_cc_polarity polarity)
|
|
{
|
|
return tcpci_update_reg8(
|
|
bus, TCPC_REG_TCPC_CTRL, TCPC_REG_TCPC_CTRL_PLUG_ORIENTATION,
|
|
(polarity == TC_POLARITY_CC1) ? 0 : TCPC_REG_TCPC_CTRL_PLUG_ORIENTATION);
|
|
}
|
|
|
|
int tcpci_tcpm_get_status_register(const struct i2c_dt_spec *bus, enum tcpc_status_reg reg,
|
|
uint16_t *status)
|
|
{
|
|
switch (reg) {
|
|
case TCPC_ALERT_STATUS:
|
|
return tcpci_read_reg16(bus, TCPC_REG_ALERT, status);
|
|
case TCPC_CC_STATUS:
|
|
return tcpci_read_reg16(bus, TCPC_REG_CC_STATUS, status);
|
|
case TCPC_POWER_STATUS:
|
|
return tcpci_read_reg8(bus, TCPC_REG_POWER_STATUS, (uint8_t *)status);
|
|
case TCPC_FAULT_STATUS:
|
|
return tcpci_read_reg8(bus, TCPC_REG_FAULT_STATUS, (uint8_t *)status);
|
|
case TCPC_EXTENDED_STATUS:
|
|
return tcpci_read_reg8(bus, TCPC_REG_EXT_STATUS, (uint8_t *)status);
|
|
case TCPC_EXTENDED_ALERT_STATUS:
|
|
return tcpci_read_reg8(bus, TCPC_REG_ALERT_EXT, (uint8_t *)status);
|
|
default:
|
|
LOG_ERR("Not a TCPCI-specified reg address");
|
|
return -EINVAL;
|
|
}
|
|
}
|
|
|
|
int tcpci_tcpm_clear_status_register(const struct i2c_dt_spec *bus, enum tcpc_status_reg reg,
|
|
uint16_t mask)
|
|
{
|
|
switch (reg) {
|
|
case TCPC_ALERT_STATUS:
|
|
return tcpci_write_reg16(bus, TCPC_REG_ALERT, mask);
|
|
case TCPC_CC_STATUS:
|
|
return tcpci_write_reg16(bus, TCPC_REG_CC_STATUS, mask);
|
|
case TCPC_POWER_STATUS:
|
|
return tcpci_write_reg8(bus, TCPC_REG_POWER_STATUS, (uint8_t)mask);
|
|
case TCPC_FAULT_STATUS:
|
|
return tcpci_write_reg8(bus, TCPC_REG_FAULT_STATUS, (uint8_t)mask);
|
|
case TCPC_EXTENDED_STATUS:
|
|
return tcpci_write_reg8(bus, TCPC_REG_EXT_STATUS, (uint8_t)mask);
|
|
case TCPC_EXTENDED_ALERT_STATUS:
|
|
return tcpci_write_reg8(bus, TCPC_REG_ALERT_EXT, (uint8_t)mask);
|
|
default:
|
|
LOG_ERR("Not a TCPCI-specified reg address");
|
|
return -EINVAL;
|
|
}
|
|
}
|
|
|
|
int tcpci_tcpm_mask_status_register(const struct i2c_dt_spec *bus, enum tcpc_status_reg reg,
|
|
uint16_t mask)
|
|
{
|
|
switch (reg) {
|
|
case TCPC_ALERT_STATUS:
|
|
return tcpci_write_reg16(bus, TCPC_REG_ALERT_MASK, mask);
|
|
case TCPC_CC_STATUS:
|
|
LOG_ERR("CC_STATUS does not have a corresponding mask register");
|
|
return -EINVAL;
|
|
case TCPC_POWER_STATUS:
|
|
return tcpci_write_reg8(bus, TCPC_REG_POWER_STATUS_MASK, (uint8_t)mask);
|
|
case TCPC_FAULT_STATUS:
|
|
return tcpci_write_reg8(bus, TCPC_REG_FAULT_STATUS_MASK, (uint8_t)mask);
|
|
case TCPC_EXTENDED_STATUS:
|
|
return tcpci_write_reg8(bus, TCPC_REG_EXT_STATUS_MASK, (uint8_t)mask);
|
|
case TCPC_EXTENDED_ALERT_STATUS:
|
|
return tcpci_write_reg8(bus, TCPC_REG_ALERT_EXT_MASK, (uint8_t)mask);
|
|
default:
|
|
LOG_ERR("Not a TCPCI-specified reg address");
|
|
return -EINVAL;
|
|
}
|
|
}
|