430990ee3f
The Dead Battery resistors interfere with port partner detection. So, Dead Battery is disabled after the system starts and sets the Rd or Rp resistors on the CC lines. Tested on b_g474e_dpow1 with JP5 set to USBC. Tested on stm32g081b_eval with JP17 set to D5V. Signed-off-by: Sam Hurst <sbh1187@gmail.com>
332 lines
8.1 KiB
C
332 lines
8.1 KiB
C
/*
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* Copyright (c) 2022 The Chromium OS Authors
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_DRIVERS_USBC_DEVICE_UCPD_STM32_PRIV_H_
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#define ZEPHYR_DRIVERS_USBC_DEVICE_UCPD_STM32_PRIV_H_
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#include <zephyr/kernel.h>
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#include <zephyr/sys/util.h>
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#include <zephyr/drivers/usb_c/usbc_tcpc.h>
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#include <zephyr/drivers/pinctrl.h>
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#include <stm32_ll_ucpd.h>
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/**
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* @brief The packet type(SOP*) consists of 2-bytes
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*/
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#define PACKET_TYPE_SIZE 2
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/**
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* @brief The message header consists of 2-bytes
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*/
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#define MSG_HEADER_SIZE 2
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/**
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* @brief USB PD message buffer length.
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*/
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#define UCPD_BUF_LEN (PD_MAX_EXTENDED_MSG_LEN + \
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PACKET_TYPE_SIZE + \
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MSG_HEADER_SIZE)
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/**
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* @brief UCPD alert mask used for enabling alerts
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* used to receive a message
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*/
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#define UCPD_IMR_RX_INT_MASK (UCPD_IMR_RXNEIE | \
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UCPD_IMR_RXORDDETIE | \
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UCPD_IMR_RXHRSTDETIE | \
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UCPD_IMR_RXOVRIE | \
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UCPD_IMR_RXMSGENDIE)
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/**
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* @brief UCPD alert mask used for clearing alerts
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* used to receive a message
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*/
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#define UCPD_ICR_RX_INT_MASK (UCPD_ICR_RXORDDETCF | \
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UCPD_ICR_RXHRSTDETCF | \
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UCPD_ICR_RXOVRCF | \
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UCPD_ICR_RXMSGENDCF)
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/**
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* @brief UCPD alert mask used for enabling alerts
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* used to transmit a message
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*/
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#define UCPD_IMR_TX_INT_MASK (UCPD_IMR_TXISIE | \
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UCPD_IMR_TXMSGDISCIE | \
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UCPD_IMR_TXMSGSENTIE | \
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UCPD_IMR_TXMSGABTIE | \
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UCPD_IMR_TXUNDIE)
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/**
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* @brief UCPD alert mask used for clearing alerts
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* used to transmit a message
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*/
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#define UCPD_ICR_TX_INT_MASK (UCPD_ICR_TXMSGDISCCF | \
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UCPD_ICR_TXMSGSENTCF | \
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UCPD_ICR_TXMSGABTCF | \
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UCPD_ICR_TXUNDCF)
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/**
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* @brief UCPD alert mask for all alerts
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*/
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#define UCPD_ICR_ALL_INT_MASK (UCPD_ICR_FRSEVTCF | \
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UCPD_ICR_TYPECEVT2CF | \
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UCPD_ICR_TYPECEVT1CF | \
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UCPD_ICR_RXMSGENDCF | \
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UCPD_ICR_RXOVRCF | \
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UCPD_ICR_RXHRSTDETCF | \
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UCPD_ICR_RXORDDETCF | \
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UCPD_ICR_TXUNDCF | \
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UCPD_ICR_HRSTSENTCF | \
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UCPD_ICR_HRSTDISCCF | \
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UCPD_ICR_TXMSGABTCF | \
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UCPD_ICR_TXMSGSENTCF | \
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UCPD_ICR_TXMSGDISCCF)
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/**
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* @brief For STM32G0X devices, this macro enables
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* Dead Battery functionality
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*/
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#define UCPD_CR_DBATTEN BIT(15)
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/**
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* @brief Map UCPD ANASUB value to TCPC RP value
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*
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* @param r UCPD ANASUB value
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*/
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#define UCPD_ANASUB_TO_RP(r) ((r - 1) & 0x3)
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/**
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* @brief Map TCPC RP value to UCPD ANASUB value
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*
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* @param r TCPC RP value
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*/
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#define UCPD_RP_TO_ANASUB(r) ((r + 1) & 0x3)
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/**
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* @brief Create value for writing to UCPD CR ANASUBMOD
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*/
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#define STM32_UCPD_CR_ANASUBMODE_VAL(x) ((x) << UCPD_CR_ANASUBMODE_Pos)
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/**
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* @brief UCPD VSTATE CCx open value when in source mode
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*/
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#define STM32_UCPD_SR_VSTATE_OPEN 3
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/**
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* @brief UCPD VSTATE CCx RA value when in source mode
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*/
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#define STM32_UCPD_SR_VSTATE_RA 0
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/**
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* @brief PD message send retry count for Rev 2.0
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*/
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#define UCPD_N_RETRY_COUNT_REV20 3
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/**
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* @brief PD message send retry count for Rev 3.0
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*/
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#define UCPD_N_RETRY_COUNT_REV30 2
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/**
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* @brief Events for ucpd_alert_handler
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*/
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enum {
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/* Request to send a goodCRC message */
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UCPD_EVT_GOOD_CRC_REQ,
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/* Request to send a power delivery message */
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UCPD_EVT_TCPM_MSG_REQ,
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/* Request to send a Hard Reset message */
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UCPD_EVT_HR_REQ,
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/* Transmission of power delivery message failed */
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UCPD_EVT_TX_MSG_FAIL,
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/* Transmission of power delivery message was discarded */
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UCPD_EVT_TX_MSG_DISC,
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/* Transmission of power delivery message was successful */
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UCPD_EVT_TX_MSG_SUCCESS,
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/* Transmission of Hard Reset message was successful */
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UCPD_EVT_HR_DONE,
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/* Transmission of Hard Reset message failed */
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UCPD_EVT_HR_FAIL,
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/* A goodCRC message was received */
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UCPD_EVT_RX_GOOD_CRC,
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/* A power delivery message was received */
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UCPD_EVT_RX_MSG,
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/* A CC event occurred */
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UCPD_EVT_EVENT_CC,
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/* A Hard Reset message was received */
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UCPD_EVT_HARD_RESET_RECEIVED,
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};
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/**
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* @brief GoodCRC message header roles
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*/
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struct msg_header_info {
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/* Power Role */
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enum tc_power_role pr;
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/* Data Role */
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enum tc_data_role dr;
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};
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/**
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* @brief States for managing TX messages
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*/
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enum ucpd_state {
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/* Idle state */
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STATE_IDLE,
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/* Transmitting a message state */
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STATE_ACTIVE_TCPM,
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/* Transmitting a goodCRC message state */
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STATE_ACTIVE_CRC,
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/* Transmitting a Hard Reset message state */
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STATE_HARD_RESET,
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/* Waiting for a goodCRC message state */
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STATE_WAIT_CRC_ACK
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};
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/**
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* @brief Tx messages are initiated either by the application or from
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* the driver when a GoodCRC ack message needs to be sent.
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*/
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enum ucpd_tx_msg {
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/* Default value for not sending a message */
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TX_MSG_NONE = -1,
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/* Message initiated from the application */
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TX_MSG_TCPM = 0,
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/* Message initiated from the driver */
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TX_MSG_GOOD_CRC = 1,
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/* Total number sources that can initiate a message */
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TX_MSG_TOTAL = 2
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};
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/**
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* @brief Message from application mask
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*/
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#define MSG_TCPM_MASK BIT(TX_MSG_TCPM)
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/**
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* @brief Message from driver mask
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*/
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#define MSG_GOOD_CRC_MASK BIT(TX_MSG_GOOD_CRC)
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/**
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* @brief Buffer for holding the received message
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*/
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union pd_buffer {
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/* Power Delivery message header */
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uint16_t header;
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/* Power Deliver message data including the message header */
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uint8_t msg[UCPD_BUF_LEN];
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};
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/**
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* @brief Struct used for transmitting a power delivery message
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*/
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struct ucpd_tx_desc {
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/* Type of the message */
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enum pd_packet_type type;
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/* Length of the message */
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int msg_len;
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/* Index of the current byte to transmit */
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int msg_index;
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/* Power Delivery message to transmit */
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union pd_buffer data;
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};
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/**
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* @brief Alert handler information
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*/
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struct alert_info {
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/* Runtime device structure */
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const struct device *dev;
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/* Application supplied data that's passed to the
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* application's alert handler callback
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**/
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void *data;
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/* Application's alert handler callback */
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tcpc_alert_handler_cb_t handler;
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/*
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* Kernel worker used to call the application's
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* alert handler callback
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*/
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struct k_work work;
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/* Event flags used in the kernel worker */
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atomic_t evt;
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};
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/**
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* @brief Driver config
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*/
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struct tcpc_config {
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/* STM32 UCPC CC pin control */
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const struct pinctrl_dev_config *ucpd_pcfg;
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/* STM32 UCPD port */
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UCPD_TypeDef *ucpd_port;
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/* STM32 UCPD parameters */
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LL_UCPD_InitTypeDef ucpd_params;
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/* STM32 UCPD dead battery support */
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bool ucpd_dead_battery;
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};
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/**
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* @brief Driver data
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*/
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struct tcpc_data {
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/* VCONN callback function */
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tcpc_vconn_control_cb_t vconn_cb;
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/* VCONN Discharge callback function */
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tcpc_vconn_discharge_cb_t vconn_discharge_cb;
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/* Alert information */
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struct alert_info alert_info;
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/* CC Rp value */
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enum tc_rp_value rp;
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/* PD Rx variables */
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/* Number of RX bytes received */
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int ucpd_rx_byte_count;
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/* Buffer to hold the received bytes */
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uint8_t ucpd_rx_buffer[UCPD_BUF_LEN];
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/* GoodCRC message ID */
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int ucpd_crc_id;
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/* Flag to receive or ignore SOP Prime messages */
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bool ucpd_rx_sop_prime_enabled;
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/* Flag set to true when receiving a message */
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bool ucpd_rx_msg_active;
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/* Flag set to true when in RX BIST Mode */
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bool ucpd_rx_bist_mode;
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/* Tx message variables */
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/* Buffers to hold messages ready for transmission */
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struct ucpd_tx_desc ucpd_tx_buffers[TX_MSG_TOTAL];
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/* Current buffer being transmitted */
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struct ucpd_tx_desc *ucpd_tx_active_buffer;
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/* Request to send a transmission message */
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int ucpd_tx_request;
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/* State of the TX state machine */
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enum ucpd_state ucpd_tx_state;
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/* Transmission message ID */
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int msg_id_match;
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/* Retry count on failure to transmit a message */
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int tx_retry_count;
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/* Max number of reties before giving up */
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int tx_retry_max;
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/* GoodCRC message Header */
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struct msg_header_info msg_header;
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/* Track VCONN on/off state */
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bool ucpd_vconn_enable;
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/* Track CC line that VCONN was active on */
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enum tc_cc_polarity ucpd_vconn_cc;
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/* Dead Battery active */
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bool dead_battery_active;
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/* Timer for amount of time to wait for receiving a GoodCRC */
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struct k_timer goodcrc_rx_timer;
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};
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#endif /* ZEPHYR_DRIVERS_USBC_DEVICE_UCPD_STM32_PRIV_H_ */
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