The Atmel SAM0 SoC enable peripherals clocks in distinct places: PM and MCLK. The old devices had defined the peripheral clock enable bit at PM. On the newer devices this was extracted on a dedicated memory section called Master Clock (MCLK). This change excludes the dedicated bindings in favor of a generic approach that cover all cases. Now the clocks properties is complemented by the atmel,assigned-clocks property. It gives the liberty to user to customize the clock source from a generic clock or configure the direct connections. All peripherals drivers were reworked with the newer solution. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com> |
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| .. | ||
| arm,beetle-syscon.yaml | ||
| arm,dtcm.yaml | ||
| arm,ethos-u.yaml | ||
| arm,itcm.yaml | ||
| arm,scc.yaml | ||
| atmel,sam-ssc.yaml | ||
| atmel,sam0-id.yaml | ||
| atmel,sam0-sercom.yaml | ||
| infineon,cat1-scb.yaml | ||
| linaro,optee-tz.yaml | ||
| nordic,nrf-acl.yaml | ||
| nordic,nrf-bprot.yaml | ||
| nordic,nrf-ctrlapperi.yaml | ||
| nordic,nrf-dcnf.yaml | ||
| nordic,nrf-egu.yaml | ||
| nordic,nrf-kmu.yaml | ||
| nordic,nrf-mpu.yaml | ||
| nordic,nrf-mutex.yaml | ||
| nordic,nrf-mwu.yaml | ||
| nordic,nrf-reset.yaml | ||
| nordic,nrf-resetinfo.yaml | ||
| nordic,nrf-spu.yaml | ||
| nordic,nrf-swi.yaml | ||
| nordic,nrf-tddconf.yaml | ||
| nordic,nrf-uicr-v2.yaml | ||
| nordic,nrf-uicr.yaml | ||
| nxp,imx-dtcm.yaml | ||
| nxp,imx-epit.yaml | ||
| nxp,imx-itcm.yaml | ||
| nxp,lpc-flexcomm.yaml | ||
| nxp,mcux-xbar.yaml | ||
| nxp,nbu.yaml | ||
| nxp,rw-soc-ctrl.yaml | ||
| st,stm32-ccm.yaml | ||
| xlnx,zynq-ocm.yaml | ||