d389c95935
This commit introduces a new Kconfig option `CONFIG_SRAM_RETENTION_MODE` that allows the configuration of SRAM retention mode during the initialization phase of the firmware boot-up process. By default, the retention mode is enabled to maintain the existing behavior. However, this option provides the flexibility to disable the retention mode if needed, without modifying the Zephyr codebase. The SRAM initialization functions `hp_sram_init` and `lp_sram_init` in `sram.c` have been updated to conditionally set the retention mode based on the value of this Kconfig option. Additionally, an unused macro `DELAY_COUNT` has been removed from `sram.c` to clean up the code. Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
50 lines
1.2 KiB
C
50 lines
1.2 KiB
C
/* Copyright(c) 2021 Intel Corporation. All rights reserved.
|
|
* SPDX-License-Identifier: Apache-2.0
|
|
*/
|
|
|
|
#include <stddef.h>
|
|
#include <stdint.h>
|
|
|
|
#include <zephyr/devicetree.h>
|
|
#include <soc_util.h>
|
|
#include <zephyr/cache.h>
|
|
#include <adsp_shim.h>
|
|
#include <adsp_memory.h>
|
|
#include <cpu_init.h>
|
|
#include "manifest.h"
|
|
|
|
__imr void hp_sram_init(uint32_t memory_size)
|
|
{
|
|
ARG_UNUSED(memory_size);
|
|
|
|
uint32_t hpsram_ebb_quantity = ace_hpsram_get_bank_count();
|
|
uint32_t idx;
|
|
|
|
for (idx = 0; idx < hpsram_ebb_quantity; ++idx) {
|
|
HPSRAM_REGS(idx)->HSxPGCTL = 0;
|
|
HPSRAM_REGS(idx)->HSxRMCTL = IS_ENABLED(CONFIG_SRAM_RETENTION_MODE);
|
|
}
|
|
for (idx = 0; idx < hpsram_ebb_quantity; ++idx) {
|
|
while (HPSRAM_REGS(idx)->HSxPGISTS != 0) {
|
|
}
|
|
}
|
|
|
|
bbzero((void *)L2_SRAM_BASE, L2_SRAM_SIZE);
|
|
}
|
|
|
|
__imr void lp_sram_init(void)
|
|
{
|
|
uint32_t lpsram_ebb_quantity = ace_lpsram_get_bank_count();
|
|
uint32_t idx;
|
|
|
|
for (idx = 0; idx < lpsram_ebb_quantity; ++idx) {
|
|
LPSRAM_REGS(idx)->USxPGCTL = 0;
|
|
LPSRAM_REGS(idx)->USxRMCTL = IS_ENABLED(CONFIG_SRAM_RETENTION_MODE);
|
|
}
|
|
for (idx = 0; idx < lpsram_ebb_quantity; ++idx) {
|
|
while (LPSRAM_REGS(idx)->USxPGISTS != 0) {
|
|
}
|
|
}
|
|
|
|
bbzero((void *)LP_SRAM_BASE, LP_SRAM_SIZE);
|
|
}
|