bbe5e1e6eb
Namespaced the generated headers with `zephyr` to prevent potential conflict with other headers. Introduce a temporary Kconfig `LEGACY_GENERATED_INCLUDE_PATH` that is enabled by default. This allows the developers to continue the use of the old include paths for the time being until it is deprecated and eventually removed. The Kconfig will generate a build-time warning message, similar to the `CONFIG_TIMER_RANDOM_GENERATOR`. Updated the includes path of in-tree sources accordingly. Most of the changes here are scripted, check the PR for more info. Signed-off-by: Yong Cong Sin <ycsin@meta.com>
142 lines
3.9 KiB
C
142 lines
3.9 KiB
C
/*
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* Copyright (c) 2019 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/device.h>
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#include <zephyr/init.h>
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#include <zephyr/kernel.h>
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#include <zephyr/kernel_structs.h>
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#include <zephyr/toolchain.h>
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#include <zephyr/sys/__assert.h>
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#include <zephyr/sys/sys_io.h>
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#include <xtensa/config/core-isa.h>
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(soc_mp, CONFIG_SOC_LOG_LEVEL);
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#include <zephyr/zsr.h>
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#include <cavs-idc.h>
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#include <soc.h>
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#include <zephyr/cache.h>
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#include <adsp_shim.h>
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#include <adsp_memory.h>
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#include <cpu_init.h>
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struct cpustart_rec {
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uint32_t cpu;
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arch_cpustart_t fn;
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void *arg;
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};
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static struct cpustart_rec start_rec;
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const uint32_t *z_mp_start_cpu = &start_rec.cpu;
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char *z_mp_stack_top;
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/* Vestigial silliness: An old mechanism for core startup would embed
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* a "manifest" of code to copy to LP-SRAM at startup (vs. the tiny
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* trampoline we use here). This was constructed in the linker
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* script, and the first word would encode the number of entries. As
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* it happens, SOF still emits the code to copy this data, so it needs
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* to see this symbol point to a zero.
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*/
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uint32_t _loader_storage_manifest_start;
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/* Simple array of CPUs that are active and available for an IPI. The
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* IDC interrupt is ALSO used to bring a CPU out of reset, so we need
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* to be absolutely sure we don't try to IPI a CPU that isn't ready to
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* start, or else we'll launch it into garbage and crash the DSP.
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*/
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bool soc_cpus_active[CONFIG_MP_MAX_NUM_CPUS];
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#define NOP4 "nop; nop; nop; nop;"
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#define NOP32 NOP4 NOP4 NOP4 NOP4 NOP4 NOP4 NOP4 NOP4
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#define NOP128 NOP32 NOP32 NOP32 NOP32
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/* Tiny assembly stub for calling z_mp_entry() on the auxiliary CPUs.
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* Mask interrupts, clear the register window state and set the stack
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* pointer. This represents the minimum work required to run C code
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* safely.
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*
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* Note that alignment is absolutely required: the IDC protocol passes
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* only the upper 30 bits of the address to the second CPU.
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*/
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__asm__(".section .text.z_soc_mp_asm_entry, \"x\" \n\t"
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".align 4 \n\t"
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".global z_soc_mp_asm_entry \n\t"
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"z_soc_mp_asm_entry: \n\t"
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" movi a0, 0x4002f \n\t" /* WOE | UM | INTLEVEL(max) */
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" wsr a0, PS \n\t"
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" movi a0, 0 \n\t"
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" wsr a0, WINDOWBASE \n\t"
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" movi a0, 1 \n\t"
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" wsr a0, WINDOWSTART \n\t"
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" rsync \n\t"
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" movi a1, z_mp_start_cpu \n\t"
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" l32i a1, a1, 0 \n\t"
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" l32i a1, a1, 0 \n\t"
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" rsr a2, PRID \n\t"
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" sub a2, a2, a1 \n\t"
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" bnez a2, soc_mp_idle \n\t"
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" movi a1, z_mp_stack_top \n\t"
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" l32i a1, a1, 0 \n\t"
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" call4 z_mp_entry \n\t"
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"soc_mp_idle: \n\t"
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#ifdef CONFIG_XTENSA_WAITI_BUG
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NOP128
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" isync \n\t"
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" extw \n\t"
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#endif
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" waiti 0 \n\t" /* Power-gating is allowed, we'll exit via reset */
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" j soc_mp_idle \n\t");
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#undef NOP128
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#undef NOP32
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#undef NOP4
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static __imr void __used z_mp_entry(void)
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{
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cpu_early_init();
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/* Set up the CPU pointer. */
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_cpu_t *cpu = &_kernel.cpus[start_rec.cpu];
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__asm__ volatile("wsr %0, " ZSR_CPU_STR :: "r"(cpu));
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soc_mp_startup(start_rec.cpu);
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soc_cpus_active[start_rec.cpu] = true;
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start_rec.fn(start_rec.arg);
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__ASSERT(false, "arch_cpu_start() handler should never return");
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}
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void mp_resume_entry(void)
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{
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start_rec.fn(start_rec.arg);
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}
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bool arch_cpu_active(int cpu_num)
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{
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return soc_cpus_active[cpu_num];
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}
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void arch_cpu_start(int cpu_num, k_thread_stack_t *stack, int sz,
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arch_cpustart_t fn, void *arg)
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{
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__ASSERT_NO_MSG(!soc_cpus_active[cpu_num]);
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start_rec.cpu = cpu_num;
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start_rec.fn = fn;
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start_rec.arg = arg;
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z_mp_stack_top = K_KERNEL_STACK_BUFFER(stack) + sz;
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soc_start_core(cpu_num);
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}
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/* Fallback stub for external SOF code */
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__imr int cavs_idc_smp_init(const struct device *dev)
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{
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ARG_UNUSED(dev);
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return 0;
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}
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