zephyr/dts
Gerson Fernando Budke 0561d74d31 drivers: counter: sam: Add qdec as tc special mode
The current atmel,sam-tc-qdec sensor implementation shared the timer
counter node. This create issues when users wants define both modes.
The current proposal changes the qdec dedinition to be a child of
tc and refactor all the chain of definitions.

Fixes #71312

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2024-06-17 17:47:42 -04:00
..
arc/synopsys drivers: spi: dw: define max-xfer-size 2024-01-20 13:11:42 +01:00
arm drivers: counter: sam: Add qdec as tc special mode 2024-06-17 17:47:42 -04:00
arm64 soc: imx8mp: enable rdc for enet 2024-06-14 19:21:18 +02:00
bindings drivers: counter: sam: Add qdec as tc special mode 2024-06-17 17:47:42 -04:00
common dts: nordic: Align boards dts to new VEVIF, BELLBOARD nomenclature 2024-06-15 04:41:47 -04:00
nios2/intel dts: nios2: intel: nios2-qemu: add jtag interrupt 2023-01-27 14:24:43 -05:00
posix
riscv dts: nordic: Align boards dts to new VEVIF, BELLBOARD nomenclature 2024-06-15 04:41:47 -04:00
sparc/gaisler soc/gr716a: Enable SPIMCTRL support on LEON GR716A 2024-02-01 14:06:38 +01:00
x86/intel dts: bindings: dma: correct compatible name of Intel SEDI dma controller 2024-06-14 20:33:05 +02:00
xtensa drivers: ssp: update SSP driver to support Intel ACE30 PTL 2024-06-14 20:33:18 +02:00
binding-template.yaml doc: devicetree: overhaul bindings guide 2021-04-22 15:32:10 +02:00
Kconfig dts: drop HAS_DTS 2023-10-20 12:18:17 -07:00