Daniel DeGrasse 84b8e92445 soc: nxp: imxrt: clock imxrt1042 SOC at 528 MHz ... iMXRT1042 SOC should be clocked at 528 MHz maximum. Correct the clock setup to use the system PLL. Fixes #70755 Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>		2024-05-13 16:37:17 -04:00
..
arc/synopsys	drivers: spi: dw: define max-xfer-size	2024-01-20 13:11:42 +01:00
arm	soc: nxp: imxrt: clock imxrt1042 SOC at 528 MHz	2024-05-13 16:37:17 -04:00
arm64	drivers: mfd: add new driver "mfd_adp5585"	2024-05-08 16:09:08 -04:00
bindings	soc: nxp: imxrt: allow configuring system pll on iMXRT10xx series	2024-05-13 16:37:17 -04:00
common	dts: common: nordic: add ieee802154 node to nrf54h20 cpuapp	2024-05-13 10:21:08 +02:00
nios2/intel	dts: nios2: intel: nios2-qemu: add jtag interrupt	2023-01-27 14:24:43 -05:00
posix
riscv	ITE: soc: Add the variant of it81302dx	2024-05-13 11:39:10 +02:00
sparc/gaisler	soc/gr716a: Enable SPIMCTRL support on LEON GR716A	2024-02-01 14:06:38 +01:00
x86/intel	board: x86: add acpi hid for gpio	2024-04-22 06:50:38 -07:00
xtensa	intel_adsp: adsp_memory: update mtl memory definitions	2024-05-01 10:31:52 +02:00
binding-template.yaml
Kconfig	dts: drop HAS_DTS	2023-10-20 12:18:17 -07:00