zephyr/dts/riscv
Jakub Wasilewski 2423c87d54 boards: hifive_unleashed: add support for E51 and U54 targets
Add `hifive_unleashed//e51` (earlier selected by default, using
`hifive_unleashed`) and `hifive_unleashed//u54` targets.

Define work-area for other 4 cores in openocd.cfg

Update twister platform white/black lists, to support new targets

Signed-off-by: Jakub Wasilewski <jwasilewski@internships.antmicro.com>
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2024-11-20 10:15:03 +00:00
..
andes dts/andes: adjust the sizes of PLIC nodes 2024-10-31 14:17:02 -05:00
efinix dts: riscv: Fix incorrect plic size 2024-07-02 22:21:17 -04:00
espressif soc: esp32c6: add Wi-Fi support 2024-11-18 13:17:54 -05:00
gd dts/riscv: add riscv compatible string where it's missing 2024-01-31 10:41:49 +01:00
ite driver: spi: support it8xxx2 spi driver 2024-11-16 15:20:51 -05:00
lowrisc dts: opentitan: update plic interrupt count to match spec 2024-03-22 09:23:46 +00:00
microchip dts: mbox: add PolarFire SoC mailbox interface 2024-02-01 04:33:16 -05:00
niosv dts/riscv: add riscv compatible string where it's missing 2024-01-31 10:41:49 +01:00
nordic soc: nordic: Remove the nRF54L15 EngA 2024-10-21 01:46:39 +01:00
openisa soc/openisa: enable the C extension 2024-07-03 15:06:14 -04:00
qemu dts: set the riscv,isa property for virt-based targets 2024-05-15 09:30:23 +02:00
sensry board: sensry: Add support for sy1xx 2024-09-16 20:19:31 +02:00
sifive boards: hifive_unleashed: add support for E51 and U54 targets 2024-11-20 10:15:03 +00:00
starfive dts: jh7110: fix memory definitions 2024-04-09 14:20:39 +02:00
telink drivers: intc: plic: define all registers' offset in the driver 2023-10-04 09:06:28 -04:00
neorv32.dtsi dts/riscv: add riscv compatible string where it's missing 2024-01-31 10:41:49 +01:00
renode_riscv32_virt.dtsi dts: riscv: add a SoC dtsi for Renode RISC-V Virt SoC 2024-01-08 12:35:10 +01:00
riscv32-litex-vexriscv.dtsi drivers: watchdog: litex: add litex watchdog 2024-08-19 10:02:01 -04:00