2f800cea8f
Removes re-defining some Kconfigs that are already defined e.g. in arch Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
112 lines
2.1 KiB
Text
112 lines
2.1 KiB
Text
# Copyright 2024 NXP
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# SPDX-License-Identifier: Apache-2.0
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if SOC_MIMXRT595S_CM33
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config FLEXSPI_CONFIG_BLOCK_OFFSET
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default 0x400
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config CODE_DATA_RELOCATION_SRAM
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default y if FLASH_MCUX_FLEXSPI_XIP
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config ROM_START_OFFSET
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default 0x1200 if NXP_IMXRT_BOOT_HEADER
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# The PVT Sensor uses IRQ #75. For more details, see
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# https://www.nxp.com/design/design-center/software/embedded-software/application-software-packs/application-software-pack-dynamic-voltage-scaling-using-pvt-sensor:APP-SW-PACK-DVS-PVT-SENSOR
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config NUM_IRQS
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default 76
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config ZTEST_NO_YIELD
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default y if (PM && ZTEST)
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config MBEDTLS
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default y if CSPRNG_ENABLED
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depends on ENTROPY_GENERATOR
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if MBEDTLS
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#
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# MBEDTLS CTR_DRBG code path needs extra stack space for initialization than
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# what the ztest_thread_stack defaults to.
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#
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config TEST_EXTRA_STACK_SIZE
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default 1024
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endif # MBEDTLS
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if MCUX_OS_TIMER
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default 1000000
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endif # MCUX_OS_TIMER
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if CORTEX_M_SYSTICK
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default 250105263
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endif # CORTEX_M_SYSTICK
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if PM_DEVICE
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# Enable the MEMC FlexSPI driver when using device power
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# management so we can reconfigure the FlexSPI pins to
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# save power. The MEMC FlexSPI driver is enabled when we
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# enable the Flash subsystem, however we would like to
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# reconfigure the FlexSPI pins even when the Flash driver
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# is disabled, hence MEMC is selected when PM_DEVICE
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# is turned on.
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config MEMC
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default y
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select MEMC_MCUX_FLEXSPI
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endif
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endif # SOC_MIMXRT595S_CM33
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if SOC_MIMXRT595S_F1
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config SMP
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default n
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config XTENSA_TIMER
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default y
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config KERNEL_ENTRY
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default "__start"
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config MULTI_LEVEL_INTERRUPTS
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default n
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config 2ND_LEVEL_INTERRUPTS
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default n
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# To prevent test uses TEST_LOGGING_MINIMAL
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config TEST_LOGGING_DEFAULTS
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default n
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depends on TEST
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default 198000000
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config XTENSA_CCOUNT_HZ
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default SYS_CLOCK_HW_CYCLES_PER_SEC
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config SYS_CLOCK_TICKS_PER_SEC
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default 1000
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config DYNAMIC_INTERRUPTS
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default n
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config CACHE
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default n
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config DCACHE
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default n
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config CACHE_MANAGEMENT
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default n
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config LOG
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default n
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endif # SOC_MIMXRT595S_F1
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