5c0275df27
Update the GPIO driver to use PDL API instead of HAL API to fix the issue with configuring interrupts on both edges Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
266 lines
8.1 KiB
C
266 lines
8.1 KiB
C
/*
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* Copyright (c) 2022 Cypress Semiconductor Corporation (an Infineon company) or
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* an affiliate of Cypress Semiconductor Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @brief GPIO driver for Infineon CAT1 MCU family.
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*
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* Note:
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* - Trigger detection on pin rising or falling edge (GPIO_INT_TRIG_BOTH)
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* is not supported in current version of GPIO CAT1 driver.
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*/
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#define DT_DRV_COMPAT infineon_cat1_gpio
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#include <zephyr/drivers/gpio.h>
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#include <zephyr/drivers/gpio/gpio_utils.h>
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#include <zephyr/irq.h>
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#include <cy_gpio.h>
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(gpio_cat1, CONFIG_GPIO_LOG_LEVEL);
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/* Device config structure */
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struct gpio_cat1_config {
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/* gpio_driver_config needs to be first */
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struct gpio_driver_config common;
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GPIO_PRT_Type *regs;
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uint8_t ngpios;
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uint8_t intr_priority;
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};
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/* Data structure */
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struct gpio_cat1_data {
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/* gpio_driver_data needs to be first */
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struct gpio_driver_data common;
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/* device's owner of this data */
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const struct device *dev;
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/* callbacks list */
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sys_slist_t callbacks;
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};
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static int gpio_cat1_configure(const struct device *dev, gpio_pin_t pin, gpio_flags_t flags)
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{
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uint32_t drive_mode = CY_GPIO_DM_HIGHZ;
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bool pin_val = false;
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const struct gpio_cat1_config *const cfg = dev->config;
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GPIO_PRT_Type *const base = cfg->regs;
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switch (flags & (GPIO_INPUT | GPIO_OUTPUT | GPIO_DISCONNECTED)) {
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case GPIO_INPUT:
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if ((flags & GPIO_PULL_UP) && (flags & GPIO_PULL_DOWN)) {
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drive_mode = CY_GPIO_DM_PULLUP_DOWN;
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} else if (flags & GPIO_PULL_UP) {
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drive_mode = CY_GPIO_DM_PULLUP;
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pin_val = true;
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} else if (flags & GPIO_PULL_DOWN) {
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drive_mode = CY_GPIO_DM_PULLDOWN;
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} else {
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drive_mode = CY_GPIO_DM_HIGHZ;
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}
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break;
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case GPIO_OUTPUT:
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if (flags & GPIO_SINGLE_ENDED) {
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if (flags & GPIO_LINE_OPEN_DRAIN) {
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drive_mode = CY_GPIO_DM_OD_DRIVESLOW;
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pin_val = true;
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} else {
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drive_mode = CY_GPIO_DM_OD_DRIVESHIGH;
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pin_val = false;
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}
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} else {
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drive_mode = CY_GPIO_DM_STRONG;
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pin_val = (flags & GPIO_OUTPUT_INIT_HIGH) ? true : false;
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}
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break;
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case GPIO_DISCONNECTED:
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Cy_GPIO_SetInterruptMask(base, pin, 0);
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drive_mode = CY_GPIO_DM_ANALOG;
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pin_val = false;
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break;
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default:
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return -ENOTSUP;
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}
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Cy_GPIO_Pin_FastInit(base, pin, drive_mode, pin_val, HSIOM_SEL_GPIO);
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return 0;
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}
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static int gpio_cat1_port_get_raw(const struct device *dev,
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uint32_t *value)
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{
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const struct gpio_cat1_config *const cfg = dev->config;
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GPIO_PRT_Type *const base = cfg->regs;
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*value = GPIO_PRT_IN(base);
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return 0;
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}
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static int gpio_cat1_port_set_masked_raw(const struct device *dev,
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uint32_t mask, uint32_t value)
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{
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const struct gpio_cat1_config *const cfg = dev->config;
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GPIO_PRT_Type *const base = cfg->regs;
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GPIO_PRT_OUT(base) = (GPIO_PRT_OUT(base) & ~mask) | (mask & value);
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return 0;
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}
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static int gpio_cat1_port_set_bits_raw(const struct device *dev,
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uint32_t mask)
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{
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const struct gpio_cat1_config *const cfg = dev->config;
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GPIO_PRT_Type *const base = cfg->regs;
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GPIO_PRT_OUT_SET(base) = mask;
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return 0;
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}
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static int gpio_cat1_port_clear_bits_raw(const struct device *dev,
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uint32_t mask)
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{
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const struct gpio_cat1_config *const cfg = dev->config;
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GPIO_PRT_Type *const base = cfg->regs;
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GPIO_PRT_OUT_CLR(base) = mask;
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return 0;
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}
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static int gpio_cat1_port_toggle_bits(const struct device *dev,
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uint32_t mask)
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{
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const struct gpio_cat1_config *const cfg = dev->config;
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GPIO_PRT_Type *const base = cfg->regs;
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GPIO_PRT_OUT_INV(base) = mask;
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return 0;
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}
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static uint32_t gpio_cat1_get_pending_int(const struct device *dev)
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{
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const struct gpio_cat1_config *const cfg = dev->config;
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GPIO_PRT_Type *const base = cfg->regs;
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return GPIO_PRT_INTR_MASKED(base);
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}
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static void gpio_isr_handler(const struct device *dev)
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{
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const struct gpio_cat1_config *const cfg = dev->config;
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GPIO_PRT_Type *const base = cfg->regs;
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uint32_t pins = GPIO_PRT_INTR_MASKED(base);
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for (uint8_t i = 0; i < CY_GPIO_PINS_MAX; i++) {
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Cy_GPIO_ClearInterrupt(base, i);
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}
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if (dev) {
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gpio_fire_callbacks(&((struct gpio_cat1_data *const)(dev)->data)->callbacks, dev,
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pins);
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}
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}
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static int gpio_cat1_pin_interrupt_configure(const struct device *dev, gpio_pin_t pin,
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enum gpio_int_mode mode, enum gpio_int_trig trig)
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{
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uint32_t trig_pdl = CY_GPIO_INTR_DISABLE;
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const struct gpio_cat1_config *const cfg = dev->config;
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GPIO_PRT_Type *const base = cfg->regs;
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/* Level interrupts (GPIO_INT_MODE_LEVEL) is not supported */
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if (mode == GPIO_INT_MODE_LEVEL) {
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return -ENOTSUP;
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}
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switch (trig) {
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case GPIO_INT_TRIG_LOW:
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trig_pdl = CY_GPIO_INTR_FALLING;
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break;
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case GPIO_INT_TRIG_HIGH:
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trig_pdl = CY_GPIO_INTR_RISING;
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break;
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case GPIO_INT_TRIG_BOTH:
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trig_pdl = CY_GPIO_INTR_BOTH;
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break;
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default:
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return -ENOTSUP;
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}
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Cy_GPIO_SetInterruptEdge(base, pin, trig_pdl);
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Cy_GPIO_SetInterruptMask(base, pin,
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(uint32_t)(mode == GPIO_INT_MODE_DISABLED) ? false : true);
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return 0;
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}
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static int gpio_cat1_manage_callback(const struct device *port,
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struct gpio_callback *callback,
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bool set)
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{
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return gpio_manage_callback(&((struct gpio_cat1_data *const)(port)->data)->callbacks,
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callback, set);
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}
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static const struct gpio_driver_api gpio_cat1_api = {
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.pin_configure = gpio_cat1_configure,
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.port_get_raw = gpio_cat1_port_get_raw,
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.port_set_masked_raw = gpio_cat1_port_set_masked_raw,
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.port_set_bits_raw = gpio_cat1_port_set_bits_raw,
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.port_clear_bits_raw = gpio_cat1_port_clear_bits_raw,
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.port_toggle_bits = gpio_cat1_port_toggle_bits,
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.pin_interrupt_configure = gpio_cat1_pin_interrupt_configure,
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.manage_callback = gpio_cat1_manage_callback,
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.get_pending_int = gpio_cat1_get_pending_int,
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};
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#define GPIO_CAT1_INIT_FUNC(n) \
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static int gpio_cat1##n##_init(const struct device *dev) \
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{ \
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IRQ_CONNECT(DT_INST_IRQN(n), DT_INST_IRQ(n, priority), gpio_isr_handler, \
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DEVICE_DT_INST_GET(n), 0); \
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irq_enable(DT_INST_IRQN(n)); \
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\
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return 0; \
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}
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#define GPIO_CAT1_INIT(n) \
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\
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static const struct gpio_cat1_config _cat1_gpio##n##_config = { \
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.common = \
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{ \
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.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(n), \
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}, \
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.intr_priority = DT_INST_IRQ_BY_IDX(n, 0, priority), \
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.ngpios = DT_INST_PROP(n, ngpios), \
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.regs = (GPIO_PRT_Type *)DT_INST_REG_ADDR(n), \
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}; \
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\
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static struct gpio_cat1_data _cat1_gpio##n##_data; \
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\
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GPIO_CAT1_INIT_FUNC(n) \
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\
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DEVICE_DT_INST_DEFINE(n, gpio_cat1##n##_init, NULL, &_cat1_gpio##n##_data, \
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&_cat1_gpio##n##_config, POST_KERNEL, \
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE, &gpio_cat1_api);
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DT_INST_FOREACH_STATUS_OKAY(GPIO_CAT1_INIT)
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