Laurentiu Mihalcea 3651725316 dts: xtensa: nxp_imx8: add edma power domains ... Add power domains for EDMA0's channels 6, 7, 14, and 15. For QM these are identified as IMX_SC_R_DMA_2_*, while for QXP thy are identified as IMX_SC_R_DMA_0_*. Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>		2024-12-13 20:05:00 +01:00
..
arc/synopsys	drivers: spi: dw: define max-xfer-size	2024-01-20 13:11:42 +01:00
arm	dts: arm: rpi_pico: remove default startup-delay-multiplier from .dtsi	2024-12-13 11:34:14 +01:00
arm64	dts: bindings: rename nxp,kinetis-lpuart compatible	2024-12-11 08:00:30 +01:00
bindings	drivers: input: cap12xx, support 3 to 8 channels	2024-12-13 17:44:35 +01:00
common	dts: common: nordic: nrf54l20: set timer frequency to 64MHz	2024-12-13 20:04:51 +01:00
nios2/intel	dts: nios2: intel: Fix unit and first address mismatch	2024-09-18 15:30:24 +02:00
posix
riscv	dts: esp32: fix sram0 start address for esp32c2 and esp32c3	2024-12-12 19:59:44 +01:00
sparc/gaisler	soc/gr716a: Enable GPIO support on LEON GR716A	2024-07-29 14:27:15 +02:00
x86/intel	dts/x86: use proper unit-address values	2024-11-18 13:18:53 -05:00
xtensa	dts: xtensa: nxp_imx8: add edma power domains	2024-12-13 20:05:00 +01:00
binding-template.yaml
Kconfig	dts: drop HAS_DTS	2023-10-20 12:18:17 -07:00