Dmitrii Golovanov 9c7288e86e arch: common: timing: Fix timing cycles 32bit rollover ... Fix `arch_timing_cycles_get()` to prevent overflow on 32bit cycles rollover. Also make `arch_timing_counter_get()` to work 64bit when `CONFIG_TIMER_HAS_64BIT_CYCLE_COUNTER` is set. The issue was observable, for example when `tests/benchmarks/wait_queues` or `tests/benchmarks/sched_queues` were executed on qemu for `mps2/an385` and the benchmark has its iterations large enough as the default BENCHMARK_NUM_ITERATIONS=1000. Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>		2025-01-17 20:07:16 +01:00
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include	arch: common: irq: relocate internal functions into a private header	2023-11-09 11:20:42 +01:00
CMakeLists.txt	arch: common: be able to use ROM_START_OFFSET on RISCV	2025-01-17 09:07:45 +01:00
dynamic_isr.c	arch: common: guard the compilation of sw_isr_common with CMakeLists.txt	2023-11-09 11:20:42 +01:00
fill_with_zeros.ld
isr_tables.c	everywhere: replace #if IS_ENABLED() as per docs	2024-06-28 07:20:32 -04:00
isr_tables_shell.c	arch: common: isr_tables: add shell command	2024-08-12 10:10:57 +02:00
Kconfig	arm: mpu: Unify ARM_MPU kconfig definitions	2025-01-09 11:55:22 +01:00
multilevel_irq.c	arch: multilevel_irq: fix interrupt bits check	2024-09-06 14:06:23 -05:00
multilevel_irq_legacy.c	arch: sw_isr: revamp multi-level interrupt architecture	2024-05-25 11:24:32 +03:00
nocache.ld	Revert "arch: common: Add user can specify the nocache location"	2024-10-04 22:52:31 +01:00
ramfunc.ld	arch: common: fix copy for ramfunc region during XIP init	2024-11-06 10:19:08 -08:00
rom_start_address.ld
rom_start_offset.ld
semihost.c
shared_irq.c	arch: Fix assert logic for installing shared interrupt	2024-09-11 07:41:20 -04:00
sw_isr_common.c	arch: common: sw_isr: make sure that the table index is within range	2023-12-08 08:40:41 -05:00
timing.c	arch: common: timing: Fix timing cycles 32bit rollover	2025-01-17 20:07:16 +01:00