Sylvio Alves 1681c7e317 soc: esp32: fix appcpu register access ... Build is failing due to wrong calls to appcpu stall and clock gating. This fixes it by using proper registers. Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>		2024-12-25 03:37:39 +01:00
..
common	soc: espressif: Rename common/psram.c	2024-12-16 20:49:10 +01:00
esp32	soc: esp32: fix appcpu register access	2024-12-25 03:37:39 +01:00
esp32c2	soc: esp32: change SRAM1_IRAM_START macro definition	2024-12-12 19:59:44 +01:00
esp32c3	soc: esp32: change SRAM1_IRAM_START macro definition	2024-12-12 19:59:44 +01:00
esp32c6	soc: esp32: replace hard-coded addresses and sizes by DT macros	2024-12-07 11:02:46 +01:00
esp32s2	soc: esp32: replace hard-coded addresses and sizes by DT macros	2024-12-07 11:02:46 +01:00
esp32s3	soc: esp32s3: Fix WiFi allocation to SPIRAM	2024-12-16 20:49:10 +01:00
CMakeLists.txt
Kconfig	soc: esp32xx: refactor clock and RTC subsystems	2024-05-27 01:37:18 -07:00
Kconfig.defconfig
Kconfig.soc
Kconfig.sysbuild	soc: espressif: Default MCUboot mode for ESP32 family	2024-09-16 20:17:44 +02:00
soc.yml	soc: esp32c2: Add support to ESP32C2 and ESP8684	2024-08-16 14:08:22 -04:00