acda9bf9ce
We need to do a few things differently if we are to support a virtual memory map, i.e. CONFIG_MMU where CONFIG_KERNEL_VM_BASE is not the same as CONFIG_SRAM_BASE_ADDRESS. - All sections must be specified with a VMA and LMA, where VMA is the virtual address and LMA is the physical memory location. - All sections must be specified with ALIGN_WITH_INPUT to keep VMAs and LMAs synchronized To do this, the existing linker macros need some adjustment: - GROUP_LINK_IN undefined when CONFIG_KERNEL_VM_BASE is not the same as CONFIG_SRAM_BASE_ADDRESS. - New macro GROUP_ROM_LINK_IN for text/rodata sections - New macro GROUP_NOLOAD_LINK_IN for bss/noinit sections - Implicit ALIGN_WITH_INPUT for all sections GROUP_FOLLOWS_AT is unused anywhere in the kernel for years now and has been removed. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com> Signed-off-by: Daniel Leung <daniel.leung@intel.com>
79 lines
2 KiB
Text
79 lines
2 KiB
Text
/*
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* Copyright (c) 2019 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* Copied from linker.ld */
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#ifdef CONFIG_ARM
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SECTION_DATA_PROLOGUE(_GCOV_BSS_SECTION_NAME,(NOLOAD),)
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{
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#ifdef CONFIG_USERSPACE
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MPU_ALIGN(__gcov_bss_end - __gcov_bss_start );
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#else /* CONFIG_MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT && CONFIG_USERSPACE */
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. = ALIGN(_region_min_align);
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#endif /* CONFIG_USERSPACE */
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__gcov_bss_start = .;
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KEEP(*(".bss.__gcov0.*"));
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#ifdef CONFIG_USERSPACE
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MPU_ALIGN(__gcov_bss_end - __gcov_bss_start );
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#else /* CONFIG_USERSPACE */
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. = ALIGN(_region_min_align);
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#endif /* CONFIG_USERSPACE */
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__gcov_bss_end = .;
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} GROUP_NOLOAD_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
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__gcov_bss_num_words = ((__gcov_bss_end - __gcov_bss_start) >> 2);
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__gcov_bss_size = __gcov_bss_end - __gcov_bss_start;
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#endif
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#ifdef CONFIG_X86_64
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SECTION_PROLOGUE(_GCOV_BSS_SECTION_NAME, (NOLOAD), ALIGN(16))
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{
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MMU_PAGE_ALIGN
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__gcov_bss_start = .;
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*(".bss.__gcov0.*");
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. = ALIGN(8);
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MMU_PAGE_ALIGN
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__gcov_bss_end = .;
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}GROUP_DATA_LINK_IN(RAMABLE_REGION, RAMABLE_REGION)
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__gcov_bss_num_words = ((__gcov_bss_end - __gcov_bss_start) >> 2);
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__gcov_bss_size = __gcov_bss_end - __gcov_bss_start;
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#elif CONFIG_X86
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SECTION_PROLOGUE(_GCOV_BSS_SECTION_NAME, (NOLOAD),)
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{
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MMU_PAGE_ALIGN
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__gcov_bss_start = .;
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*(".bss.__gcov0.*");
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. = ALIGN(4);
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MMU_PAGE_ALIGN
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__gcov_bss_end = .;
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} GROUP_NOLOAD_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
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__gcov_bss_num_words = ((__gcov_bss_end - __gcov_bss_start) >> 2);
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__gcov_bss_size = __gcov_bss_end - __gcov_bss_start;
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#endif
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#ifdef CONFIG_ARC
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SECTION_PROLOGUE(_GCOV_BSS_SECTION_NAME, (NOLOAD),)
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{
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MPU_MIN_SIZE_ALIGN
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__gcov_bss_start = .;
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*(".bss.__gcov0.*");
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#ifdef CONFIG_USERSPACE
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. = ALIGN(1 << LOG2CEIL(. - __gcov_bss_start));
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#else
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MPU_MIN_SIZE_ALIGN
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#endif
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__gcov_bss_end = .;
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} GROUP_NOLOAD_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
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__gcov_bss_num_words = ((__gcov_bss_end - __gcov_bss_start) >> 2);
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__gcov_bss_size = __gcov_bss_end - __gcov_bss_start;
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#endif
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