zephyr/dts
Flavio Ceolin 301055dec0 intel-adsp/ace: pm: Only core 0 can d0i3
Secondary cores are not allowed to be power gated on
runtime-idle. They have to explicitely set off by host command.

Remove this state from secondary CPUs so power management logic
does not need workarounds to enforce this behavior.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2024-05-24 09:53:04 -05:00
..
arc/synopsys drivers: spi: dw: define max-xfer-size 2024-01-20 13:11:42 +01:00
arm dts: stm32h7_dualcore: Add MBOX driver 2024-05-24 07:52:06 -04:00
arm64 broadcom/bcm2712: Fix UART DT 2024-05-16 14:27:21 +02:00
bindings dts: bindings: ipm: Add dummy mbox-cells property 2024-05-24 07:52:06 -04:00
common boards: nrf54h20dk: Add SUIT storage definition 2024-05-24 07:49:42 -04:00
nios2/intel
posix
riscv dts: set the riscv,isa property for virt-based targets 2024-05-15 09:30:23 +02:00
sparc/gaisler soc/gr716a: Enable SPIMCTRL support on LEON GR716A 2024-02-01 14:06:38 +01:00
x86/intel board: x86: add acpi hid for gpio 2024-04-22 06:50:38 -07:00
xtensa intel-adsp/ace: pm: Only core 0 can d0i3 2024-05-24 09:53:04 -05:00
binding-template.yaml
Kconfig dts: drop HAS_DTS 2023-10-20 12:18:17 -07:00