zephyr/dts/riscv
Fabio Baltieri b716b0672d dts: ite: refactor the it8801 template hierarchy
The it8801 template is helpful but in the current state it does not
allow changing the device address as that is in the template itself. Fix
that by moving the template content down a level in the hierarchy, so
that it extends the mfd device itself rather than than instantiate it,
then the base instance can have any address, now the only limitation is
that only one instance is possible, but that is probably alright for
now.

Alternatives would be to use a define for the address, or even a
template per address, but this feels like a better compromise for now.
This may also use
https://github.com/zephyrproject-rtos/zephyr/pull/82825 in the future if
that ever becomes a thing.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2024-12-31 19:45:49 +01:00
..
andes dts/andes: adjust the sizes of PLIC nodes 2024-10-31 14:17:02 -05:00
efinix dts: riscv: Fix incorrect plic size 2024-07-02 22:21:17 -04:00
espressif soc: esp32c6: Add GP timers support 2024-12-21 05:52:20 +01:00
gd dts/riscv: add riscv compatible string where it's missing 2024-01-31 10:41:49 +01:00
ite dts: ite: refactor the it8801 template hierarchy 2024-12-31 19:45:49 +01:00
lowrisc dts: opentitan: update plic interrupt count to match spec 2024-03-22 09:23:46 +00:00
microchip dts: mbox: add PolarFire SoC mailbox interface 2024-02-01 04:33:16 -05:00
niosv dts/riscv: add riscv compatible string where it's missing 2024-01-31 10:41:49 +01:00
nordic soc: nordic: Introduce the nRF54L05 and nRF54L10 2024-11-21 09:26:38 +01:00
openisa soc/openisa: enable the C extension 2024-07-03 15:06:14 -04:00
qemu arch: riscv64: smp: get msip base address from dts 2024-11-27 06:58:57 -05:00
sensry board: sensry: Add support for sy1xx 2024-09-16 20:19:31 +02:00
sifive boards: hifive_unmatched: add support for S7 and U74 targets 2024-11-20 10:15:03 +00:00
starfive dts: jh7110: fix memory definitions 2024-04-09 14:20:39 +02:00
telink drivers: intc: plic: define all registers' offset in the driver 2023-10-04 09:06:28 -04:00
wch drivers: add the ch32v00x clock controller 2024-11-26 14:41:46 +00:00
neorv32.dtsi dts/riscv: add riscv compatible string where it's missing 2024-01-31 10:41:49 +01:00
renode_riscv32_virt.dtsi dts: riscv: add a SoC dtsi for Renode RISC-V Virt SoC 2024-01-08 12:35:10 +01:00
riscv32-litex-vexriscv.dtsi drivers: watchdog: litex: add litex watchdog 2024-08-19 10:02:01 -04:00