zephyr/soc/nordic/common/vpr/Kconfig
Marcio Ribeiro cb583995b8 arch: riscv: imply XIP config pushed to SoC level
'imply XIP' pushed from arch/Kconfig/'config RISCV' to riscv SoCs Kconfig
files to allow riscv SoCs having XIP enabled (or not) at SoC level

Signed-off-by: Marcio Ribeiro <marcio.ribeiro@espressif.com>
2024-08-31 06:47:52 -04:00

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# Copyright (c) 2024 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
config RISCV_CORE_NORDIC_VPR
bool "RISC-V Nordic VPR core"
default y
depends on DT_HAS_NORDIC_VPR_ENABLED
select ATOMIC_OPERATIONS_C
select RISCV
select RISCV_PRIVILEGED
select RISCV_VECTORED_MODE
select RISCV_ISA_RV32E
select RISCV_ISA_EXT_M
select RISCV_ISA_EXT_C
select RISCV_ISA_EXT_ZICSR
select RISCV_SOC_HAS_ISR_STACKING
select RISCV_HAS_CLIC
select RISCV_SOC_CONTEXT_SAVE
select HAS_FLASH_LOAD_OFFSET
select ARCH_HAS_CUSTOM_CPU_IDLE
select ARCH_HAS_CUSTOM_CPU_ATOMIC_IDLE
select INCLUDE_RESET_VECTOR
imply XIP
help
Enable support for the RISC-V Nordic VPR core.