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zephyr/dts/arm/renesas/ra/ra6/ra6-cm4-common.dtsi
Khoa Nguyen e20e0c8c1b dts: arm: renesas: Add Flash HP support for Renesas RA6, RA4 
- Add Flash HP support for ra6-cm4, ra6-cm33, ra4-cm33 (except
r7fa4w1ad2cng)
- Add config to set the minimal size of data which can be written
for RA4E2, RA4M2, RA4M3, RA6E1, RA6E2, RA6M1, RA6M2, RA6M3, RA6M4,
RA6M5

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
Signed-off-by: Phi Tran <phi.tran.jg@bp.renesas.com>
2025-01-08 17:02:36 +01:00

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/*
* Copyright (c) 2024 Renesas Electronics Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <mem.h>
#include <arm/armv7-m.dtsi>
#include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-ra.h>
#include <zephyr/dt-bindings/clock/ra_clock.h>
#include <zephyr/dt-bindings/pwm/ra_pwm.h>
#include <freq.h>
/ {
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-m4";
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
mpu: mpu@e000ed90 {
compatible = "arm,armv7m-mpu";
reg = <0xe000ed90 0x40>;
};
};
};
soc {
system: system@4001e000 {
compatible = "renesas,ra-system";
reg = <0x4001e000 0x1000>;
status = "okay";
};
ioport0: gpio@40040000 {
compatible = "renesas,ra-gpio-ioport";
reg = <0x40040000 0x20>;
port = <0>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <16>;
status = "disabled";
};
ioport1: gpio@40040020 {
compatible = "renesas,ra-gpio-ioport";
reg = <0x40040020 0x20>;
port = <1>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <16>;
status = "disabled";
};
ioport2: gpio@40040040 {
compatible = "renesas,ra-gpio-ioport";
reg = <0x40040040 0x20>;
port = <2>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <16>;
status = "disabled";
};
ioport3: gpio@40040060 {
compatible = "renesas,ra-gpio-ioport";
reg = <0x40040060 0x20>;
port = <3>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <16>;
status = "disabled";
};
ioport4: gpio@40040080 {
compatible = "renesas,ra-gpio-ioport";
reg = <0x40040080 0x20>;
port = <4>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <16>;
status = "disabled";
};
ioport5: gpio@400400a0 {
compatible = "renesas,ra-gpio-ioport";
reg = <0x400400a0 0x20>;
port = <5>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <16>;
status = "disabled";
};
ioport6: gpio@400400c0 {
compatible = "renesas,ra-gpio-ioport";
reg = <0x400400c0 0x20>;
port = <6>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <16>;
status = "disabled";
};
ioport7: gpio@400400e0 {
compatible = "renesas,ra-gpio-ioport";
reg = <0x400400e0 0x20>;
port = <7>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <16>;
status = "disabled";
};
pinctrl: pin-contrller@40040800 {
compatible = "renesas,ra-pinctrl-pfs";
reg = <0x40040800 0x3c0>;
status = "okay";
};
sci0: sci0@40070000 {
compatible = "renesas,ra-sci";
interrupts = <0 1>, <1 1>, <2 1>, <3 1>;
interrupt-names = "rxi", "txi", "tei", "eri";
reg = <0x40070000 0x20>;
clocks = <&pclka MSTPB 31>;
status = "disabled";
uart {
compatible = "renesas,ra-sci-uart";
channel = <0>;
status = "disabled";
};
};
sci1: sci1@40070020 {
compatible = "renesas,ra-sci";
interrupts = <4 1>, <5 1>, <6 1>, <7 1>;
interrupt-names = "rxi", "txi", "tei", "eri";
reg = <0x40070020 0x20>;
clocks = <&pclka MSTPB 30>;
status = "disabled";
uart {
compatible = "renesas,ra-sci-uart";
channel = <1>;
status = "disabled";
};
};
sci2: sci2@40070040 {
compatible = "renesas,ra-sci";
interrupts = <8 1>, <9 1>, <10 1>, <11 1>;
interrupt-names = "rxi", "txi", "tei", "eri";
reg = <0x40070040 0x20>;
clocks = <&pclka MSTPB 29>;
status = "disabled";
uart {
compatible = "renesas,ra-sci-uart";
channel = <2>;
status = "disabled";
};
};
sci3: sci3@40070060 {
compatible = "renesas,ra-sci";
interrupts = <12 1>, <13 1>, <14 1>, <15 1>;
interrupt-names = "rxi", "txi", "tei", "eri";
reg = <0x40070060 0x20>;
clocks = <&pclka MSTPB 27>;
status = "disabled";
uart {
compatible = "renesas,ra-sci-uart";
channel = <3>;
status = "disabled";
};
};
sci4: sci4@40070080 {
compatible = "renesas,ra-sci";
interrupts = <16 1>, <17 1>, <18 1>, <19 1>;
interrupt-names = "rxi", "txi", "tei", "eri";
reg = <0x40070080 0x20>;
clocks = <&pclka MSTPB 26>;
status = "disabled";
uart {
compatible = "renesas,ra-sci-uart";
channel = <4>;
status = "disabled";
};
};
sci8: sci8@40070100 {
compatible = "renesas,ra-sci";
interrupts = <32 1>, <33 1>, <34 1>, <35 1>;
interrupt-names = "rxi", "txi", "tei", "eri";
reg = <0x40070100 0x20>;
clocks = <&pclka MSTPB 23>;
status = "disabled";
uart {
compatible = "renesas,ra-sci-uart";
channel = <8>;
status = "disabled";
};
};
sci9: sci9@40070120 {
compatible = "renesas,ra-sci";
interrupts = <36 1>, <37 1>, <38 1>, <39 1>;
interrupt-names = "rxi", "txi", "tei", "eri";
reg = <0x40070120 0x20>;
clocks = <&pclka MSTPB 22>;
status = "disabled";
uart {
compatible = "renesas,ra-sci-uart";
channel = <9>;
status = "disabled";
};
};
iic0: iic0@40053000 {
compatible = "renesas,ra-iic";
channel = <0>;
reg = <0x40053000 0x100>;
status = "disabled";
};
iic1: iic1@40053100 {
compatible = "renesas,ra-iic";
channel = <1>;
reg = <0x40053100 0x100>;
status = "disabled";
};
spi0: spi@40072000 {
compatible = "renesas,ra-spi";
#address-cells = <1>;
#size-cells = <0>;
channel = <0>;
interrupts = <40 1>, <41 1>, <42 1>, <43 1>;
interrupt-names = "rxi", "txi", "tei", "eri";
reg = <0x40072000 0x100>;
status = "disabled";
};
spi1: spi@40072100 {
compatible = "renesas,ra-spi";
#address-cells = <1>;
#size-cells = <0>;
channel = <1>;
interrupts = <44 1>, <45 1>, <46 1>, <47 1>;
interrupt-names = "rxi", "txi", "tei", "eri";
reg = <0x40072100 0x100>;
status = "disabled";
};
agt0: agt@40084000 {
compatible = "renesas,ra-agt";
channel = <0>;
reg = <0x40084000 0x100>;
renesas,count-source = "AGT_CLOCK_LOCO";
renesas,prescaler = <0>;
renesas,resolution = <16>;
status = "disabled";
counter {
compatible = "renesas,ra-agt-counter";
status = "disabled";
};
};
agt1: agt@40084100 {
compatible = "renesas,ra-agt";
channel = <1>;
reg = <0x40084100 0x100>;
renesas,count-source = "AGT_CLOCK_LOCO";
renesas,prescaler = <0>;
renesas,resolution = <16>;
status = "disabled";
counter {
compatible = "renesas,ra-agt-counter";
status = "disabled";
};
};
adc0: adc@4005c000 {
compatible = "renesas,ra-adc";
interrupts = <40 1>;
interrupt-names = "scanend";
reg = <0x4005c000 0x100>;
#io-channel-cells = <1>;
vref-mv = <3300>;
status = "disabled";
};
adc1: adc@4005c200 {
compatible = "renesas,ra-adc";
interrupts = <41 1>;
interrupt-names = "scanend";
reg = <0x4005c200 0x100>;
#io-channel-cells = <1>;
vref-mv = <3300>;
status = "disabled";
};
id_code: id_code@100a150 {
compatible = "zephyr,memory-region";
reg = <0x0100a150 0x10>;
zephyr,memory-region = "ID_CODE";
status = "okay";
};
port_irq0: external-interrupt@40006000 {
compatible = "renesas,ra-external-interrupt";
reg = <0x40006000 0x1>;
channel = <0>;
renesas,sample-clock-div = <64>;
#port-irq-cells = <0>;
status = "disabled";
};
port_irq1: external-interrupt@40006001 {
compatible = "renesas,ra-external-interrupt";
reg = <0x40006001 0x1>;
channel = <1>;
renesas,sample-clock-div = <64>;
#port-irq-cells = <0>;
status = "disabled";
};
port_irq2: external-interrupt@40006002 {
compatible = "renesas,ra-external-interrupt";
reg = <0x40006002 0x1>;
channel = <2>;
renesas,sample-clock-div = <64>;
#port-irq-cells = <0>;
status = "disabled";
};
port_irq3: external-interrupt@40006003 {
compatible = "renesas,ra-external-interrupt";
reg = <0x40006003 0x1>;
channel = <3>;
renesas,sample-clock-div = <64>;
#port-irq-cells = <0>;
status = "disabled";
};
port_irq4: external-interrupt@40006004 {
compatible = "renesas,ra-external-interrupt";
reg = <0x40006004 0x1>;
channel = <4>;
renesas,sample-clock-div = <64>;
#port-irq-cells = <0>;
status = "disabled";
};
port_irq5: external-interrupt@40006005 {
compatible = "renesas,ra-external-interrupt";
reg = <0x40006005 0x1>;
channel = <5>;
renesas,sample-clock-div = <64>;
#port-irq-cells = <0>;
status = "disabled";
};
port_irq6: external-interrupt@40006006 {
compatible = "renesas,ra-external-interrupt";
reg = <0x40006006 0x1>;
channel = <6>;
renesas,sample-clock-div = <64>;
#port-irq-cells = <0>;
status = "disabled";
};
port_irq7: external-interrupt@40006007 {
compatible = "renesas,ra-external-interrupt";
reg = <0x40006007 0x1>;
channel = <7>;
renesas,sample-clock-div = <64>;
#port-irq-cells = <0>;
status = "disabled";
};
port_irq8: external-interrupt@40006008 {
compatible = "renesas,ra-external-interrupt";
reg = <0x40006008 0x1>;
channel = <8>;
renesas,sample-clock-div = <64>;
#port-irq-cells = <0>;
status = "disabled";
};
port_irq9: external-interrupt@40006009 {
compatible = "renesas,ra-external-interrupt";
reg = <0x40006009 0x1>;
channel = <9>;
renesas,sample-clock-div = <64>;
#port-irq-cells = <0>;
status = "disabled";
};
port_irq10: external-interrupt@4000600a {
compatible = "renesas,ra-external-interrupt";
reg = <0x4000600a 0x1>;
channel = <10>;
renesas,sample-clock-div = <64>;
#port-irq-cells = <0>;
status = "disabled";
};
port_irq11: external-interrupt@4000600b {
compatible = "renesas,ra-external-interrupt";
reg = <0x4000600b 0x1>;
channel = <11>;
renesas,sample-clock-div = <64>;
#port-irq-cells = <0>;
status = "disabled";
};
port_irq12: external-interrupt@4000600c {
compatible = "renesas,ra-external-interrupt";
reg = <0x4000600c 0x1>;
channel = <12>;
renesas,sample-clock-div = <64>;
#port-irq-cells = <0>;
status = "disabled";
};
port_irq13: external-interrupt@4000600d {
compatible = "renesas,ra-external-interrupt";
reg = <0x4000600d 0x1>;
channel = <13>;
renesas,sample-clock-div = <64>;
#port-irq-cells = <0>;
status = "disabled";
};
port_irq14: external-interrupt@4000600e {
compatible = "renesas,ra-external-interrupt";
reg = <0x4000600e 0x1>;
channel = <14>;
renesas,sample-clock-div = <64>;
#port-irq-cells = <0>;
status = "disabled";
};
port_irq15: external-interrupt@4000600f {
compatible = "renesas,ra-external-interrupt";
reg = <0x4000600f 0x1>;
channel = <15>;
renesas,sample-clock-div = <64>;
#port-irq-cells = <0>;
status = "disabled";
};
pwm0: pwm0@40078000 {
compatible = "renesas,ra-pwm";
divider = <RA_PWM_SOURCE_DIV_1>;
channel = <RA_PWM_CHANNEL_0>;
clocks = <&pclkd MSTPD 5>;
reg = <0x40078000 0x100>;
#pwm-cells = <3>;
status = "disabled";
};
pwm1: pwm1@40078100 {
compatible = "renesas,ra-pwm";
divider = <RA_PWM_SOURCE_DIV_1>;
channel = <RA_PWM_CHANNEL_1>;
clocks = <&pclkd MSTPD 5>;
reg = <0x40078100 0x100>;
#pwm-cells = <3>;
status = "disabled";
};
pwm2: pwm2@40078200 {
compatible = "renesas,ra-pwm";
divider = <RA_PWM_SOURCE_DIV_1>;
channel = <RA_PWM_CHANNEL_2>;
clocks = <&pclkd MSTPD 5>;
reg = <0x40078200 0x100>;
#pwm-cells = <3>;
status = "disabled";
};
pwm3: pwm3@40078300 {
compatible = "renesas,ra-pwm";
divider = <RA_PWM_SOURCE_DIV_1>;
channel = <RA_PWM_CHANNEL_3>;
clocks = <&pclkd MSTPD 5>;
reg = <0x40078300 0x100>;
#pwm-cells = <3>;
status = "disabled";
};
pwm4: pwm4@40078400 {
compatible = "renesas,ra-pwm";
divider = <RA_PWM_SOURCE_DIV_1>;
channel = <RA_PWM_CHANNEL_4>;
clocks = <&pclkd MSTPD 5>;
reg = <0x40078400 0x100>;
#pwm-cells = <3>;
status = "disabled";
};
pwm5: pwm5@40078500 {
compatible = "renesas,ra-pwm";
divider = <RA_PWM_SOURCE_DIV_1>;
channel = <RA_PWM_CHANNEL_5>;
clocks = <&pclkd MSTPD 5>;
reg = <0x40078500 0x100>;
#pwm-cells = <3>;
status = "disabled";
};
pwm6: pwm6@40078600 {
compatible = "renesas,ra-pwm";
divider = <RA_PWM_SOURCE_DIV_1>;
channel = <RA_PWM_CHANNEL_6>;
clocks = <&pclkd MSTPD 5>;
reg = <0x40078600 0x100>;
#pwm-cells = <3>;
status = "disabled";
};
pwm7: pwm7@40078700 {
compatible = "renesas,ra-pwm";
divider = <RA_PWM_SOURCE_DIV_1>;
channel = <RA_PWM_CHANNEL_7>;
clocks = <&pclkd MSTPD 5>;
reg = <0x40078700 0x100>;
#pwm-cells = <3>;
status = "disabled";
};
pwm8: pwm8@40078800 {
compatible = "renesas,ra-pwm";
divider = <RA_PWM_SOURCE_DIV_1>;
channel = <RA_PWM_CHANNEL_8>;
clocks = <&pclkd MSTPD 6>;
reg = <0x40078800 0x100>;
#pwm-cells = <3>;
status = "disabled";
};
pwm9: pwm9@40078900 {
compatible = "renesas,ra-pwm";
divider = <RA_PWM_SOURCE_DIV_1>;
channel = <RA_PWM_CHANNEL_9>;
clocks = <&pclkd MSTPD 6>;
reg = <0x40078900 0x100>;
#pwm-cells = <3>;
status = "disabled";
};
pwm10: pwm10@40078a00 {
compatible = "renesas,ra-pwm";
divider = <RA_PWM_SOURCE_DIV_1>;
channel = <RA_PWM_CHANNEL_10>;
clocks = <&pclkd MSTPD 6>;
reg = <0x40078a00 0x100>;
#pwm-cells = <3>;
status = "disabled";
};
pwm11: pwm11@40078b00 {
compatible = "renesas,ra-pwm";
divider = <RA_PWM_SOURCE_DIV_1>;
channel = <RA_PWM_CHANNEL_11>;
clocks = <&pclkd MSTPD 6>;
reg = <0x40078b00 0x100>;
#pwm-cells = <3>;
status = "disabled";
};
pwm12: pwm12@40078c00 {
compatible = "renesas,ra-pwm";
divider = <RA_PWM_SOURCE_DIV_1>;
channel = <RA_PWM_CHANNEL_12>;
clocks = <&pclkd MSTPD 6>;
reg = <0x40078c00 0x100>;
#pwm-cells = <3>;
status = "disabled";
};
flash: flash-controller@407e0000 {
compatible = "renesas,ra-flash-hp-controller";
reg = <0x407e0000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
interrupts = <49 1>, <50 1>;
interrupt-names = "frdyi", "fiferr";
};
};
};
&nvic {
arm,num-irq-priority-bits = <4>;
};
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