e255444179
The new bindings for the stm32 xspi is for new stm32 devices with XSPI peripherals like the stm32h5 serie. This is close to the octo-spi. Adapt the flash controller constants to the XSPI model especially. This is done through a new xspi.h definition file. Signed-off-by: Francois Ramu <francois.ramu@st.com>
53 lines
1.5 KiB
YAML
53 lines
1.5 KiB
YAML
# Copyright (c) 2021 - 2024 STMicroelectronics
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# SPDX-License-Identifier: Apache-2.0
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description: |
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STM32 XSPI Flash controller supporting the JEDEC CFI interface
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Representation of a serial flash on a xspi bus:
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mx25lm51245: xspi-nor-flash@70000000 {
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compatible = "st,stm32-xspi-nor";
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reg = <0x70000000 DT_SIZE_M(64)>; /* 512 Mbits */
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data-mode = <XSPI_OCTO_MODE>; /* access on 8 data lines */
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data-rate = <XSPI_DTR_TRANSFER>; /* access in DTR */
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ospi-max-frequency = <DT_FREQ_M(50)>;
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status = "okay";
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};
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compatible: "st,stm32-xspi-nor"
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include:
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- name: st,stm32-ospi-nor.yaml
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property-blocklist:
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- spi-bus-width
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- data-rate
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properties:
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spi-bus-width:
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type: int
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required: true
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description: |
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The width of XSPI bus to which flash memory is connected.
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Possible values are :
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- XSPI_SPI_MODE <1> = SPI mode on 1 data line
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- XSPI_DUAL_MODE <2> = Dual mode on 2 data lines
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- XSPI_QUAD_MODE <4> = Quad mode on 4 data lines
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- XSPI_OCTO_MODE <8> = Octo mode on 8 data lines
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enum:
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- 1
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- 2
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- 4
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- 8
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data-rate:
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type: int
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required: true
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description: |
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The SPI data Rate is STR or DTR
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Possible values are :
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- XSPI_STR_TRANSFER <1> = Single Rate Transfer
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- XSPI_DTR_TRANSFER <2> = Dual Rate Transfer (only with XSPI_OCTO_MODE)
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enum:
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- 1
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- 2
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