Dat Nguyen Duy 2b2b41d775 arch: arm: cortex_a_r: add Kconfig options for cache segregation ... On Arm Cortex R52, cache segregation policy controls the number of L1 I/D cache ways that are allocated to Flash and AXIM interface. Adding Kconfig options for configuring it. Writing to IMP_CSCTRL is only permitted before the caches have been enabled, following a system reset. Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>		2024-11-26 15:43:45 -05:00
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core	arch: arm: cortex_a_r: add Kconfig options for cache segregation	2024-11-26 15:43:45 -05:00
include	init: support per-core init hook	2024-11-16 14:04:25 -05:00
CMakeLists.txt	arch: arm: cmake: Correct endian in output format	2024-07-04 18:01:51 -04:00
Kconfig	arch: arm: add rom_start_relocation prompts	2024-06-12 17:11:04 -05:00