e72af321d5
Removing period, duty and polarity configuration from channel devicetree. At boot time, only minimal setup like pinctrl, prescaler, etc should be initialized. PWM signal is produced by using pwm_set* API Also after this change, PWM period, duty are changed at the next counter period boundary Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
133 lines
4.4 KiB
C
133 lines
4.4 KiB
C
/*
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* Copyright 2023 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/kernel.h>
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#include <zephyr/device.h>
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#define LOG_MODULE_NAME nxp_s32_emios
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(LOG_MODULE_NAME, CONFIG_NXP_S32_EMIOS_LOG_LEVEL);
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#include <Emios_Mcl_Ip.h>
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#include <Emios_Mcl_Ip_Irq.h>
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#define DT_DRV_COMPAT nxp_s32_emios
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struct nxp_s32_emios_config {
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uint8_t instance;
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Emios_Mcl_Ip_ConfigType *mcl_info;
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void (*irq_config)(void);
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};
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static int nxp_s32_emios_init(const struct device *dev)
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{
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const struct nxp_s32_emios_config *config = dev->config;
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if (Emios_Mcl_Ip_Init(config->instance, config->mcl_info)) {
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LOG_ERR("Could not initialize eMIOS");
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return -EINVAL;
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}
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config->irq_config();
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return 0;
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}
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#define MAX_MASTER_BUS_PERIOD 65535U
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#define MIN_MASTER_BUS_PERIOD 2U
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#define MAX_GLOB_PRESCALER 256U
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#define MIN_GLOB_PRESCALER 1U
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#define NXP_S32_EMIOS_MASTER_BUS_MODE(mode) DT_CAT(EMIOS_IP_, mode)
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#define NXP_S32_EMIOS_INSTANCE_CHECK(idx, n) \
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((DT_INST_REG_ADDR(n) == IP_EMIOS_##idx##_BASE) ? idx : 0)
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#define NXP_S32_EMIOS_GET_INSTANCE(n) \
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LISTIFY(__DEBRACKET eMIOS_INSTANCE_COUNT, NXP_S32_EMIOS_INSTANCE_CHECK, (|), n)
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#define NXP_S32_EMIOS_GENERATE_GLOBAL_CONFIG(n) \
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BUILD_ASSERT(IN_RANGE(DT_INST_PROP(n, clock_divider), \
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MIN_GLOB_PRESCALER, MAX_GLOB_PRESCALER), \
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"Divider for eMIOS global prescaler is out of range"); \
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const Emios_Ip_GlobalConfigType nxp_s32_emios_##n##_global_config = { \
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.allowDebugMode = true, \
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.clkDivVal = DT_INST_PROP(n, clock_divider) - 1U, \
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.enableGlobalTimeBase = true \
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};
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#define NXP_S32_EMIOS_MASTER_BUS_CONFIG(node_id) \
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{ \
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.hwChannel = DT_PROP(node_id, channel), \
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.defaultPeriod = MAX_MASTER_BUS_PERIOD, \
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.masterBusPrescaler = DT_PROP(node_id, prescaler) - 1, \
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.allowDebugMode = DT_PROP(node_id, freeze), \
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.masterMode = NXP_S32_EMIOS_MASTER_BUS_MODE(DT_STRING_TOKEN(node_id, mode)), \
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.masterBusAltPrescaler = 0, \
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},
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#define NXP_S32_EMIOS_GENERATE_MASTER_BUS_CONFIG(n) \
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const Emios_Ip_MasterBusConfigType nxp_s32_emios_##n##_master_bus_config[] = { \
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DT_FOREACH_CHILD_STATUS_OKAY(DT_INST_CHILD(n, master_bus), \
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NXP_S32_EMIOS_MASTER_BUS_CONFIG) \
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};
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#define NXP_S32_EMIOS_GENERATE_CONFIG(n) \
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NXP_S32_EMIOS_GENERATE_GLOBAL_CONFIG(n) \
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NXP_S32_EMIOS_GENERATE_MASTER_BUS_CONFIG(n) \
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const Emios_Mcl_Ip_ConfigType nxp_s32_emios_##n##_mcl_config = { \
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.channelsNumber = ARRAY_SIZE(nxp_s32_emios_##n##_master_bus_config), \
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.emiosGlobalConfig = &nxp_s32_emios_##n##_global_config, \
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.masterBusConfig = &nxp_s32_emios_##n##_master_bus_config \
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};
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#define EMIOS_INTERRUPT_NAME(name) DT_CAT3(EMIOS, name, _IRQ)
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/*
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* The real interrupt handlers only defined in some circumstances, just add
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* weak implementations to avoid populating so many preprocessor directives
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*/
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#define EMIOS_INTERRUPT_DEFINE(node_id, prop, idx) \
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__weak void EMIOS_INTERRUPT_NAME(DT_STRING_TOKEN_BY_IDX(node_id, prop, idx))(void) {}
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#define NXP_S32_EMIOS_INTERRUPT_DEFINE(n) \
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DT_INST_FOREACH_PROP_ELEM(n, interrupt_names, EMIOS_INTERRUPT_DEFINE)
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#define EMIOS_INTERRUPT_CONFIG(node_id, prop, idx) \
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do { \
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IRQ_CONNECT(DT_IRQ_BY_IDX(node_id, idx, irq), \
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DT_IRQ_BY_IDX(node_id, idx, priority), \
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EMIOS_INTERRUPT_NAME(DT_STRING_TOKEN_BY_IDX(node_id, prop, idx)),\
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DEVICE_DT_GET(node_id), \
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0); \
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irq_enable(DT_IRQ_BY_IDX(node_id, idx, irq)); \
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} while (false);
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#define NXP_S32_EMIOS_INTERRUPT_CONFIG(n) \
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static void nxp_s32_emios_##n##_interrupt_config(void) \
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{ \
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DT_INST_FOREACH_PROP_ELEM(n, interrupt_names, EMIOS_INTERRUPT_CONFIG) \
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}
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#define NXP_S32_EMIOS_INIT_DEVICE(n) \
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NXP_S32_EMIOS_GENERATE_CONFIG(n) \
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NXP_S32_EMIOS_INTERRUPT_DEFINE(n) \
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NXP_S32_EMIOS_INTERRUPT_CONFIG(n) \
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const struct nxp_s32_emios_config nxp_s32_emios_##n##_config = { \
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.instance = NXP_S32_EMIOS_GET_INSTANCE(n), \
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.mcl_info = (Emios_Mcl_Ip_ConfigType *)&nxp_s32_emios_##n##_mcl_config, \
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.irq_config = nxp_s32_emios_##n##_interrupt_config, \
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}; \
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DEVICE_DT_INST_DEFINE(n, \
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&nxp_s32_emios_init, \
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NULL, \
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NULL, \
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&nxp_s32_emios_##n##_config, \
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POST_KERNEL, \
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CONFIG_NXP_S32_EMIOS_INIT_PRIORITY, \
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NULL);
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DT_INST_FOREACH_STATUS_OKAY(NXP_S32_EMIOS_INIT_DEVICE)
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