Tim Lin f1dc11174c ITE: drivers/i2c: Add a property for I2C located channel ... Add a property for I2C channel switch selection. This property will write to the SMBxxCHS register according to the I2C node you selected, which can make channel swapping. Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>		2023-11-08 10:08:28 +01:00
..
andes	drivers: dma: Add Andestech atcdmac300 driver.	2023-10-20 14:51:08 +02:00
efinix	drivers: intc: plic: define all registers' offset in the driver	2023-10-04 09:06:28 -04:00
espressif/esp32c3	dts: bindings: can: deprecate the sjw and sjw-data properties	2023-09-28 16:28:56 +02:00
gigadevice	dts/riscv: add missing riscv,isa fields and modify existing ones	2023-09-14 14:34:34 +02:00
ite	ITE: drivers/i2c: Add a property for I2C located channel	2023-11-08 10:08:28 +01:00
lowrisc	drivers: intc: plic: define all registers' offset in the driver	2023-10-04 09:06:28 -04:00
microchip	drivers: intc: plic: define all registers' offset in the driver	2023-10-04 09:06:28 -04:00
niosv	dts: riscv: niosv: Fix status string	2023-09-19 15:23:36 +01:00
openisa	dts/riscv: add missing riscv,isa fields and modify existing ones	2023-09-14 14:34:34 +02:00
sifive	drivers: intc: plic: define all registers' offset in the driver	2023-10-04 09:06:28 -04:00
starfive	drivers: intc: plic: define all registers' offset in the driver	2023-10-04 09:06:28 -04:00
telink	drivers: intc: plic: define all registers' offset in the driver	2023-10-04 09:06:28 -04:00
neorv32.dtsi	dts/riscv: add missing riscv,isa fields and modify existing ones	2023-09-14 14:34:34 +02:00
riscv32-litex-vexriscv.dtsi	dts/riscv: add missing riscv,isa fields and modify existing ones	2023-09-14 14:34:34 +02:00
virt.dtsi	board: riscv: qemu: increase ndev of PLIC to 1024	2023-10-05 06:10:06 -04:00