f519dd1411
Use generic hook infrastrucutre instead of custom Kconfig and hooks for ARM. Replace z_arm_platform_init() with platform_reset(). Signed-off-by: Anas Nashif <anas.nashif@intel.com>
84 lines
1.6 KiB
ArmAsm
84 lines
1.6 KiB
ArmAsm
/*
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* Copyright 2023 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/devicetree.h>
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#include <zephyr/toolchain.h>
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#include <zephyr/linker/sections.h>
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#define MC_RGM_BASE 0x4028C000
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#define MC_RGM_DES 0x0
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#define MC_RGM_FES 0x8
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_ASM_FILE_PROLOGUE
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GTEXT(soc_reset_hook)
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SECTION_FUNC(TEXT, soc_reset_hook)
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/*
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* On destructive reset, SRAM and TCM memories must be initialized to a known value using a
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* 64-bit master before 32-bit masters can read or write to them. Note that SRAM retains
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* content during functional reset through a hardware mechanism, therefore accesses do not
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* cause any content corruption errors.
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*
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* This is implemented directly in ASM, to ensure no stack access is performed.
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*/
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/* If we come from a destructive reset, then ignore functional reset flags */
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ldr r1, =MC_RGM_BASE
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ldr r2, [r1, MC_RGM_DES]
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cmp r2, 0x0
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bne ECC_INIT
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ldr r2, [r1, MC_RGM_FES]
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cmp r2, 0x0
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bne ECC_END
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ECC_INIT:
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ldr r1, = DT_REG_ADDR(DT_CHOSEN(zephyr_sram))
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ldr r2, = DT_REG_SIZE(DT_CHOSEN(zephyr_sram))
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subs r2, #1
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ble SRAM_LOOP_END
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movs r0, 0
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movs r3, 0
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SRAM_LOOP:
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stm r1!, {r0,r3}
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subs r2, 8
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bge SRAM_LOOP
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SRAM_LOOP_END:
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#if DT_NODE_HAS_STATUS(DT_CHOSEN(zephyr_itcm), okay)
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ldr r1, = DT_REG_ADDR(DT_CHOSEN(zephyr_itcm))
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ldr r2, = DT_REG_SIZE(DT_CHOSEN(zephyr_itcm))
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subs r2, #1
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ITCM_LOOP:
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stm r1!, {r0,r3}
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subs r2, 8
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bge ITCM_LOOP
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#endif
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#if DT_NODE_HAS_STATUS(DT_CHOSEN(zephyr_dtcm), okay)
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ldr r1, = DT_REG_ADDR(DT_CHOSEN(zephyr_dtcm))
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ldr r2, = DT_REG_SIZE(DT_CHOSEN(zephyr_dtcm))
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subs r2, #1
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DTCM_LOOP:
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stm r1!, {r0,r3}
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subs r2, 8
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bge DTCM_LOOP
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#endif
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ECC_END:
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bx lr
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