zephyr/arch/x86/core/cache_s.S
Javier B Perez Hernandez f7fffae8aa Change BSD-3 licenses to Apache 2
Change all the Intel and Wind River code license from BSD-3 to Apache 2.

Change-Id: Id8be2c1c161a06ea8a0b9f38e17660e11dbb384b
Signed-off-by: Javier B Perez Hernandez <javier.b.perez.hernandez@linux.intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:24:29 -05:00

50 lines
1.2 KiB
ArmAsm

/* cache_s.S - cache manipulation */
/*
* Copyright (c) 2013-2014 Wind River Systems, Inc.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/*
DESCRIPTION
This module contains functions for manipulating caches.
*/
#ifndef CONFIG_CLFLUSH_INSTRUCTION_SUPPORTED
#define _ASMLANGUAGE
#include <arch/x86/asm.h>
/* externs (internal APIs) */
GTEXT(_SysCacheFlush)
/**
*
* @brief Flush a page to main memory
*
* This implementation flushes the whole cache.
*
* C signature:
*
* void _SysCacheFlush (VIRT_ADDR virt, size_t size)
*
* Both parameters are ignored in this implementation.
*
* @return N/A
*/
SECTION_FUNC(TEXT, _SysCacheFlush)
wbinvd
ret
#endif /* !CONFIG_CLFLUSH_INSTRUCTION_SUPPORTED */