TI OMAP mailbox is the inter-processor mailbox IP found in TI K3 devices (AM62X, AM64X, J721E .etc). The mailbox hardware uses a queued mailbox interrupt mechanism that provides a communication channel between processors through a set of registers and their associated interrupt signals by sending and receiving messages. The interrupt/bank associated with each processor entity is found through the usr_id property from device tree. Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
22 lines
1.3 KiB
CMake
22 lines
1.3 KiB
CMake
# SPDX-License-Identifier: Apache-2.0
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zephyr_syscall_header(${ZEPHYR_BASE}/include/zephyr/drivers/mbox.h)
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zephyr_library()
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zephyr_library_sources_ifdef(CONFIG_USERSPACE mbox_handlers.c)
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zephyr_library_sources_ifdef(CONFIG_MBOX_NRFX_IPC mbox_nrfx_ipc.c)
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zephyr_library_sources_ifdef(CONFIG_MBOX_NXP_S32_MRU mbox_nxp_s32_mru.c)
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zephyr_library_sources_ifdef(CONFIG_MBOX_NXP_IMX_MU mbox_nxp_imx_mu.c)
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zephyr_library_sources_ifdef(CONFIG_MBOX_NXP_MAILBOX mbox_nxp_mailbox.c)
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zephyr_library_sources_ifdef(CONFIG_MBOX_ESP32 mbox_esp32.c)
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zephyr_library_sources_ifdef(CONFIG_MBOX_ANDES_PLIC_SW mbox_andes_plic_sw.c)
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zephyr_library_sources_ifdef(CONFIG_MBOX_NRF_VEVIF_TASK_RX mbox_nrf_vevif_task_rx.c)
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zephyr_library_sources_ifdef(CONFIG_MBOX_NRF_VEVIF_TASK_TX mbox_nrf_vevif_task_tx.c)
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zephyr_library_sources_ifdef(CONFIG_MBOX_NRF_VEVIF_EVENT_RX mbox_nrf_vevif_event_rx.c)
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zephyr_library_sources_ifdef(CONFIG_MBOX_NRF_VEVIF_EVENT_TX mbox_nrf_vevif_event_tx.c)
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zephyr_library_sources_ifdef(CONFIG_MBOX_NRF_BELLBOARD_RX mbox_nrf_bellboard_rx.c)
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zephyr_library_sources_ifdef(CONFIG_MBOX_NRF_BELLBOARD_TX mbox_nrf_bellboard_tx.c)
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zephyr_library_sources_ifdef(CONFIG_MBOX_STM32_HSEM mbox_stm32_hsem.c)
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zephyr_library_sources_ifdef(CONFIG_MBOX_IVSHMEM mbox_ivshmem.c)
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zephyr_library_sources_ifdef(CONFIG_MBOX_TI_OMAP_MAILBOX mbox_ti_omap.c)
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