fe5c11db05
Add Zephyr support for the Audio DSP on the MT8196 SOC. This is a very similar device to previous designs. Most of this patch is just DTS. The biggest delta is the more complicated second level interrupt controller, though it is still able to be represented using some vaguely clever DTS config over the older intc_mtk_adsp driver. Also the memory layout is slightly different, requiring a little indirection to set the initial boot stack address and log output buffer. And the timer "irq_ack" register bits moved. Signed-off-by: Andy Ross <andyross@google.com>
45 lines
723 B
Text
45 lines
723 B
Text
# Copyright 2024 The ChromiumOS Authors
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# SPDX-License-Identifier: Apache-2.0
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config SOC_FAMILY_MTK
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bool
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config SOC_SERIES_MT8195
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bool
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select SOC_FAMILY_MTK
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help
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Mediatek MT8195 Audio DSP
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config SOC_SERIES_MT818X
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bool
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select SOC_FAMILY_MTK
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help
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Mediatek MT818x Audio DSPs
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config SOC_SERIES_MT8196
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bool
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select SOC_FAMILY_MTK
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help
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Mediatek MT8196 Audio DSPs
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config SOC_MT8195
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bool
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select SOC_SERIES_MT8195
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config SOC_MT8186
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bool
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select SOC_SERIES_MT818X
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config SOC_MT8188
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bool
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select SOC_SERIES_MT818X
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config SOC_MT8196
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bool
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select SOC_SERIES_MT8196
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config SOC
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default "mt8195" if SOC_MT8195
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default "mt8186" if SOC_MT8186
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default "mt8188" if SOC_MT8188
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default "mt8196" if SOC_MT8196
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