fe5c11db05
Add Zephyr support for the Audio DSP on the MT8196 SOC. This is a very similar device to previous designs. Most of this patch is just DTS. The biggest delta is the more complicated second level interrupt controller, though it is still able to be represented using some vaguely clever DTS config over the older intc_mtk_adsp driver. Also the memory layout is slightly different, requiring a little indirection to set the initial boot stack address and log output buffer. And the timer "irq_ack" register bits moved. Signed-off-by: Andy Ross <andyross@google.com>
10 lines
208 B
C
10 lines
208 B
C
/* Copyright 2024 The ChromiumOS Authors
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_SOC_MT8196_SOC_H
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#define ZEPHYR_SOC_MT8196_SOC_H
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#include "../soc.h"
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#endif /* ZEPHYR_SOC_MT8196_SOC_H */
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