fix https://github.com/adafruit/ArduinoCore-samd/issues/266

fix matrixportal_m4 warning define

.github/workflows/githubci.yml

@@ -0,0 +1,63 @@
+name: Build
+
+on: [pull_request, push]
+
+jobs:
+  build:
+    strategy:
+      fail-fast: false
+      matrix:
+        arduino-platform: ['metro_m0', 'hallowing', 'circuitplayground_m0',
+                           'metro_m4', 'pybadge_m4', 'pygamer_m4', 'hallowing_m4', 'pyportal_m4', 'pyportal_m4_titano']
+
+    runs-on: ubuntu-latest
+    
+    steps:
+    - name: Setup Python
+      uses: actions/setup-python@v1
+      with:
+        python-version: '3.x'
+        
+    - name: Checkout code
+      uses: actions/checkout@v2
+
+    - name: Checkout submodules
+      shell: bash
+      run: |
+        auth_header="$(git config --local --get http.https://github.com/.extraheader)"
+        git submodule sync --recursive
+        git -c "http.extraheader=$auth_header" -c protocol.version=2 submodule update --init --force --recursive      
+        
+    - name: Install Arduino CLI and Tools
+      run: |
+        # make all our directories we need for files and libraries
+        mkdir $HOME/.arduino15
+        mkdir $HOME/.arduino15/packages
+        mkdir $HOME/Arduino
+        mkdir $HOME/Arduino/libraries
+        curl -fsSL https://raw.githubusercontent.com/arduino/arduino-cli/master/install.sh | sh
+        echo "::add-path::$GITHUB_WORKSPACE/bin"
+        
+    - name: Install BSP and Libraries
+      env:
+        BSP_URL: https://adafruit.github.io/arduino-board-index/package_adafruit_index.json
+        BSP_PATH: .arduino15/packages/adafruit/hardware/samd
+        LIB_DEPS: FlashStorage SD
+      run: |
+        arduino-cli config init
+        arduino-cli core update-index
+        arduino-cli core update-index --additional-urls $BSP_URL        
+        arduino-cli core install arduino:samd --additional-urls $BSP_URL
+        arduino-cli core install adafruit:samd --additional-urls $BSP_URL
+        # Replace release BSP with our code
+        BSP_VERSION=`eval ls $HOME/$BSP_PATH`
+        rm -r $HOME/$BSP_PATH/*
+        ln -s $GITHUB_WORKSPACE $HOME/$BSP_PATH/$BSP_VERSION
+        arduino-cli lib install $LIB_DEPS
+
+    - name: Build examples
+      run: python3 extras/build_all.py ${{ matrix.arduino-platform }}
+
+    # How to mark this as allowed-to-fail?
+    - name: Build examples (-Wall)
+      run: python3 extras/build_all.py --all_warnings --warnings_do_not_cause_job_failure

.gitmodules

@@ -0,0 +1,3 @@
+[submodule "cores/arduino/TinyUSB/Adafruit_TinyUSB_ArduinoCore"]
+	path = cores/arduino/TinyUSB/Adafruit_TinyUSB_ArduinoCore
+	url = https://github.com/adafruit/Adafruit_TinyUSB_ArduinoCore.git

CHANGELOG

@@ -1,5 +1,40 @@
 SAMD CORE ?.?.?? ????.??.??
 
+SAMD CORE 1.6.21 2019.04.01
+
+* MKR boards: changed I2C to sercom2, SPI1 + Serial2 to sercom4
+* Improved accuracy of delay() function. Thanks @BenF
+* MKR 1500: Changed SARA module to be powered off on boot
+
+SAMD CORE 1.6.20 2018.11.28
+
+* Replaced boolean type with bool in examples. Thanks @per1234
+* Added c++ linker command to allow to include libstdc++ when linking. Thanks @helmut64
+* CPX driver fixes. Thanks @dhalbert
+* I2S: Changed library to use 8 MHz oscillator source if 48MHz divider does not fit in 8 bits
+* UART: Added frame error handling
+* USB: Fixed memory leak on reconnects
+* SDU: Added support for Arduino M0. Thanks @jandrassy
+* Added arduinoOTA upload keys for Arduino M0. Thanks @jandrassy
+* USB: Fixed USB Host failures and fixed memory overwrite in USBHost. Thanks @gdsports
+* USB: Added method to return USB error code. Thanks @MarkFischer
+* CDC: Clear line state on end()
+* USB: Added USB device end() method
+* Removed requirement that the DAC is on A0. Thanks @GabrielNotman
+* Added alternate ports 44, 45 to make the SWCLK and SWDIO pins available on the Zero. Thanks @helmut64
+* Added defines for MKR pin layout
+* Fixed freeze in tone()
+* Added MKR NB 1500 variant and bootloader
+* Increased the default serial buffer size to 256
+
+SAMD CORE 1.6.19 2018.07.11
+
+* Fixed bootloader tools for .org boards
+* M0: Updated pin definitions for D6, D7 and D13 to match Zero
+* SPI: Fixed interrupt mask to block. Thanks @ggajoch
+* Added MKR WiFi 1010 variant and bootloader
+* Updated Windows Drivers to 1.4.0 and re-signed Adafruit_Circuit_Playground_Express.inf
+
 SAMD CORE 1.6.18 2018.03.05
 
 * Wire: Added support for general call (broadcast)

README.md

@@ -1,48 +1,17 @@
 # Arduino Core for SAMD21 and SAMD51 CPU
 
-## Known Issues:
-* gcc optimizations must be off for sketches to work consistently. We are working to track this down.
-* AREF must be tied to 3.3V for dac to work. This is a bug in the SAMD51 silicon.
-* USB host mode doesn't work yet
-* I2S doesn't work yet
+[![Build Status](https://github.com/adafruit/ArduinoCore-samd/workflows/Build/badge.svg)](https://github.com/adafruit/ArduinoCore-samd/actions)
 
 This repository contains the source code and configuration files of the Arduino Core
 for Atmel's SAMD21 and SAMD51 processor (used on the Arduino/Genuino Zero, MKR1000 and MKRZero boards).
 
 In particular, this adds support for the Adafruit SAMD Boards such as the Feather M0
 
-## ATSAMD51 Installation on Arduino IDE
-
-The ATSAMD51 is a significantly new chip, so this is a detailed process for now! For the SAMD21, please install via the board manager (no extra steps required)
-
-1. Install Arduino IDE 1.8.5 or greater
-2. Install/update the Adafruit SAMD board support package if you have installed it
-3. Now we need to update CMSIS! Download https://github.com/adafruit/ArduinoModule-CMSIS-Atmel/archive/master.zip and unzip
-4. Find your Arduino CMSIS, in Mac its "~/Library/Arduino15/packages/arduino/tools/CMSIS-Atmel/1.1.0/CMSIS" version # may vary, you'll need "Go to folder..." feature in the Finder to get to " ~/Library/Arduino15" as it is hidden. In Windows it is "C:\Users\yourusername\AppData\Local\Arduino15\packages\arduino\tools\CMSIS-Atmel\1.1.0\CMSIS" Inside is a folder named Device
-
-For Linux: the Arduino stuff is located in ~/.arduino15/packages/arduino/tools/CMSIS-Atmel/1.1.0/CMSIS
-
-5. Inside the downloaded CMSIS zip, go into the CMSIS-Atmel/CMSIS folder, you should see a folder named Device. *DRAG THE DEVICE FOLDER ONLY* from the zip to your arduino Library folder so that Device is merged with Device. It will replace a bunch of files.
-
-For Linux, it may be better to just delete the original Device Folder then copy over the new one - the drag/drop worked ok on MACOS, but not so well on my Linux box.  
-
-6. You will also need to replace bossac. For Windows or Mac: Go here https://github.com/adafruit/BOSSA/releases and download either windows exe or mac app of latest bossac. unzip.  Go to Step 12.
-
-For Linux users it is best to build a copy of bossac locally - 
-clone the Adafruit Repostitory to somewhere on your local machine.
-```
-git clone https://github.com/adafruit/BOSSA.git
-change to the arduino branch
-git checkout arduino
-```
-Follow the instructions to build bossac in README.md or at https://github.com/adafruit/BOSSA/tree/arduino.
-
-7. Replace the binary at ".../Library/Arduino15/packages/arduino/tools/bossac/1.7.0/bossac" or "...\AppData\Local\Arduino15\packages\arduino\tools\bossac\1.7.0\bossac"
-8. On Windows 7 you will also need to install the updated serial driver, download https://github.com/adafruit/Adafruit_Windows_Drivers/archive/master.zip to get all the drivers, and point the Device Manager to the unzipped folder. It isn't signed, so just approve the installation manually.
-13. That's it!
-
 ## Bugs or Issues
 
+* AREF must be tied to 3.3V for dac to work. This is a bug in the SAMD51 silicon.
+* USB host mode doesn't work yet
+
 If you find a bug you can submit an issue here on github:
 
 https://github.com/adafruit/ArduinoCore-samd

bootloaders/mkrnb1500/samd21_sam_ba_arduino_mkrnb1500.hex

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bootloaders/mzero/Bootloader_D21/src/ASF/sam0/utils/cmsis/samd21/include/samd21e15a.h

@@ -218,7 +218,11 @@ void I2S_Handler                 ( void );
  * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
  */
 
+#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
+  #error "Little Endian is already defined, but to different value than expected?!"
+#else
   #define LITTLE_ENDIAN          1
+#endif
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */

bootloaders/mzero/Bootloader_D21/src/ASF/sam0/utils/cmsis/samd21/include/samd21e16a.h

@@ -218,7 +218,11 @@ void I2S_Handler                 ( void );
  * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
  */
 
+#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
+  #error "Little Endian is already defined, but to different value than expected?!"
+#else
   #define LITTLE_ENDIAN          1
+#endif
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */

bootloaders/mzero/Bootloader_D21/src/ASF/sam0/utils/cmsis/samd21/include/samd21e17a.h

@@ -218,7 +218,11 @@ void I2S_Handler                 ( void );
  * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
  */
 
+#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
+  #error "Little Endian is already defined, but to different value than expected?!"
+#else
   #define LITTLE_ENDIAN          1
+#endif
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */

bootloaders/mzero/Bootloader_D21/src/ASF/sam0/utils/cmsis/samd21/include/samd21e18a.h

@@ -218,7 +218,11 @@ void I2S_Handler                 ( void );
  * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
  */
 
+#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
+  #error "Little Endian is already defined, but to different value than expected?!"
+#else
   #define LITTLE_ENDIAN          1
+#endif
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */

bootloaders/mzero/Bootloader_D21/src/ASF/sam0/utils/cmsis/samd21/include/samd21g15a.h

@@ -222,7 +222,11 @@ void I2S_Handler                 ( void );
  * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
  */
 
+#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
+  #error "Little Endian is already defined, but to different value than expected?!"
+#else
   #define LITTLE_ENDIAN          1
+#endif
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */

bootloaders/mzero/Bootloader_D21/src/ASF/sam0/utils/cmsis/samd21/include/samd21g16a.h

@@ -222,7 +222,11 @@ void I2S_Handler                 ( void );
  * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
  */
 
+#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
+  #error "Little Endian is already defined, but to different value than expected?!"
+#else
   #define LITTLE_ENDIAN          1
+#endif
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */

bootloaders/mzero/Bootloader_D21/src/ASF/sam0/utils/cmsis/samd21/include/samd21g17a.h

@@ -222,7 +222,11 @@ void I2S_Handler                 ( void );
  * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
  */
 
+#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
+  #error "Little Endian is already defined, but to different value than expected?!"
+#else
   #define LITTLE_ENDIAN          1
+#endif
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */

bootloaders/mzero/Bootloader_D21/src/ASF/sam0/utils/cmsis/samd21/include/samd21g18a.h

@@ -222,7 +222,11 @@ void I2S_Handler                 ( void );
  * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
  */
 
+#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
+  #error "Little Endian is already defined, but to different value than expected?!"
+#else
   #define LITTLE_ENDIAN          1
+#endif
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */

bootloaders/mzero/Bootloader_D21/src/ASF/sam0/utils/cmsis/samd21/include/samd21j15a.h

@@ -226,7 +226,11 @@ void I2S_Handler                 ( void );
  * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
  */
 
+#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
+  #error "Little Endian is already defined, but to different value than expected?!"
+#else
   #define LITTLE_ENDIAN          1
+#endif
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */

bootloaders/mzero/Bootloader_D21/src/ASF/sam0/utils/cmsis/samd21/include/samd21j16a.h

@@ -226,7 +226,11 @@ void I2S_Handler                 ( void );
  * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
  */
 
+#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
+  #error "Little Endian is already defined, but to different value than expected?!"
+#else
   #define LITTLE_ENDIAN          1
+#endif
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */

bootloaders/mzero/Bootloader_D21/src/ASF/sam0/utils/cmsis/samd21/include/samd21j17a.h

@@ -226,7 +226,11 @@ void I2S_Handler                 ( void );
  * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
  */
 
+#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
+  #error "Little Endian is already defined, but to different value than expected?!"
+#else
   #define LITTLE_ENDIAN          1
+#endif
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */

bootloaders/mzero/Bootloader_D21/src/ASF/sam0/utils/cmsis/samd21/include/samd21j18a.h

@@ -226,7 +226,11 @@ void I2S_Handler                 ( void );
  * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
  */
 
+#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
+  #error "Little Endian is already defined, but to different value than expected?!"
+#else
   #define LITTLE_ENDIAN          1
+#endif
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */

bootloaders/sofia/Bootloader_D21_Sofia_V2.1/src/ASF/sam0/utils/cmsis/samd21/include/samd21e15a.h

@@ -218,7 +218,11 @@ void I2S_Handler                 ( void );
  * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
  */
 
+#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
+  #error "Little Endian is already defined, but to different value than expected?!"
+#else
   #define LITTLE_ENDIAN          1
+#endif
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */

bootloaders/sofia/Bootloader_D21_Sofia_V2.1/src/ASF/sam0/utils/cmsis/samd21/include/samd21e16a.h

@@ -218,7 +218,11 @@ void I2S_Handler                 ( void );
  * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
  */
 
+#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
+  #error "Little Endian is already defined, but to different value than expected?!"
+#else
   #define LITTLE_ENDIAN          1
+#endif
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */

bootloaders/sofia/Bootloader_D21_Sofia_V2.1/src/ASF/sam0/utils/cmsis/samd21/include/samd21e17a.h

@@ -218,7 +218,11 @@ void I2S_Handler                 ( void );
  * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
  */
 
+#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
+  #error "Little Endian is already defined, but to different value than expected?!"
+#else
   #define LITTLE_ENDIAN          1
+#endif
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */

bootloaders/sofia/Bootloader_D21_Sofia_V2.1/src/ASF/sam0/utils/cmsis/samd21/include/samd21e18a.h

@@ -218,7 +218,11 @@ void I2S_Handler                 ( void );
  * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
  */
 
+#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
+  #error "Little Endian is already defined, but to different value than expected?!"
+#else
   #define LITTLE_ENDIAN          1
+#endif
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */

bootloaders/sofia/Bootloader_D21_Sofia_V2.1/src/ASF/sam0/utils/cmsis/samd21/include/samd21g15a.h

@@ -222,7 +222,11 @@ void I2S_Handler                 ( void );
  * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
  */
 
+#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
+  #error "Little Endian is already defined, but to different value than expected?!"
+#else
   #define LITTLE_ENDIAN          1
+#endif
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */

bootloaders/sofia/Bootloader_D21_Sofia_V2.1/src/ASF/sam0/utils/cmsis/samd21/include/samd21g16a.h

@@ -222,7 +222,11 @@ void I2S_Handler                 ( void );
  * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
  */
 
+#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
+  #error "Little Endian is already defined, but to different value than expected?!"
+#else
   #define LITTLE_ENDIAN          1
+#endif
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */

bootloaders/sofia/Bootloader_D21_Sofia_V2.1/src/ASF/sam0/utils/cmsis/samd21/include/samd21g17a.h

@@ -222,7 +222,11 @@ void I2S_Handler                 ( void );
  * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
  */
 
+#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
+  #error "Little Endian is already defined, but to different value than expected?!"
+#else
   #define LITTLE_ENDIAN          1
+#endif
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */

bootloaders/sofia/Bootloader_D21_Sofia_V2.1/src/ASF/sam0/utils/cmsis/samd21/include/samd21g18a.h

@@ -222,7 +222,11 @@ void I2S_Handler                 ( void );
  * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
  */
 
+#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
+  #error "Little Endian is already defined, but to different value than expected?!"
+#else
   #define LITTLE_ENDIAN          1
+#endif
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */

bootloaders/sofia/Bootloader_D21_Sofia_V2.1/src/ASF/sam0/utils/cmsis/samd21/include/samd21j15a.h

@@ -226,7 +226,11 @@ void I2S_Handler                 ( void );
  * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
  */
 
+#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
+  #error "Little Endian is already defined, but to different value than expected?!"
+#else
   #define LITTLE_ENDIAN          1
+#endif
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */

bootloaders/sofia/Bootloader_D21_Sofia_V2.1/src/ASF/sam0/utils/cmsis/samd21/include/samd21j16a.h

@@ -226,7 +226,11 @@ void I2S_Handler                 ( void );
  * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
  */
 
+#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
+  #error "Little Endian is already defined, but to different value than expected?!"
+#else
   #define LITTLE_ENDIAN          1
+#endif
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */

bootloaders/sofia/Bootloader_D21_Sofia_V2.1/src/ASF/sam0/utils/cmsis/samd21/include/samd21j17a.h

@@ -226,7 +226,11 @@ void I2S_Handler                 ( void );
  * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
  */
 
+#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
+  #error "Little Endian is already defined, but to different value than expected?!"
+#else
   #define LITTLE_ENDIAN          1
+#endif
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */

bootloaders/sofia/Bootloader_D21_Sofia_V2.1/src/ASF/sam0/utils/cmsis/samd21/include/samd21j18a.h

@@ -226,7 +226,11 @@ void I2S_Handler                 ( void );
  * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
  */
 
+#if defined(LITTLE_ENDIAN) && (LITTLE_ENDIAN != 1)
+  #error "Little Endian is already defined, but to different value than expected?!"
+#else
   #define LITTLE_ENDIAN          1
+#endif
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */

bootloaders/zero/board_definitions.h

@@ -20,6 +20,35 @@
 #ifndef _BOARD_DEFINITIONS_H_
 #define _BOARD_DEFINITIONS_H_
 
+#if defined(BOARD_ID_arduino_zero)
+  #include "board_definitions_arduino_zero.h"
+#elif defined(BOARD_ID_genuino_zero)
+  #include "board_definitions_genuino_zero.h"
+#elif defined(BOARD_ID_arduino_mkr1000)
+  #include "board_definitions_arduino_mkr1000.h"
+#elif defined(BOARD_ID_genuino_mkr1000)
+  #include "board_definitions_genuino_mkr1000.h"
+#elif defined(BOARD_ID_arduino_mkrzero)
+  #include "board_definitions_arduino_mkrzero.h"
+#elif defined(BOARD_ID_arduino_mkrfox1200)
+  #include "board_definitions_arduino_mkrfox1200.h"
+#elif defined(BOARD_ID_arduino_mkrgsm1400)
+  #include "board_definitions_arduino_mkrgsm1400.h"
+#elif defined(BOARD_ID_arduino_mkrwan1300)
+  #include "board_definitions_arduino_mkrwan1300.h"
+#elif defined(BOARD_ID_arduino_mkrwifi1010)
+  #include "board_definitions_arduino_mkrwifi1010.h"
+#elif defined(BOARD_ID_arduino_mkrnb1500)
+  #include "board_definitions_arduino_mkrnb1500.h"
+#else
+  #error You must define a BOARD_ID and add the corresponding definitions in board_definitions.h
+#endif
+
+// Common definitions
+// ------------------
+
+#define BOOT_PIN_MASK (1U << (BOOT_LOAD_PIN & 0x1f))
+
 /*
  * If BOOT_DOUBLE_TAP_ADDRESS is defined the bootloader is started by
  * quickly tapping two times on the reset button.

bootloaders/zero/board_definitions_arduino_mkrnb1500.h

@@ -0,0 +1,86 @@
+/*
+  Copyright (c) 2016 Arduino LLC.  All right reserved.
+
+  This library is free software; you can redistribute it and/or
+  modify it under the terms of the GNU Lesser General Public
+  License as published by the Free Software Foundation; either
+  version 2.1 of the License, or (at your option) any later version.
+
+  This library is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+  See the GNU Lesser General Public License for more details.
+
+  You should have received a copy of the GNU Lesser General Public
+  License along with this library; if not, write to the Free Software
+  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#ifndef _BOARD_DEFINITIONS_H_
+#define _BOARD_DEFINITIONS_H_
+
+/*
+ * USB device definitions
+ */
+#define STRING_PRODUCT "Arduino MKR NB 1500"
+#define USB_VID_HIGH   0x23
+#define USB_VID_LOW    0x41
+#define USB_PID_HIGH   0x00
+#define USB_PID_LOW    0x55
+
+/*
+ * If BOOT_DOUBLE_TAP_ADDRESS is defined the bootloader is started by
+ * quickly tapping two times on the reset button.
+ * BOOT_DOUBLE_TAP_ADDRESS must point to a free SRAM cell that must not
+ * be touched from the loaded application.
+ */
+#define BOOT_DOUBLE_TAP_ADDRESS           (0x20007FFCul)
+#define BOOT_DOUBLE_TAP_DATA              (*((volatile uint32_t *) BOOT_DOUBLE_TAP_ADDRESS))
+
+/*
+ * If BOOT_LOAD_PIN is defined the bootloader is started if the selected
+ * pin is tied LOW.
+ */
+//#define BOOT_LOAD_PIN                     PIN_PA21
+//#define BOOT_LOAD_PIN                     PIN_PA15
+
+#define BOOT_USART_MODULE                 SERCOM5
+#define BOOT_USART_BUS_CLOCK_INDEX        PM_APBCMASK_SERCOM5
+#define BOOT_USART_PER_CLOCK_INDEX        GCLK_CLKCTRL_ID_SERCOM5_CORE_Val
+#define BOOT_USART_PAD_SETTINGS           UART_RX_PAD3_TX_PAD2
+#define BOOT_USART_PAD3                   PINMUX_PB23D_SERCOM5_PAD3
+#define BOOT_USART_PAD2                   PINMUX_PB22D_SERCOM5_PAD2
+#define BOOT_USART_PAD1                   PINMUX_UNUSED
+#define BOOT_USART_PAD0                   PINMUX_UNUSED
+
+/* Master clock frequency */
+#define CPU_FREQUENCY                     (48000000ul)
+#define VARIANT_MCK                       CPU_FREQUENCY
+
+/* Frequency of the board main oscillator */
+#define VARIANT_MAINOSC                   (32768ul)
+
+/* Calibration values for DFLL48 pll */
+#define NVM_SW_CALIB_DFLL48M_COARSE_VAL   (58)
+#define NVM_SW_CALIB_DFLL48M_FINE_VAL     (64)
+
+/*
+ * LEDs definitions
+ */
+// PA20 (digital pin 6)
+#define BOARD_LED_PORT                    (0)
+#define BOARD_LED_PIN                     (20)
+
+#define CONFIGURE_PMIC                    1
+#define PMIC_PIN_SCL                      12
+#define PMIC_PIN_SDA                      11
+#define PMIC_SERCOM                       SERCOM0                      
+
+// No RX/TX led
+//#define BOARD_LEDRX_PORT
+//#define BOARD_LEDRX_PIN
+
+//#define BOARD_LEDTX_PORT
+//#define BOARD_LEDTX_PIN
+
+#endif // _BOARD_DEFINITIONS_H_

bootloaders/zero/build_all_bootloaders.sh

@@ -25,5 +25,8 @@ mv -v samd21_sam_ba_arduino_mkrwan1300.* ../mkrwan1300/
 BOARD_ID=arduino_mkrwifi1010 NAME=samd21_sam_ba_arduino_mkrwifi1010 make clean all
 mv -v samd21_sam_ba_arduino_mkrwifi1010.* ../mkrwifi1010/
 
+BOARD_ID=arduino_mkrnb1500 NAME=samd21_sam_ba_arduino_mkrnb1500 make clean all
+mv -v samd21_sam_ba_arduino_mkrnb1500.* ../mkrnb1500/
+
 echo Done building bootloaders!
 

cores/arduino/Arduino.h

@@ -97,8 +97,33 @@ void loop( void ) ;
 #undef abs
 #endif // abs
 
-#define min(a,b) ((a)<(b)?(a):(b))
-#define max(a,b) ((a)>(b)?(a):(b))
+#ifdef __cplusplus
+  template<class T, class L> 
+  auto min(const T& a, const L& b) -> decltype((b < a) ? b : a)
+  {
+    return (b < a) ? b : a;
+  }
+
+  template<class T, class L> 
+  auto max(const T& a, const L& b) -> decltype((b < a) ? b : a)
+  {
+    return (a < b) ? b : a;
+  }
+#else
+#ifndef min
+#define min(a,b) \
+   ({ __typeof__ (a) _a = (a); \
+       __typeof__ (b) _b = (b); \
+     _a < _b ? _a : _b; })
+#endif
+#ifndef max
+#define max(a,b) \
+   ({ __typeof__ (a) _a = (a); \
+       __typeof__ (b) _b = (b); \
+     _a > _b ? _a : _b; })
+#endif
+#endif
+
 #define abs(x) ((x)>0?(x):-(x))
 #define constrain(amt,low,high) ((amt)<(low)?(low):((amt)>(high)?(high):(amt)))
 #define round(x)     ((x)>=0?(long)((x)+0.5):(long)((x)-0.5))
@@ -124,10 +149,14 @@ void loop( void ) ;
 #define digitalPinToInterrupt(P)   ( P )
 #endif
 
-// USB Device
+// USB
+#ifdef USE_TINYUSB
+#include "Adafruit_TinyUSB_Core.h"
+#else
 #include "USB/USBDesc.h"
 #include "USB/USBCore.h"
 #include "USB/USBAPI.h"
 #include "USB/USB_host.h"
+#endif
 
 #endif // Arduino_h

cores/arduino/HardwareSerial.h

@@ -68,7 +68,7 @@ class HardwareSerial : public Stream
 {
   public:
     virtual void begin(unsigned long) {}
-    virtual void begin(unsigned long baudrate, uint16_t config) {}
+    virtual void begin(unsigned long, uint16_t) {}
     virtual void end() {}
     virtual int available(void) = 0;
     virtual int peek(void) = 0;

cores/arduino/Print.cpp

@@ -186,6 +186,16 @@ size_t Print::println(const Printable& x)
   return n;
 }
 
+void Print::printf(const char format[], ...)
+{
+  char buf[PRINTF_BUF];
+  va_list ap;
+  va_start(ap, format);
+  vsnprintf(buf, sizeof(buf), format, ap);
+  write(buf);
+  va_end(ap);
+}
+
 // Private Methods /////////////////////////////////////////////////////////////
 
 size_t Print::printNumber(unsigned long n, uint8_t base)
@@ -238,14 +248,14 @@ size_t Print::printFloat(double number, uint8_t digits)
 
   // Print the decimal point, but only if there are digits beyond
   if (digits > 0) {
-    n += print('.');
+    n += print(".");
   }
 
   // Extract digits from the remainder one at a time
   while (digits-- > 0)
   {
     remainder *= 10.0;
-    unsigned int toPrint = (unsigned int)(remainder);
+    unsigned int toPrint = (unsigned int)remainder;
     n += print(toPrint);
     remainder -= toPrint;
   }

cores/arduino/Print.h

@@ -21,6 +21,8 @@
 
 #include <inttypes.h>
 #include <stdio.h> // for size_t
+#include <stdarg.h> // for printf
+#define PRINTF_BUF 80
 
 #include "WString.h"
 #include "Printable.h"
@@ -28,9 +30,6 @@
 #define DEC 10
 #define HEX 16
 #define OCT 8
-#ifdef BIN // Prevent warnings if BIN is previously defined in "iotnx4.h" or similar
-#undef BIN
-#endif
 #define BIN 2
 
 class Print
@@ -86,6 +85,8 @@ class Print
     size_t println(const Printable&);
     size_t println(void);
     
+    void printf(const char[], ...);
+
     virtual void flush() { /* Empty implementation for backward compatibility */ }
 };
 

cores/arduino/RingBuffer.h

@@ -27,7 +27,10 @@
 // using a ring buffer (I think), in which head is the index of the location
 // to which to write the next incoming character and tail is the index of the
 // location from which to read.
-#define SERIAL_BUFFER_SIZE 164
+
+#ifndef SERIAL_BUFFER_SIZE
+#define SERIAL_BUFFER_SIZE 350
+#endif
 
 template <int N>
 class RingBufferN

cores/arduino/SERCOM.cpp

@@ -30,6 +30,24 @@
 SERCOM::SERCOM(Sercom* s)
 {
   sercom = s;
+
+#if defined(__SAMD51__)
+  // A briefly-available but now deprecated feature had the SPI clock source
+  // set via a compile-time setting (MAX_SPI)...problem was this affected
+  // ALL SERCOMs, whereas some (anything read/write, e.g. SD cards) should
+  // not exceed the standard 24 MHz setting.  Newer code, if it needs faster
+  // write-only SPI (e.g. to screen), should override the SERCOM clock on a
+  // per-peripheral basis.  Nonetheless, we check SERCOM_SPI_FREQ_REF here
+  // (MAX_SPI * 2) to retain compatibility with any interim projects that
+  // might have relied on the compile-time setting.  But please, don't.
+ #if SERCOM_SPI_FREQ_REF == F_CPU       // F_CPU clock = GCLK0
+  clockSource = SERCOM_CLOCK_SOURCE_FCPU;
+ #elif SERCOM_SPI_FREQ_REF == 48000000  // 48 MHz clock = GCLK1 (standard)
+  clockSource = SERCOM_CLOCK_SOURCE_48M;
+ #elif SERCOM_SPI_FREQ_REF == 100000000 // 100 MHz clock = GCLK2
+  clockSource = SERCOM_CLOCK_SOURCE_100M;
+ #endif
+#endif // end __SAMD51__
 }
 
 /* =========================
@@ -75,13 +93,15 @@ void SERCOM::initUART(SercomUartMode mode, SercomUartSampleRate sampleRate, uint
 void SERCOM::initFrame(SercomUartCharSize charSize, SercomDataOrder dataOrder, SercomParityMode parityMode, SercomNumberStopBit nbStopBits)
 {
   //Setting the CTRLA register
-  sercom->USART.CTRLA.reg |=	SERCOM_USART_CTRLA_FORM( (parityMode == SERCOM_NO_PARITY ? 0 : 1) ) |
+  sercom->USART.CTRLA.reg |=
+    SERCOM_USART_CTRLA_FORM((parityMode == SERCOM_NO_PARITY ? 0 : 1) ) |
     dataOrder << SERCOM_USART_CTRLA_DORD_Pos;
 
   //Setting the CTRLB register
   sercom->USART.CTRLB.reg |= SERCOM_USART_CTRLB_CHSIZE(charSize) |
     nbStopBits << SERCOM_USART_CTRLB_SBMODE_Pos |
-                (parityMode == SERCOM_NO_PARITY ? 0 : parityMode) << SERCOM_USART_CTRLB_PMODE_Pos; //If no parity use default value
+    (parityMode == SERCOM_NO_PARITY ? 0 : parityMode) <<
+      SERCOM_USART_CTRLB_PMODE_Pos; //If no parity use default value
 }
 
 void SERCOM::initPads(SercomUartTXPad txPad, SercomRXPad rxPad)
@@ -228,7 +248,6 @@ void SERCOM::initSPI(SercomSpiTXPad mosi, SercomRXPad miso, SercomSpiCharSize ch
                           SERCOM_SPI_CTRLB_RXEN; //Active the SPI receiver.
 
   while( sercom->SPI.SYNCBUSY.bit.CTRLB == 1 );
-  
 }
 
 void SERCOM::initSPIClock(SercomSpiClockMode clockMode, uint32_t baudrate)
@@ -302,14 +321,13 @@ SercomDataOrder SERCOM::getDataOrderSPI()
 
 void SERCOM::setBaudrateSPI(uint8_t divider)
 {
-  //Can't divide by 0
-  if(divider == 0)
-    return;
+  disableSPI(); // Register is enable-protected
 
-  //Register enable-protected
-  disableSPI();
-
-  sercom->SPI.BAUD.reg = calculateBaudrateSynchronous( SERCOM_FREQ_REF / divider );
+#if defined(__SAMD51__)
+  sercom->SPI.BAUD.reg = calculateBaudrateSynchronous(freqRef / divider);
+#else
+  sercom->SPI.BAUD.reg = calculateBaudrateSynchronous(SERCOM_SPI_FREQ_REF / divider);
+#endif
 
   enableSPI();
 }
@@ -340,10 +358,7 @@ uint8_t SERCOM::transferDataSPI(uint8_t data)
 {
   sercom->SPI.DATA.bit.DATA = data; // Writing data into Data register
 
-  while( sercom->SPI.INTFLAG.bit.RXC == 0 )
-  {
-    // Waiting Complete Reception
-  }
+  while(sercom->SPI.INTFLAG.bit.RXC == 0); // Waiting Complete Reception
 
   return sercom->SPI.DATA.bit.DATA;  // Reading data
 }
@@ -371,9 +386,14 @@ bool SERCOM::isDataRegisterEmptySPI()
 //  return sercom->SPI.INTFLAG.bit.RXC;
 //}
 
-uint8_t SERCOM::calculateBaudrateSynchronous(uint32_t baudrate)
-{
-  return SERCOM_FREQ_REF / (2 * baudrate) - 1;
+uint8_t SERCOM::calculateBaudrateSynchronous(uint32_t baudrate) {
+#if defined(__SAMD51__)
+  uint16_t b = freqRef / (2 * baudrate);
+#else
+  uint16_t b = SERCOM_SPI_FREQ_REF / (2 * baudrate);
+#endif
+  if(b > 0) b--; // Don't -1 on baud calc if already at 0
+  return b;
 }
 
 
@@ -517,8 +537,18 @@ bool SERCOM::startTransmissionWIRE(uint8_t address, SercomWireReadWriteFlag flag
   // 7-bits address + 1-bits R/W
   address = (address << 0x1ul) | flag;
 
-  // Wait idle or owner bus mode
-   while ( !isBusIdleWIRE() && !isBusOwnerWIRE() );
+  // If another master owns the bus or the last bus owner has not properly
+  // sent a stop, return failure early. This will prevent some misbehaved
+  // devices from deadlocking here at the cost of the caller being responsible
+  // for retrying the failed transmission. See SercomWireBusState for the
+  // possible bus states.
+  if(!isBusOwnerWIRE())
+  {
+    if( isBusBusyWIRE() || (isArbLostWIRE() && !isBusIdleWIRE()) || isBusUnknownWIRE() )
+    {
+      return false;
+    }
+  }
 
   // Send start and address
   sercom->I2CM.ADDR.bit.ADDR = address;
@@ -614,6 +644,21 @@ bool SERCOM::isBusOwnerWIRE( void )
   return sercom->I2CM.STATUS.bit.BUSSTATE == WIRE_OWNER_STATE;
 }
 
+bool SERCOM::isBusUnknownWIRE( void )
+{
+  return sercom->I2CM.STATUS.bit.BUSSTATE == WIRE_UNKNOWN_STATE;
+}
+
+bool SERCOM::isArbLostWIRE( void )
+{
+  return sercom->I2CM.STATUS.bit.ARBLOST == 1;
+}
+
+bool SERCOM::isBusBusyWIRE( void )
+{
+  return sercom->I2CM.STATUS.bit.BUSSTATE == WIRE_BUSY_STATE;
+}
+
 bool SERCOM::isDataReadyWIRE( void )
 {
   return sercom->I2CS.INTFLAG.bit.DRDY;
@@ -669,199 +714,152 @@ uint8_t SERCOM::readDataWIRE( void )
   }
 }
 
+#if defined(__SAMD51__)
+
+static const struct {
+  Sercom   *sercomPtr;
+  uint8_t   id_core;
+  uint8_t   id_slow;
+  IRQn_Type irq[4];
+} sercomData[] = {
+  { SERCOM0, SERCOM0_GCLK_ID_CORE, SERCOM0_GCLK_ID_SLOW,
+    SERCOM0_0_IRQn, SERCOM0_1_IRQn, SERCOM0_2_IRQn, SERCOM0_3_IRQn },
+  { SERCOM1, SERCOM1_GCLK_ID_CORE, SERCOM1_GCLK_ID_SLOW,
+    SERCOM1_0_IRQn, SERCOM1_1_IRQn, SERCOM1_2_IRQn, SERCOM1_3_IRQn },
+  { SERCOM2, SERCOM2_GCLK_ID_CORE, SERCOM2_GCLK_ID_SLOW,
+    SERCOM2_0_IRQn, SERCOM2_1_IRQn, SERCOM2_2_IRQn, SERCOM2_3_IRQn },
+  { SERCOM3, SERCOM3_GCLK_ID_CORE, SERCOM3_GCLK_ID_SLOW,
+    SERCOM3_0_IRQn, SERCOM3_1_IRQn, SERCOM3_2_IRQn, SERCOM3_3_IRQn },
+  { SERCOM4, SERCOM4_GCLK_ID_CORE, SERCOM4_GCLK_ID_SLOW,
+    SERCOM4_0_IRQn, SERCOM4_1_IRQn, SERCOM4_2_IRQn, SERCOM4_3_IRQn },
+  { SERCOM5, SERCOM5_GCLK_ID_CORE, SERCOM5_GCLK_ID_SLOW,
+    SERCOM5_0_IRQn, SERCOM5_1_IRQn, SERCOM5_2_IRQn, SERCOM5_3_IRQn },
+#if defined(SERCOM6)
+  { SERCOM6, SERCOM6_GCLK_ID_CORE, SERCOM6_GCLK_ID_SLOW,
+    SERCOM6_0_IRQn, SERCOM6_1_IRQn, SERCOM6_2_IRQn, SERCOM6_3_IRQn },
+#endif
+#if defined(SERCOM7)
+  { SERCOM7, SERCOM7_GCLK_ID_CORE, SERCOM7_GCLK_ID_SLOW,
+    SERCOM7_0_IRQn, SERCOM7_1_IRQn, SERCOM7_2_IRQn, SERCOM7_3_IRQn },
+#endif
+};
+
+#else // end if SAMD51 (prob SAMD21)
+
+static const struct {
+  Sercom   *sercomPtr;
+  uint8_t   clock;
+  IRQn_Type irqn;
+} sercomData[] = {
+  SERCOM0, GCM_SERCOM0_CORE, SERCOM0_IRQn,
+  SERCOM1, GCM_SERCOM1_CORE, SERCOM1_IRQn,
+  SERCOM2, GCM_SERCOM2_CORE, SERCOM2_IRQn,
+  SERCOM3, GCM_SERCOM3_CORE, SERCOM3_IRQn,
+#if defined(SERCOM4)
+  SERCOM4, GCM_SERCOM4_CORE, SERCOM4_IRQn,
+#endif
+#if defined(SERCOM5)
+  SERCOM5, GCM_SERCOM5_CORE, SERCOM5_IRQn,
+#endif
+};
+
+#endif // end !SAMD51
+
+int8_t SERCOM::getSercomIndex(void) {
+  for(uint8_t i=0; i<(sizeof(sercomData) / sizeof(sercomData[0])); i++) {
+    if(sercom == sercomData[i].sercomPtr) return i;
+  }
+  return -1;
+}
+
+#if defined(__SAMD51__)
+// This is currently for overriding an SPI SERCOM's clock source only --
+// NOT for UART or WIRE SERCOMs, where it will have unintended consequences.
+// It does not check.
+// SERCOM clock source override is available only on SAMD51 (not 21).
+// A dummy function for SAMD21 (compiles to nothing) is present in SERCOM.h
+// so user code doesn't require a lot of conditional situations.
+void SERCOM::setClockSource(int8_t idx, SercomClockSource src, bool core) {
+
+  if(src == SERCOM_CLOCK_SOURCE_NO_CHANGE) return;
+
+  uint8_t clk_id = core ? sercomData[idx].id_core : sercomData[idx].id_slow;
+
+  GCLK->PCHCTRL[clk_id].bit.CHEN = 0;     // Disable timer
+  while(GCLK->PCHCTRL[clk_id].bit.CHEN);  // Wait for disable
+
+  if(core) clockSource = src; // Save SercomClockSource value
+
+  // From cores/arduino/startup.c:
+  // GCLK0 = F_CPU
+  // GCLK1 = 48 MHz
+  // GCLK2 = 100 MHz
+  // GCLK3 = XOSC32K
+  // GCLK4 = 12 MHz
+  if(src == SERCOM_CLOCK_SOURCE_FCPU) {
+    GCLK->PCHCTRL[clk_id].reg =
+      GCLK_PCHCTRL_GEN_GCLK0_Val | (1 << GCLK_PCHCTRL_CHEN_Pos);
+    if(core) freqRef = F_CPU; // Save clock frequency value
+  } else if(src == SERCOM_CLOCK_SOURCE_48M) {
+    GCLK->PCHCTRL[clk_id].reg =
+      GCLK_PCHCTRL_GEN_GCLK1_Val | (1 << GCLK_PCHCTRL_CHEN_Pos);
+    if(core) freqRef = 48000000;
+  } else if(src == SERCOM_CLOCK_SOURCE_100M) {
+    GCLK->PCHCTRL[clk_id].reg =
+      GCLK_PCHCTRL_GEN_GCLK2_Val | (1 << GCLK_PCHCTRL_CHEN_Pos);
+    if(core) freqRef = 100000000;
+  } else if(src == SERCOM_CLOCK_SOURCE_32K) {
+    GCLK->PCHCTRL[clk_id].reg =
+      GCLK_PCHCTRL_GEN_GCLK3_Val | (1 << GCLK_PCHCTRL_CHEN_Pos);
+    if(core) freqRef = 32768;
+  } else if(src == SERCOM_CLOCK_SOURCE_12M) {
+    GCLK->PCHCTRL[clk_id].reg =
+      GCLK_PCHCTRL_GEN_GCLK4_Val | (1 << GCLK_PCHCTRL_CHEN_Pos);
+    if(core) freqRef = 12000000;
+  }
+
+  while(!GCLK->PCHCTRL[clk_id].bit.CHEN); // Wait for clock enable
+}
+#endif
 
 void SERCOM::initClockNVIC( void )
 {
+  int8_t idx = getSercomIndex();
+  if(idx < 0) return; // We got a problem here
 
 #if defined(__SAMD51__)
-	uint32_t clk_core;
-	uint32_t clk_slow;
 
-	if(sercom == SERCOM0)
-	{
-		clk_core = SERCOM0_GCLK_ID_CORE;
-		clk_slow = SERCOM0_GCLK_ID_SLOW;
-
-    NVIC_ClearPendingIRQ(SERCOM0_0_IRQn);
-    NVIC_ClearPendingIRQ(SERCOM0_1_IRQn);
-    NVIC_ClearPendingIRQ(SERCOM0_2_IRQn);
-    NVIC_ClearPendingIRQ(SERCOM0_3_IRQn);
-
-    NVIC_SetPriority (SERCOM0_0_IRQn, (1<<__NVIC_PRIO_BITS) - 1);  /* set Priority */
-    NVIC_SetPriority (SERCOM0_1_IRQn, (1<<__NVIC_PRIO_BITS) - 1); 
-    NVIC_SetPriority (SERCOM0_2_IRQn, (1<<__NVIC_PRIO_BITS) - 1); 
-    NVIC_SetPriority (SERCOM0_3_IRQn, (1<<__NVIC_PRIO_BITS) - 1);
-
-    NVIC_EnableIRQ(SERCOM0_0_IRQn);
-    NVIC_EnableIRQ(SERCOM0_1_IRQn);
-    NVIC_EnableIRQ(SERCOM0_2_IRQn);
-    NVIC_EnableIRQ(SERCOM0_3_IRQn);
+  for(uint8_t i=0; i<4; i++) {
+    NVIC_ClearPendingIRQ(sercomData[idx].irq[i]);
+    NVIC_SetPriority(sercomData[idx].irq[i], SERCOM_NVIC_PRIORITY);
+    NVIC_EnableIRQ(sercomData[idx].irq[i]);
   }
-	else if(sercom == SERCOM1)
-	{
-		clk_core = SERCOM1_GCLK_ID_CORE;
-		clk_slow = SERCOM1_GCLK_ID_SLOW;
 
-    NVIC_ClearPendingIRQ(SERCOM1_0_IRQn);
-    NVIC_ClearPendingIRQ(SERCOM1_1_IRQn);
-    NVIC_ClearPendingIRQ(SERCOM1_2_IRQn);
-    NVIC_ClearPendingIRQ(SERCOM1_3_IRQn);
+  // SPI DMA speed is dictated by the "slow clock" (I think...maybe) so
+  // BOTH are set to the same clock source (clk_slow isn't sourced from
+  // XOSC32K as in prior versions of SAMD core).
+  // This might have power implications for sleep code.
 
-    NVIC_SetPriority (SERCOM1_0_IRQn, (1<<__NVIC_PRIO_BITS) - 1);  /* set Priority */
-    NVIC_SetPriority (SERCOM1_1_IRQn, (1<<__NVIC_PRIO_BITS) - 1); 
-    NVIC_SetPriority (SERCOM1_2_IRQn, (1<<__NVIC_PRIO_BITS) - 1); 
-    NVIC_SetPriority (SERCOM1_3_IRQn, (1<<__NVIC_PRIO_BITS) - 1);
+  setClockSource(idx, clockSource, true);  // true  = core clock
+  setClockSource(idx, clockSource, false); // false = slow clock
 
-    NVIC_EnableIRQ(SERCOM1_0_IRQn);
-    NVIC_EnableIRQ(SERCOM1_1_IRQn);
-    NVIC_EnableIRQ(SERCOM1_2_IRQn);
-    NVIC_EnableIRQ(SERCOM1_3_IRQn);
-	}
-	else if(sercom == SERCOM2)
-	{
-		clk_core = SERCOM2_GCLK_ID_CORE;
-		clk_slow = SERCOM2_GCLK_ID_SLOW;
+#else // end if SAMD51 (prob SAMD21)
 
-    NVIC_ClearPendingIRQ(SERCOM2_0_IRQn);
-    NVIC_ClearPendingIRQ(SERCOM2_1_IRQn);
-    NVIC_ClearPendingIRQ(SERCOM2_2_IRQn);
-    NVIC_ClearPendingIRQ(SERCOM2_3_IRQn);
+  uint8_t   clockId = sercomData[idx].clock;
+  IRQn_Type IdNvic  = sercomData[idx].irqn;
 
-    NVIC_SetPriority (SERCOM2_0_IRQn, (1<<__NVIC_PRIO_BITS) - 1);  /* set Priority */
-    NVIC_SetPriority (SERCOM2_1_IRQn, (1<<__NVIC_PRIO_BITS) - 1); 
-    NVIC_SetPriority (SERCOM2_2_IRQn, (1<<__NVIC_PRIO_BITS) - 1); 
-    NVIC_SetPriority (SERCOM2_3_IRQn, (1<<__NVIC_PRIO_BITS) - 1);
-
-    NVIC_EnableIRQ(SERCOM2_0_IRQn);
-    NVIC_EnableIRQ(SERCOM2_1_IRQn);
-    NVIC_EnableIRQ(SERCOM2_2_IRQn);
-    NVIC_EnableIRQ(SERCOM2_3_IRQn);
-	}
-	else if(sercom == SERCOM3)
-	{
-		clk_core = SERCOM3_GCLK_ID_CORE;
-		clk_slow = SERCOM3_GCLK_ID_SLOW;
-
-    NVIC_ClearPendingIRQ(SERCOM3_0_IRQn);
-    NVIC_ClearPendingIRQ(SERCOM3_1_IRQn);
-    NVIC_ClearPendingIRQ(SERCOM3_2_IRQn);
-    NVIC_ClearPendingIRQ(SERCOM3_3_IRQn);
-
-    NVIC_SetPriority (SERCOM3_0_IRQn, (1<<__NVIC_PRIO_BITS) - 1);  /* set Priority */
-    NVIC_SetPriority (SERCOM3_1_IRQn, (1<<__NVIC_PRIO_BITS) - 1); 
-    NVIC_SetPriority (SERCOM3_2_IRQn, (1<<__NVIC_PRIO_BITS) - 1); 
-    NVIC_SetPriority (SERCOM3_3_IRQn, (1<<__NVIC_PRIO_BITS) - 1);
-
-    NVIC_EnableIRQ(SERCOM3_0_IRQn);
-    NVIC_EnableIRQ(SERCOM3_1_IRQn);
-    NVIC_EnableIRQ(SERCOM3_2_IRQn);
-    NVIC_EnableIRQ(SERCOM3_3_IRQn);
-	}
-	else if(sercom == SERCOM4)
-	{
-		clk_core = SERCOM4_GCLK_ID_CORE;
-		clk_slow = SERCOM4_GCLK_ID_SLOW;
-
-    NVIC_ClearPendingIRQ(SERCOM4_0_IRQn);
-    NVIC_ClearPendingIRQ(SERCOM4_1_IRQn);
-    NVIC_ClearPendingIRQ(SERCOM4_2_IRQn);
-    NVIC_ClearPendingIRQ(SERCOM4_3_IRQn);
-
-    NVIC_SetPriority (SERCOM4_0_IRQn, (1<<__NVIC_PRIO_BITS) - 1);  /* set Priority */
-    NVIC_SetPriority (SERCOM4_1_IRQn, (1<<__NVIC_PRIO_BITS) - 1); 
-    NVIC_SetPriority (SERCOM4_2_IRQn, (1<<__NVIC_PRIO_BITS) - 1); 
-    NVIC_SetPriority (SERCOM4_3_IRQn, (1<<__NVIC_PRIO_BITS) - 1);
-
-    NVIC_EnableIRQ(SERCOM4_0_IRQn);
-    NVIC_EnableIRQ(SERCOM4_1_IRQn);
-    NVIC_EnableIRQ(SERCOM4_2_IRQn);
-    NVIC_EnableIRQ(SERCOM4_3_IRQn);
-	}
-	else if(sercom == SERCOM5)
-	{
-		clk_core = SERCOM5_GCLK_ID_CORE;
-		clk_slow = SERCOM5_GCLK_ID_SLOW;
-
-    NVIC_ClearPendingIRQ(SERCOM5_0_IRQn);
-    NVIC_ClearPendingIRQ(SERCOM5_1_IRQn);
-    NVIC_ClearPendingIRQ(SERCOM5_2_IRQn);
-    NVIC_ClearPendingIRQ(SERCOM5_3_IRQn);
-
-    NVIC_SetPriority (SERCOM5_0_IRQn, (1<<__NVIC_PRIO_BITS) - 1);  /* set Priority */
-    NVIC_SetPriority (SERCOM5_1_IRQn, (1<<__NVIC_PRIO_BITS) - 1); 
-    NVIC_SetPriority (SERCOM5_2_IRQn, (1<<__NVIC_PRIO_BITS) - 1); 
-    NVIC_SetPriority (SERCOM5_3_IRQn, (1<<__NVIC_PRIO_BITS) - 1);
-
-    NVIC_EnableIRQ(SERCOM5_0_IRQn);
-    NVIC_EnableIRQ(SERCOM5_1_IRQn);
-    NVIC_EnableIRQ(SERCOM5_2_IRQn);
-    NVIC_EnableIRQ(SERCOM5_3_IRQn);
-	}
-#else
-
-  IRQn_Type IdNvic=PendSV_IRQn ; // Dummy init to intercept potential error later
-
-  uint8_t clockId = 0;
-  if(sercom == SERCOM0)
-  {
-    clockId = GCM_SERCOM0_CORE;
-    IdNvic = SERCOM0_IRQn;
-  }
-  else if(sercom == SERCOM1)
-  {
-    clockId = GCM_SERCOM1_CORE;
-    IdNvic = SERCOM1_IRQn;
-  }
-  else if(sercom == SERCOM2)
-  {
-    clockId = GCM_SERCOM2_CORE;
-    IdNvic = SERCOM2_IRQn;
-  }
-  else if(sercom == SERCOM3)
-  {
-    clockId = GCM_SERCOM3_CORE;
-    IdNvic = SERCOM3_IRQn;
-  }
-#if defined(SERCOM4)
-  else if(sercom == SERCOM4)
-  {
-    clockId = GCM_SERCOM4_CORE;
-    IdNvic = SERCOM4_IRQn;
-  }
-#endif
-#if defined(SERCOM5)
-  else if(sercom == SERCOM5)
-  {
-    clockId = GCM_SERCOM5_CORE;
-    IdNvic = SERCOM5_IRQn;
-  }
-#endif
-
-  if ( IdNvic == PendSV_IRQn )
-  {
-    // We got a problem here
-    return ;
-  }
-#endif
-
-#if defined(__SAMD51__)
-  GCLK->PCHCTRL[clk_core].reg = GCLK_PCHCTRL_GEN_GCLK1_Val | (1 << GCLK_PCHCTRL_CHEN_Pos);
-  GCLK->PCHCTRL[clk_slow].reg = GCLK_PCHCTRL_GEN_GCLK3_Val | (1 << GCLK_PCHCTRL_CHEN_Pos);
-  
-#else
   // Setting NVIC
   NVIC_ClearPendingIRQ(IdNvic);
-  NVIC_SetPriority (IdNvic, (1<<__NVIC_PRIO_BITS) - 1);  /* set Priority */
+  NVIC_SetPriority(IdNvic, SERCOM_NVIC_PRIORITY);
   NVIC_EnableIRQ(IdNvic);
 
   // Setting clock
-  GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID( clockId ) | // Generic Clock 0 (SERCOMx)
+  GCLK->CLKCTRL.reg =
+    GCLK_CLKCTRL_ID( clockId ) | // Generic Clock 0 (SERCOMx)
     GCLK_CLKCTRL_GEN_GCLK0     | // Generic Clock Generator 0 is source
     GCLK_CLKCTRL_CLKEN;
 
-  while ( GCLK->STATUS.reg & GCLK_STATUS_SYNCBUSY )
-  {
-    /* Wait for synchronization */
-  }
-#endif
+  while(GCLK->STATUS.reg & GCLK_STATUS_SYNCBUSY); // Wait for synchronization
+
+#endif // end !SAMD51
 }

cores/arduino/SERCOM.h

@@ -21,6 +21,17 @@
 
 #include "sam.h"
 
+// SAMD51 has configurable MAX_SPI, else use peripheral clock default.
+// Update: changing MAX_SPI via compiler flags is DEPRECATED, because
+// this affects ALL SPI peripherals including some that should NOT be
+// changed (e.g. anything using SD card). Instead, use setClockSource().
+// This is left here for compatibility w/interim MAX_SPI-dependent code:
+#if defined(MAX_SPI)
+  #define SERCOM_SPI_FREQ_REF (MAX_SPI * 2)
+#else
+  #define SERCOM_SPI_FREQ_REF 48000000ul
+#endif
+// Other SERCOM peripherals always use the 48 MHz clock
 #define SERCOM_FREQ_REF       48000000ul
 #define SERCOM_NVIC_PRIORITY  ((1<<__NVIC_PRIO_BITS) - 1)
 
@@ -141,6 +152,19 @@ typedef enum
 	WIRE_MASTER_NACK_ACTION
 } SercomMasterAckActionWire;
 
+// SERCOM clock source override is available only on SAMD51 (not 21)
+// but the enumeration is made regardless so user code doesn't need
+// ifdefs or lengthy comments explaining the different situations --
+// the clock-sourcing functions just compile to nothing on SAMD21.
+typedef enum {
+  SERCOM_CLOCK_SOURCE_FCPU,     // F_CPU clock (GCLK0)
+  SERCOM_CLOCK_SOURCE_48M,      // 48 MHz peripheral clock (GCLK1) (standard)
+  SERCOM_CLOCK_SOURCE_100M,     // 100 MHz peripheral clock (GCLK2)
+  SERCOM_CLOCK_SOURCE_32K,      // XOSC32K clock (GCLK3)
+  SERCOM_CLOCK_SOURCE_12M,      // 12 MHz peripheral clock (GCLK4)
+  SERCOM_CLOCK_SOURCE_NO_CHANGE // Leave clock source setting unchanged
+} SercomClockSource;
+
 class SERCOM
 {
 	public:
@@ -171,7 +195,6 @@ class SERCOM
 		/* ========== SPI ========== */
 		void initSPI(SercomSpiTXPad mosi, SercomRXPad miso, SercomSpiCharSize charSize, SercomDataOrder dataOrder) ;
 		void initSPIClock(SercomSpiClockMode clockMode, uint32_t baudrate) ;
-
 		void resetSPI( void ) ;
 		void enableSPI( void ) ;
 		void disableSPI( void ) ;
@@ -202,6 +225,9 @@ class SERCOM
 		bool isSlaveWIRE( void ) ;
 		bool isBusIdleWIRE( void ) ;
 		bool isBusOwnerWIRE( void ) ;
+		bool isBusUnknownWIRE( void ) ;
+		bool isArbLostWIRE( void );
+		bool isBusBusyWIRE( void );
 		bool isDataReadyWIRE( void ) ;
 		bool isStopDetectedWIRE( void ) ;
 		bool isRestartDetectedWIRE( void ) ;
@@ -210,9 +236,29 @@ class SERCOM
     bool isRXNackReceivedWIRE( void ) ;
 		int availableWIRE( void ) ;
 		uint8_t readDataWIRE( void ) ;
+		int8_t getSercomIndex(void);
+#if defined(__SAMD51__)
+		// SERCOM clock source override is only available on
+		// SAMD51 (not 21) ... but these functions are declared
+		// regardless so user code doesn't need ifdefs or lengthy
+		// comments explaining the different situations -- these
+		// just compile to nothing on SAMD21.
+		void setClockSource(int8_t idx, SercomClockSource src, bool core);
+		SercomClockSource getClockSource(void) { return clockSource; };
+		uint32_t getFreqRef(void) { return freqRef; };
+#else
+		// The equivalent SAMD21 dummy functions...
+		void setClockSource(int8_t idx, SercomClockSource src, bool core) { (void)idx; (void)src; (void)core; };
+		SercomClockSource getClockSource(void) { return SERCOM_CLOCK_SOURCE_FCPU; };
+		uint32_t getFreqRef(void) { return F_CPU; };
+#endif
 
 	private:
 		Sercom* sercom;
+#if defined(__SAMD51__)
+                SercomClockSource clockSource;
+                uint32_t freqRef; // Frequency corresponding to clockSource
+#endif
 		uint8_t calculateBaudrateSynchronous(uint32_t baudrate);
 		uint32_t division(uint32_t dividend, uint32_t divisor) ;
 		void initClockNVIC( void ) ;

cores/arduino/Stream.cpp

@@ -35,6 +35,7 @@ int Stream::timedRead()
   do {
     c = read();
     if (c >= 0) return c;
+    yield(); // running TinyUSB task
   } while(millis() - _startMillis < _timeout);
   return -1;     // -1 indicates timeout
 }
@@ -47,6 +48,7 @@ int Stream::timedPeek()
   do {
     c = peek();
     if (c >= 0) return c;
+    yield(); // running TinyUSB task
   } while(millis() - _startMillis < _timeout);
   return -1;     // -1 indicates timeout
 }

cores/arduino/TinyUSB/Adafruit_TinyUSB_ArduinoCore

@@ -0,0 +1 @@
+Subproject commit e7b892095f2bb5d8bef6a748238369bdd268ed5e

cores/arduino/TinyUSB/Adafruit_TinyUSB_SAMD.cpp

@@ -0,0 +1,195 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019, hathach for Adafruit
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifdef USE_TINYUSB
+
+#include "Arduino.h"
+#include "Adafruit_TinyUSB_Core.h"
+#include <Reset.h> // Needed for auto-reset with 1200bps port touch
+
+//--------------------------------------------------------------------+
+// Forward USB interrupt events to TinyUSB IRQ Handler
+//--------------------------------------------------------------------+
+extern "C"
+{
+#if defined(__SAMD51__)
+
+void USB_0_Handler (void) { tud_int_handler(0); }
+void USB_1_Handler (void) { tud_int_handler(0); }
+void USB_2_Handler (void) { tud_int_handler(0); }
+void USB_3_Handler (void) { tud_int_handler(0); }
+
+#else
+
+void USB_Handler(void) { tud_int_handler(0); }
+
+#endif
+} // extern C
+
+
+
+//--------------------------------------------------------------------+
+// MACRO TYPEDEF CONSTANT ENUM DECLARATION
+//--------------------------------------------------------------------+
+static void usb_hardware_init(void);
+
+#if CFG_TUSB_DEBUG
+extern "C" int serial1_printf(const char *__restrict format, ...)
+{
+  char buf[PRINTF_BUF];
+  va_list ap;
+  va_start(ap, format);
+  vsnprintf(buf, sizeof(buf), format, ap);
+  Serial1.write(buf);
+  va_end(ap);
+
+}
+#endif
+
+//--------------------------------------------------------------------+
+// Core Init & Touch1200
+//--------------------------------------------------------------------+
+void Adafruit_TinyUSB_Core_init(void)
+{
+#if CFG_TUSB_DEBUG
+  Serial1.begin(115200);
+  serial1_printf("TinyUSB debugging with Serial1\n");
+#endif
+
+  Serial.setStringDescriptor("TinyUSB Serial");
+  USBDevice.addInterface(Serial);
+  USBDevice.setID(USB_VID, USB_PID);
+  USBDevice.begin();
+
+  usb_hardware_init();
+
+  // Init tinyusb stack
+  tusb_init();
+}
+
+void Adafruit_TinyUSB_Core_touch1200(void)
+{
+  initiateReset(250);
+}
+
+//--------------------------------------------------------------------+
+// Adafruit_USBD_Device platform dependent
+//--------------------------------------------------------------------+
+
+uint8_t Adafruit_USBD_Device::getSerialDescriptor(uint16_t* serial_str)
+{
+  enum { SERIAL_BYTE_LEN = 16 };
+
+#ifdef __SAMD51__
+  uint32_t* id_addresses[4] = {(uint32_t *) 0x008061FC, (uint32_t *) 0x00806010,
+                               (uint32_t *) 0x00806014, (uint32_t *) 0x00806018};
+#else // samd21
+  uint32_t* id_addresses[4] = {(uint32_t *) 0x0080A00C, (uint32_t *) 0x0080A040,
+                               (uint32_t *) 0x0080A044, (uint32_t *) 0x0080A048};
+
+#endif
+
+  uint8_t raw_id[SERIAL_BYTE_LEN];
+
+  for (int i=0; i<4; i++) {
+      for (int k=0; k<4; k++) {
+          raw_id[4 * i + (3 - k)] = (*(id_addresses[i]) >> k * 8) & 0xff;
+      }
+  }
+
+  static const char nibble_to_hex[16] = {'0', '1', '2', '3', '4', '5', '6', '7', '8', '9', 'A', 'B', 'C', 'D', 'E', 'F'};
+
+  for (unsigned int i = 0; i < sizeof(raw_id); i++) {
+    for (int j = 0; j < 2; j++) {
+      uint8_t nibble = (raw_id[i] >> (j * 4)) & 0xf;
+      // Strings are UTF-16-LE encoded.
+      serial_str[i * 2 + (1 - j)] = nibble_to_hex[nibble];
+    }
+  }
+
+  return sizeof(raw_id)*2;
+}
+
+//--------------------------------------------------------------------+
+// Helpers
+//--------------------------------------------------------------------+
+
+// Init usb hardware when starting up. Softdevice is not enabled yet
+static void usb_hardware_init(void)
+{
+#ifdef PIN_LED_TXL
+//	txLEDPulse = 0;
+	pinMode(PIN_LED_TXL, OUTPUT);
+	digitalWrite(PIN_LED_TXL, HIGH);
+#endif
+
+#ifdef PIN_LED_RXL
+//	rxLEDPulse = 0;
+	pinMode(PIN_LED_RXL, OUTPUT);
+	digitalWrite(PIN_LED_RXL, HIGH);
+#endif
+
+	/* Enable USB clock */
+#if defined(__SAMD51__)
+	MCLK->APBBMASK.reg |= MCLK_APBBMASK_USB;
+	MCLK->AHBMASK.reg |= MCLK_AHBMASK_USB;
+
+	// Set up the USB DP/DN pins
+	PORT->Group[0].PINCFG[PIN_PA24H_USB_DM].bit.PMUXEN = 1;
+	PORT->Group[0].PMUX[PIN_PA24H_USB_DM/2].reg &= ~(0xF << (4 * (PIN_PA24H_USB_DM & 0x01u)));
+	PORT->Group[0].PMUX[PIN_PA24H_USB_DM/2].reg |= MUX_PA24H_USB_DM << (4 * (PIN_PA24H_USB_DM & 0x01u));
+	PORT->Group[0].PINCFG[PIN_PA25H_USB_DP].bit.PMUXEN = 1;
+	PORT->Group[0].PMUX[PIN_PA25H_USB_DP/2].reg &= ~(0xF << (4 * (PIN_PA25H_USB_DP & 0x01u)));
+	PORT->Group[0].PMUX[PIN_PA25H_USB_DP/2].reg |= MUX_PA25H_USB_DP << (4 * (PIN_PA25H_USB_DP & 0x01u));
+
+
+	GCLK->PCHCTRL[USB_GCLK_ID].reg = GCLK_PCHCTRL_GEN_GCLK1_Val | (1 << GCLK_PCHCTRL_CHEN_Pos);
+
+	NVIC_SetPriority(USB_0_IRQn, 0UL);
+	NVIC_SetPriority(USB_1_IRQn, 0UL);
+	NVIC_SetPriority(USB_2_IRQn, 0UL);
+	NVIC_SetPriority(USB_3_IRQn, 0UL);
+#else
+	PM->APBBMASK.reg |= PM_APBBMASK_USB;
+
+	// Set up the USB DP/DN pins
+	PORT->Group[0].PINCFG[PIN_PA24G_USB_DM].bit.PMUXEN = 1;
+	PORT->Group[0].PMUX[PIN_PA24G_USB_DM/2].reg &= ~(0xF << (4 * (PIN_PA24G_USB_DM & 0x01u)));
+	PORT->Group[0].PMUX[PIN_PA24G_USB_DM/2].reg |= MUX_PA24G_USB_DM << (4 * (PIN_PA24G_USB_DM & 0x01u));
+	PORT->Group[0].PINCFG[PIN_PA25G_USB_DP].bit.PMUXEN = 1;
+	PORT->Group[0].PMUX[PIN_PA25G_USB_DP/2].reg &= ~(0xF << (4 * (PIN_PA25G_USB_DP & 0x01u)));
+	PORT->Group[0].PMUX[PIN_PA25G_USB_DP/2].reg |= MUX_PA25G_USB_DP << (4 * (PIN_PA25G_USB_DP & 0x01u));
+
+	// Put Generic Clock Generator 0 as source for Generic Clock Multiplexer 6 (USB reference)
+	GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID(6)     | // Generic Clock Multiplexer 6
+	GCLK_CLKCTRL_GEN_GCLK0 | // Generic Clock Generator 0 is source
+	GCLK_CLKCTRL_CLKEN;
+	while (GCLK->STATUS.bit.SYNCBUSY)
+	;
+
+	NVIC_SetPriority((IRQn_Type) USB_IRQn, 0UL);
+#endif
+}
+
+#endif // USE_TINYUSB

cores/arduino/TinyUSB/tusb_config.h

@@ -0,0 +1,93 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2018, hathach for Adafruit
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef _TUSB_CONFIG_H_
+#define _TUSB_CONFIG_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------
+// COMMON CONFIGURATION
+//--------------------------------------------------------------------
+#ifdef __SAMD51__
+  #define CFG_TUSB_MCU                OPT_MCU_SAMD51
+#else
+  #define CFG_TUSB_MCU                OPT_MCU_SAMD21
+#endif
+
+#ifdef USE_TINYUSB
+  #define CFG_TUSB_RHPORT0_MODE       OPT_MODE_DEVICE
+#else
+  #define CFG_TUSB_RHPORT0_MODE       OPT_MODE_NONE
+#endif
+
+#define CFG_TUSB_OS                 OPT_OS_NONE
+
+#define CFG_TUSB_DEBUG              0
+#if CFG_TUSB_DEBUG
+  #define tu_printf                 serial1_printf
+  extern int serial1_printf(const char *__restrict __format, ...);
+#endif
+
+#define CFG_TUSB_MEM_SECTION
+#define CFG_TUSB_MEM_ALIGN          TU_ATTR_ALIGNED(4)
+
+//--------------------------------------------------------------------
+// DEVICE CONFIGURATION
+//--------------------------------------------------------------------
+
+#define CFG_TUD_ENDOINT0_SIZE       64
+
+//------------- CLASS -------------//
+#define CFG_TUD_CDC                 1
+#define CFG_TUD_MSC                 1
+#define CFG_TUD_HID                 1
+#define CFG_TUD_MIDI                1
+#define CFG_TUD_VENDOR              1
+
+// CDC FIFO size of TX and RX
+#define CFG_TUD_CDC_RX_BUFSIZE      256
+#define CFG_TUD_CDC_TX_BUFSIZE      256
+
+// MSC Buffer size of Device Mass storage
+#define CFG_TUD_MSC_BUFSIZE         512
+
+// HID buffer size Should be sufficient to hold ID (if any) + Data
+#define CFG_TUD_HID_BUFSIZE         64
+
+// MIDI FIFO size of TX and RX
+#define CFG_TUD_MIDI_RX_BUFSIZE     128
+#define CFG_TUD_MIDI_TX_BUFSIZE     128
+
+// Vendor FIFO size of TX and RX
+#define CFG_TUD_VENDOR_RX_BUFSIZE   64
+#define CFG_TUD_VENDOR_TX_BUFSIZE   64
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* _TUSB_CONFIG_H_ */

cores/arduino/Tone.cpp

@@ -20,12 +20,6 @@
 #include "Tone.h"
 #include "variant.h"
 
-#if defined(__SAMD51__) 
-#define WAIT_TC16_REGS_SYNC(x) while(x->COUNT16.SYNCBUSY.bit.ENABLE);
-#else
-#define WAIT_TC16_REGS_SYNC(x) while(x->COUNT16.STATUS.bit.SYNCBUSY);
-#endif
-
 uint32_t toneMaxFrequency = F_CPU / 2;
 uint32_t lastOutputPin = 0xFFFFFFFF;
 
@@ -37,22 +31,24 @@ volatile bool toneIsActive = false;
 volatile bool firstTimeRunning = false;
 
 #if defined(__SAMD51__)
-#define TONE_TC         TC2
-#define TONE_TC_IRQn    TC2_IRQn
-#define TONE_TC_GCLK_ID	TC2_GCLK_ID
+  #define TONE_TC         TC0
+  #define TONE_TC_IRQn    TC0_IRQn
+  #define TONE_TC_GCLK_ID	TC0_GCLK_ID
+  #define Tone_Handler    TC0_Handler
+
+  #define WAIT_TC16_REGS_SYNC(x) while(x->COUNT16.SYNCBUSY.bit.ENABLE);
+
 #else
   #define TONE_TC         TC5
   #define TONE_TC_IRQn    TC5_IRQn
+  #define Tone_Handler    TC5_Handler
+
+  #define WAIT_TC16_REGS_SYNC(x) while(x->COUNT16.STATUS.bit.SYNCBUSY);
 #endif
+
 #define TONE_TC_TOP     0xFFFF
 #define TONE_TC_CHANNEL 0
 
-#if defined(__SAMD51__)
-void TC2_Handler (void) __attribute__ ((weak, alias("Tone_Handler")));
-#else
-void TC5_Handler (void) __attribute__ ((weak, alias("Tone_Handler")));
-#endif
-
 static inline void resetTC (Tc* TCx)
 {
   // Disable TCx
@@ -72,6 +68,14 @@ void toneAccurateClock (uint32_t accurateSystemCoreClockFrequency)
 
 void tone (uint32_t outputPin, uint32_t frequency, uint32_t duration)
 {
+
+  // Avoid divide by zero error by calling 'noTone' instead
+  if (frequency == 0)
+  {
+    noTone(outputPin);
+    return;
+  }
+
   // Configure interrupt request
   NVIC_DisableIRQ(TONE_TC_IRQn);
   NVIC_ClearPendingIRQ(TONE_TC_IRQn);
@@ -80,7 +84,7 @@ void tone (uint32_t outputPin, uint32_t frequency, uint32_t duration)
   {
     firstTimeRunning = true;
     
-    NVIC_SetPriority(TONE_TC_IRQn, 0);
+    NVIC_SetPriority(TONE_TC_IRQn, 5);
 
 #if defined(__SAMD51__)
     GCLK->PCHCTRL[TONE_TC_GCLK_ID].reg = GCLK_PCHCTRL_GEN_GCLK0_Val | (1 << GCLK_PCHCTRL_CHEN_Pos);
@@ -91,9 +95,6 @@ void tone (uint32_t outputPin, uint32_t frequency, uint32_t duration)
 #endif
   }
   
-  //if it's a rest, set to 1Hz (below audio range)
-  frequency = (frequency > 0 ? frequency : 1);
-  
   if (toneIsActive && (outputPin != lastOutputPin))
     noTone(lastOutputPin);
 
@@ -136,7 +137,7 @@ void tone (uint32_t outputPin, uint32_t frequency, uint32_t duration)
     default: break;
   }
 
-  toggleCount = (duration > 0 ? frequency * duration * 2 / 1000UL : -1);
+  toggleCount = (duration > 0 ? frequency * duration * 2 / 1000UL : -1LL);
 
   resetTC(TONE_TC);
 
@@ -178,11 +179,21 @@ void tone (uint32_t outputPin, uint32_t frequency, uint32_t duration)
 }
 
 void noTone (uint32_t outputPin)
+{
+  /* 'tone' need to run at least once in order to enable GCLK for
+   * the timers used for the tone-functionality. If 'noTone' is called
+   * without ever calling 'tone' before then 'WAIT_TC16_REGS_SYNC(TCx)'
+   * will wait infinitely. The variable 'firstTimeRunning' is set the
+   * 1st time 'tone' is set so it can be used to detect wether or not
+   * 'tone' has been called before.
+   */
+  if(firstTimeRunning)
   {
     resetTC(TONE_TC);
     digitalWrite(outputPin, LOW);
     toneIsActive = false;
   }
+}
 
 #ifdef __cplusplus
 extern "C" {

cores/arduino/USB/CDC.cpp

@@ -16,6 +16,8 @@
   Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
 */
 
+#ifndef USE_TINYUSB
+
 #include <Arduino.h>
 #include <Reset.h> // Needed for auto-reset with 1200bps port touch
 
@@ -150,6 +152,7 @@ void Serial_::begin(uint32_t /* baud_count */, uint8_t /* config */)
 
 void Serial_::end(void)
 {
+	memset((void*)&_usbLineInfo, 0, sizeof(_usbLineInfo));
 }
 
 int Serial_::available(void)
@@ -259,3 +262,5 @@ Serial_::operator bool()
 Serial_ Serial(USBDevice);
 
 #endif
+
+#endif // USE_TINYUSB

cores/arduino/USB/PluggableUSB.cpp

@@ -17,6 +17,8 @@
   Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
 */
 
+#ifndef USE_TINYUSB
+
 #include "USBAPI.h"
 #include "USBDesc.h"
 #include "USBCore.h"
@@ -114,3 +116,5 @@ PluggableUSB_::PluggableUSB_() : lastIf(CDC_ACM_INTERFACE + CDC_INTERFACE_COUNT)
 
 #endif
 #endif
+
+#endif // USE_TINYUSB

cores/arduino/USB/SAMD21_USBDevice.cpp

@@ -5,6 +5,7 @@
  *      Author: deanm
  */
 
+#ifndef USE_TINYUSB
 
 #include "SAMD21_USBDevice.h"
 
@@ -36,3 +37,5 @@ void USBDevice_SAMD21G18x::calibrate() {
     usb.PADCAL.bit.TRANSP = pad_transp;
     usb.PADCAL.bit.TRIM   = pad_trim;
 }
+
+#endif // USE_TINYUSB

cores/arduino/USB/SAMD21_USBDevice.h

@@ -237,7 +237,7 @@ public:
 		release();
 	}
 
-	~DoubleBufferedEPOutHandler() {
+	virtual ~DoubleBufferedEPOutHandler() {
 		free((void*)data0);
 		free((void*)data1);
 	}

cores/arduino/USB/USBAPI.h

@@ -65,6 +65,7 @@ public:
 
 	// USB Device API
 	void init();
+	bool end();
 	bool attach();
 	bool detach();
 	void setAddress(uint32_t addr);

cores/arduino/USB/USBCore.cpp

@@ -16,7 +16,7 @@
   License along with this library; if not, write to the Free Software
   Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
 */
-
+#ifndef USE_TINYUSB
 #if defined(USBCON)
 
 #include <Arduino.h>
@@ -244,26 +244,25 @@ bool USBDeviceClass::sendDescriptor(USBSetup &setup)
 		}
 		else if (setup.wValueL == ISERIAL) {
 #ifdef PLUGGABLE_USB_ENABLED
-#if defined(__SAMD51__)
-			char name[ISERIAL_MAX_LEN];
-			PluggableUSB().getShortName(name);
-			return sendStringDescriptor((uint8_t*)name, setup.wLength);
-#else
+#ifdef __SAMD51__
+			#define SERIAL_NUMBER_WORD_0	*(volatile uint32_t*)(0x008061FC)
+			#define SERIAL_NUMBER_WORD_1	*(volatile uint32_t*)(0x00806010)
+			#define SERIAL_NUMBER_WORD_2	*(volatile uint32_t*)(0x00806014)
+			#define SERIAL_NUMBER_WORD_3	*(volatile uint32_t*)(0x00806018)
+#else // samd21
 			// from section 9.3.3 of the datasheet
 			#define SERIAL_NUMBER_WORD_0	*(volatile uint32_t*)(0x0080A00C)
 			#define SERIAL_NUMBER_WORD_1	*(volatile uint32_t*)(0x0080A040)
 			#define SERIAL_NUMBER_WORD_2	*(volatile uint32_t*)(0x0080A044)
 			#define SERIAL_NUMBER_WORD_3	*(volatile uint32_t*)(0x0080A048)
-
+#endif
 			char name[ISERIAL_MAX_LEN];
 			utox8(SERIAL_NUMBER_WORD_0, &name[0]);
 			utox8(SERIAL_NUMBER_WORD_1, &name[8]);
 			utox8(SERIAL_NUMBER_WORD_2, &name[16]);
 			utox8(SERIAL_NUMBER_WORD_3, &name[24]);
-
-			PluggableUSB().getShortName(&name[32]);
+			name[32] = '\0';
 			return sendStringDescriptor((uint8_t*)name, setup.wLength);
-#endif
 #endif
 		}
 		else {
@@ -434,6 +433,13 @@ bool USBDeviceClass::detach()
 	return true;
 }
 
+bool USBDeviceClass::end() {
+	if (!initialized)
+		return false;
+	usbd.disable();
+	return true;
+}
+
 bool USBDeviceClass::configured()
 {
 	return _usbConfiguration != 0;
@@ -871,6 +877,7 @@ bool USBDeviceClass::handleStandardSetup(USBSetup &setup)
 			sendZlp(0);
 			return true;
 		}
+		return false;
 
 	case SET_ADDRESS:
 		setAddress(setup.wValueL);
@@ -1032,3 +1039,4 @@ void USBDeviceClass::ISRHandler()
 USBDeviceClass USBDevice;
 
 #endif
+#endif // USE_TINYUSB

cores/arduino/USB/USBCore.h

@@ -101,7 +101,7 @@
 // bMaxPower in Configuration Descriptor
 #define USB_CONFIG_POWER_MA(mA)                ((mA)/2)
 #ifndef USB_CONFIG_POWER
- #define USB_CONFIG_POWER                      (500)
+ #define USB_CONFIG_POWER                      (100)
 #endif
 
 #define CDC_V1_10                               0x0110

cores/arduino/USB/samd21_host.c

@@ -17,6 +17,7 @@
   Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
 */
 
+#ifndef USE_TINYUSB
 
 #include <stdio.h>
 #include <stdint.h>
@@ -63,7 +64,6 @@ void UHD_Init(void)
 	uint32_t pad_transn;
 	uint32_t pad_transp;
 	uint32_t pad_trim;
-	uint32_t i;
 
 	USB_SetHandler(&UHD_Handler);
 
@@ -172,10 +172,7 @@ void UHD_Init(void)
 	USB->HOST.DESCADD.reg = (uint32_t)(&usb_pipe_table[0]);
 	// For USB_SPEED_FULL
 	uhd_force_full_speed();
-	for (i = 0; i < sizeof(usb_pipe_table); i++)
-	{
-		(*(uint32_t *)(&usb_pipe_table[0] + i)) = 0;
-	}
+	memset((void *)usb_pipe_table, 0, sizeof(usb_pipe_table));
 
 	uhd_state = UHD_STATE_NO_VBUS;
 
@@ -557,3 +554,5 @@ uint32_t UHD_Pipe_Is_Transfer_Complete(uint32_t ul_pipe, uint32_t ul_token_type)
 // }
 
 #endif //  HOST_DEFINED
+
+#endif // USE_TINYUSB

cores/arduino/WInterrupts.c

@@ -93,31 +93,19 @@ void attachInterrupt(uint32_t pin, voidFuncPtr callback, uint32_t mode)
 		__initialize();
 		enabled = 1;
 	}
+	uint32_t inMask = (1UL << in);
+	// Enable wakeup capability on pin in case being used during sleep
+	#if defined(__SAMD51__)
+	//I believe this is done automatically
+	#else
+	EIC->WAKEUP.reg |= (1 << in);
+	#endif
 
 	// Only store when there is really an ISR to call.
 	// This allow for calling attachInterrupt(pin, NULL, mode), we set up all needed register
 	// but won't service the interrupt, this way we also don't need to check it inside the ISR.
 	if (callback)
 	{
-    // Store interrupts to service in order of when they were attached
-    // to allow for first come first serve handler
-    uint32_t current = 0;
-    uint32_t inMask = (1UL << in);
-
-    // Check if we already have this interrupt
-    for (current=0; current<nints; current++) {
-      if (ISRlist[current] == inMask) {
-        break;
-      }
-    }
-    if (current == nints) {
-      // Need to make a new entry
-      nints++;
-    }
-    ISRlist[current] = inMask;       // List of interrupt in order of when they were attached
-    ISRcallback[current] = callback; // List of callback adresses
-  }
-
 		if (in == EXTERNAL_INT_NMI) {
 			EIC->NMIFLAG.bit.NMI = 1; // Clear flag
 			switch (mode) {
@@ -147,34 +135,41 @@ void attachInterrupt(uint32_t pin, voidFuncPtr callback, uint32_t mode)
 
 		} else { // Not NMI, is external interrupt
 
-    // Enable wakeup capability on pin in case being used during sleep
-#if defined(__SAMD51__)
-//I believe this is done automatically
-#else
-    EIC->WAKEUP.reg |= (1 << in);
-#endif
-
 			// Assign pin to EIC
 			pinPeripheral(pin, PIO_EXTINT);
 
-    // Assign callback to interrupt
-    ISRcallback[in] = callback;
+			// Store interrupts to service in order of when they were attached
+			// to allow for first come first serve handler
+			uint32_t current = 0;
+
+			// Check if we already have this interrupt
+			for (current=0; current<nints; current++) {
+			  if (ISRlist[current] == inMask) {
+				break;
+			  }
+			}
+			if (current == nints) {
+			  // Need to make a new entry
+			  nints++;
+			}
+			ISRlist[current] = inMask;       // List of interrupt in order of when they were attached
+			ISRcallback[current] = callback; // List of callback adresses
 
 			// Look for right CONFIG register to be addressed
 			if (in > EXTERNAL_INT_7) {
 			  config = 1;
+			  pos = (in - 8) << 2;
 			} else {
 			  config = 0;
+			  pos = in << 2;
 			}
 
-    // Configure the interrupt mode
-    pos = (in - (8 * config)) << 2;
-
 			#if defined (__SAMD51__)
 			EIC->CTRLA.bit.ENABLE = 0;
 			while (EIC->SYNCBUSY.bit.ENABLE == 1) { }
 			#endif
 
+			EIC->CONFIG[config].reg &=~ (EIC_CONFIG_SENSE0_Msk << pos); // Reset sense mode, important when changing trigger mode during runtime
 			switch (mode)
 			{
 			  case LOW:
@@ -200,6 +195,7 @@ void attachInterrupt(uint32_t pin, voidFuncPtr callback, uint32_t mode)
 		}
 		// Enable the interrupt
 		EIC->INTENSET.reg = EIC_INTENSET_EXTINT(1 << in);
+	}
 
 	#if defined (__SAMD51__)
 	EIC->CTRLA.bit.ENABLE = 1;
@@ -254,17 +250,22 @@ void detachInterrupt(uint32_t pin)
  * External Interrupt Controller NVIC Interrupt Handler
  */
 #if defined(__SAMD51__)
-void InterruptHandler(uint32_t i)
+void InterruptHandler(uint32_t unused_i)
 {
-  if ((EIC->INTFLAG.reg & (1 << i)) != 0)
-  {
-    // Call the callback function if assigned
-    if (ISRcallback[i]) {
-      ISRcallback[i]();
-    }
+  (void)unused_i;
+  // Calling the routine directly from -here- takes about 1us
+  // Depending on where you are in the list it will take longer
 
+  // Loop over all enabled interrupts in the list
+  for (uint32_t i=0; i<nints; i++)
+  {
+	if ((EIC->INTFLAG.reg & ISRlist[i]) != 0)
+	{
+	  // Call the callback function
+	  ISRcallback[i]();
 	  // Clear the interrupt
-    EIC->INTFLAG.reg = 1 << i;
+	  EIC->INTFLAG.reg = ISRlist[i];
+	}
   }
 }
 

cores/arduino/WInterrupts.h

@@ -31,7 +31,7 @@ extern "C" {
 #define FALLING 3
 #define RISING 4
 
-#define DEFAULT 1
+//#define DEFAULT 1
 #define EXTERNAL 0
 
 typedef void (*voidFuncPtr)(void);

cores/arduino/WVariant.h

@@ -57,10 +57,41 @@ typedef enum _EAnalogChannel
   ADC_Channel19=19,
   DAC_Channel0,
   DAC_Channel1,
+  ADC_Channel_Bandgap=0x1B,
+  ADC_Channel_PTAT=0x1C,
 } EAnalogChannel ;
 
 #if defined(__SAMD51__)
 
+#if defined(__SAMD51G19A__)
+
+typedef enum _ETCChannel
+{
+  NOT_ON_TIMER=-1,
+  TCC0_CH0 = (0<<8)|(0),
+  TCC0_CH1 = (0<<8)|(1),
+  TCC0_CH2 = (0<<8)|(2),
+  TCC0_CH3 = (0<<8)|(3),
+  TCC0_CH4 = (0<<8)|(4),
+  TCC0_CH5 = (0<<8)|(5),
+  TCC1_CH0 = (1<<8)|(0),
+  TCC1_CH1 = (1<<8)|(1),
+  TCC1_CH2 = (1<<8)|(2),
+  TCC1_CH3 = (1<<8)|(3),
+  TCC2_CH0 = (2<<8)|(0),
+  TCC2_CH1 = (2<<8)|(1),
+  TCC2_CH2 = (2<<8)|(2),
+  TC0_CH0 =  (3<<8)|(0),
+  TC0_CH1 =  (3<<8)|(1),
+  TC1_CH0 =  (4<<8)|(0),
+  TC1_CH1 =  (4<<8)|(1),
+  TC2_CH0 =  (5<<8)|(0),
+  TC2_CH1 =  (5<<8)|(1),
+  TC3_CH0 =  (6<<8)|(0),
+  TC3_CH1 =  (6<<8)|(1),
+} ETCChannel ;
+#elif defined(__SAMD51J19A__) || defined(__SAMD51J20A__)
+
 typedef enum _ETCChannel
 {
   NOT_ON_TIMER=-1,
@@ -76,12 +107,82 @@ typedef enum _ETCChannel
   TCC1_CH1 = (1<<8)|(1),
   TCC1_CH2 = (1<<8)|(2),
   TCC1_CH3 = (1<<8)|(3),
-  TCC1_CH4 = (1<<8)|(0),
-  TCC1_CH5 = (1<<8)|(1),
-  TCC1_CH6 = (1<<8)|(2),
-  TCC1_CH7 = (1<<8)|(3),
+  TCC1_CH4 = (1<<8)|(4),
+  TCC1_CH5 = (1<<8)|(5),
+  TCC1_CH6 = (1<<8)|(6),
+  TCC1_CH7 = (1<<8)|(7),
+  TCC2_CH0 = (2<<8)|(0),
+  TCC2_CH1 = (2<<8)|(1),
+  TCC2_CH2 = (2<<8)|(2),
+  TCC3_CH0 = (3<<8)|(0),
+  TCC3_CH1 = (3<<8)|(1),
+  TCC4_CH0 = (4<<8)|(0),
+  TCC4_CH1 = (4<<8)|(1),
+  TC0_CH0 =  (5<<8)|(0),
+  TC0_CH1 =  (5<<8)|(1),
+  TC1_CH0 =  (6<<8)|(0),
+  TC1_CH1 =  (6<<8)|(1),
+  TC2_CH0 =  (7<<8)|(0),
+  TC2_CH1 =  (7<<8)|(1),
+  TC3_CH0 =  (8<<8)|(0),
+  TC3_CH1 =  (8<<8)|(1),
+  TC4_CH0 =  (9<<8)|(0),
+  TC4_CH1 =  (9<<8)|(1),
+  TC5_CH0 =  (10<<8)|(0),
+  TC5_CH1 =  (10<<8)|(1),
+  TC6_CH0 =  (11<<8)|(0),
+  TC6_CH1 =  (11<<8)|(1),
+  TC7_CH0 =  (12<<8)|(0),
+  TC7_CH1 =  (12<<8)|(1),
 } ETCChannel ;
 
+#elif defined(__SAMD51P19A__) || defined(__SAMD51P20A__)
+
+typedef enum _ETCChannel
+{
+  NOT_ON_TIMER=-1,
+  TCC0_CH0 = (0<<8)|(0),
+  TCC0_CH1 = (0<<8)|(1),
+  TCC0_CH2 = (0<<8)|(2),
+  TCC0_CH3 = (0<<8)|(3),
+  TCC0_CH4 = (0<<8)|(4),
+  TCC0_CH5 = (0<<8)|(5),
+  TCC1_CH0 = (1<<8)|(0),
+  TCC1_CH1 = (1<<8)|(1),
+  TCC1_CH2 = (1<<8)|(2),
+  TCC1_CH3 = (1<<8)|(3),
+  TCC2_CH0 = (2<<8)|(0),
+  TCC2_CH1 = (2<<8)|(1),
+  TCC2_CH2 = (2<<8)|(2),
+  TCC3_CH0 = (3<<8)|(0),
+  TCC3_CH1 = (3<<8)|(1),
+  TCC4_CH0 = (4<<8)|(0),
+  TCC4_CH1 = (4<<8)|(1),
+  TC0_CH0 =  (5<<8)|(0),
+  TC0_CH1 =  (5<<8)|(1),
+  TC1_CH0 =  (6<<8)|(0),
+  TC1_CH1 =  (6<<8)|(1),
+  TC2_CH0 =  (7<<8)|(0),
+  TC2_CH1 =  (7<<8)|(1),
+  TC3_CH0 =  (8<<8)|(0),
+  TC3_CH1 =  (8<<8)|(1),
+  TC4_CH0 =  (9<<8)|(0),
+  TC4_CH1 =  (9<<8)|(1),
+  TC5_CH0 =  (10<<8)|(0),
+  TC5_CH1 =  (10<<8)|(1),
+  TC6_CH0 =  (11<<8)|(0),
+  TC6_CH1 =  (11<<8)|(1),
+  TC7_CH0 =  (12<<8)|(0),
+  TC7_CH1 =  (12<<8)|(1),
+} ETCChannel ;
+
+#endif
+
+typedef ETCChannel EPWMChannel;
+extern const uint32_t GCLK_CLKCTRL_IDs[TCC_INST_NUM+TC_INST_NUM];
+
+#define NOT_ON_PWM NOT_ON_TIMER
+
 #else
 // Definitions for TC channels
 typedef enum _ETCChannel
@@ -109,40 +210,14 @@ typedef enum _ETCChannel
   TC4_CH1  = (4<<8)|(1),
   TC5_CH0  = (5<<8)|(0),
   TC5_CH1  = (5<<8)|(1),
+  #if defined (__SAMD21J18A__) 
+    TC6_CH0  = (6<<8)|(0),
+    TC6_CH1  = (6<<8)|(1),
+    TC7_CH0  = (7<<8)|(0),
+    TC7_CH1  = (7<<8)|(1),
+  #endif // __SAMD21J18A__
 } ETCChannel ;
-#endif
 
-extern const void* g_apTCInstances[TCC_INST_NUM+TC_INST_NUM] ;
-
-#define GetTCNumber( x ) ( (x) >> 8 )
-#define GetTCChannelNumber( x ) ( (x) & 0xff )
-#define GetTC( x ) ( g_apTCInstances[(x) >> 8] )
-
-
-#if defined(__SAMD51__)
-
-  typedef enum _EPWMChannel
-  {
-    NOT_ON_PWM=-1,
-    PWM0_CH0=TCC0_CH0,
-    PWM0_CH1=TCC0_CH1,
-    PWM0_CH2=TCC0_CH2,
-    PWM0_CH3=TCC0_CH3,
-    PWM0_CH4=TCC0_CH4,
-    PWM0_CH5=TCC0_CH5,
-    PWM0_CH6=TCC0_CH6,
-    PWM0_CH7=TCC0_CH7,
-    PWM1_CH0=TCC1_CH0,
-    PWM1_CH1=TCC1_CH1,
-    PWM1_CH2=TCC1_CH2,
-    PWM1_CH3=TCC1_CH3,
-    PWM1_CH4=TCC1_CH4,
-    PWM1_CH5=TCC1_CH5,
-    PWM1_CH6=TCC1_CH6,
-    PWM1_CH7=TCC1_CH7,
-  } EPWMChannel ;
-
-#else //end __SAMD51J19A__
 // Definitions for PWM channels
 typedef enum _EPWMChannel
 {
@@ -179,6 +254,11 @@ extern const void* g_apTCInstances[TCC_INST_NUM+TC_INST_NUM] ;
 
 #endif
 
+extern const void* g_apTCInstances[TCC_INST_NUM+TC_INST_NUM] ;
+
+#define GetTCNumber( x ) ( (x) >> 8 )
+#define GetTCChannelNumber( x ) ( (x) & 0xff )
+#define GetTC( x ) ( g_apTCInstances[(x) >> 8] )
 
 typedef enum _EPortType
 {
@@ -186,6 +266,7 @@ typedef enum _EPortType
   PORTA=0,
   PORTB=1,
   PORTC=2,
+  PORTD=3,
 } EPortType ;
 
 #define PIN_NOT_A_PIN (UINT_MAX)
@@ -255,10 +336,19 @@ typedef enum _EPioType
 #define PIN_ATTR_COMBO         (1UL<<0)
 #define PIN_ATTR_ANALOG        (1UL<<1)
 #define PIN_ATTR_DIGITAL       (1UL<<2)
-#define PIN_ATTR_PWM           (1UL<<3)
 #define PIN_ATTR_TIMER         (1UL<<4)
 #define PIN_ATTR_TIMER_ALT     (1UL<<5)
 #define PIN_ATTR_EXTINT        (1UL<<6)
+#define PIN_ATTR_ANALOG_ALT	   (1UL<<7)
+
+#if defined(__SAMD51__)
+// these correspond to the mux table
+#define PIN_ATTR_PWM_E         (1UL<<3)
+#define PIN_ATTR_PWM_F         (1UL<<8)
+#define PIN_ATTR_PWM_G         (1UL<<9)
+#else
+#define PIN_ATTR_PWM           (1UL<<3)
+#endif
 
 /* Types used for the table below */
 typedef struct _PinDescription

cores/arduino/avr/io.h

@@ -25,8 +25,14 @@
 #ifndef _IO_H_
 #define _IO_H_
 
+#ifdef __SAMD51__
+  #define RAMSTART (HSRAM_ADDR)
+  #define RAMSIZE  (HSRAM_SIZE)
+#else
   #define RAMSTART (HMCRAMC0_ADDR)
   #define RAMSIZE  (HMCRAMC0_SIZE)
+#endif
+
 #define RAMEND   (RAMSTART + RAMSIZE - 1)
 
 #endif

cores/arduino/delay.c

@@ -61,6 +61,33 @@ unsigned long micros( void )
   // a runtime multiplication and shift, saving a few cycles
 }
 
+#ifdef __SAMD51__
+/*
+ * On SAMD51, use the (32bit) cycle count maintained by the DWT unit,
+ * and count exact number of cycles elapsed, rather than guessing how
+ * many cycles a loop takes, which is dangerous in the presence of
+ * cache.  The overhead of the call and internal code is "about" 20
+ * cycles.  (at 120MHz, that's about 1/6 us)
+ */
+void delayMicroseconds(unsigned int us)
+{
+  uint32_t start, elapsed;
+  uint32_t count;
+
+  if (us == 0)
+    return;
+
+  count = us * (VARIANT_MCK / 1000000) - 20;  // convert us to cycles.
+  start = DWT->CYCCNT;  //CYCCNT is 32bits, takes 37s or so to wrap.
+  while (1) {
+    elapsed = DWT->CYCCNT - start;
+    if (elapsed >= count)
+      return;
+  }
+}
+#endif
+
+
 void delay( unsigned long ms )
 {
   if (ms == 0)
@@ -68,12 +95,17 @@ void delay( unsigned long ms )
     return;
   }
 
-  uint32_t start = _ulTickCount ;
+  uint32_t start = micros();
 
-  do
+  while (ms > 0)
   {
     yield();
-  } while ( _ulTickCount - start < ms ) ;
+    while (ms > 0 && (micros() - start) >= 1000)
+    {
+      ms--;
+      start += 1000;
+    }
+  }
 }
 
 #include "Reset.h" // for tickReset()

cores/arduino/delay.h

@@ -61,6 +61,9 @@ extern void delay( unsigned long dwMs ) ;
  *
  * \param dwUs the number of microseconds to pause (uint32_t)
  */
+#if defined(__SAMD51__)
+extern void delayMicroseconds( unsigned int );
+#else
 static __inline__ void delayMicroseconds( unsigned int ) __attribute__((always_inline, unused)) ;
 static __inline__ void delayMicroseconds( unsigned int usec )
 {
@@ -68,21 +71,6 @@ static __inline__ void delayMicroseconds( unsigned int usec )
   {
     return ;
   }
-
-#if defined(__SAMD51__)
-  uint32_t n = usec * (VARIANT_MCK / 1000000) / 12;
-
-  __asm__ __volatile__(
-    "1:              \n"
-    "   sub %0, #1   \n" // substract 1 from %0 (n)
-    "   cmp %0, #0   \n" // compare to 0
-    "   bne 1b       \n" // if result is not 0 jump to 1
-    : "+r" (n)           // '%0' is n variable with RW constraints
-    :                    // no input
-    :                    // no clobber
-  );
-
-#else
   /*
    *  The following loop:
    *
@@ -109,10 +97,10 @@ static __inline__ void delayMicroseconds( unsigned int usec )
     :                    // no input
     :                    // no clobber
   );
-#endif
   // https://gcc.gnu.org/onlinedocs/gcc/Extended-Asm.html
   // https://gcc.gnu.org/onlinedocs/gcc/Extended-Asm.html#Volatile
 }
+#endif
 
 #ifdef __cplusplus
 }

cores/arduino/hooks.c

@@ -28,6 +28,7 @@
 static void __empty() {
 	// Empty
 }
+
 void yield(void) __attribute__ ((weak, alias("__empty")));
 
 /**

cores/arduino/main.cpp

@@ -39,7 +39,10 @@ int main( void )
   initVariant();
 
   delay(1);
-#if defined(USBCON)
+
+#if defined(USE_TINYUSB)
+  Adafruit_TinyUSB_Core_init();
+#elif defined(USBCON)
   USBDevice.init();
   USBDevice.attach();
 #endif
@@ -49,8 +52,21 @@ int main( void )
   for (;;)
   {
     loop();
+    yield(); // yield run usb background task
+
     if (serialEventRun) serialEventRun();
   }
 
   return 0;
 }
+
+#if defined(USE_TINYUSB)
+
+// run TinyUSB background task when yield()
+extern  "C" void yield(void)
+{
+  tud_task();
+  tud_cdc_write_flush();
+}
+
+#endif

cores/arduino/math_helper.c

@@ -164,13 +164,14 @@ void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples)
 uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples)
 {
   uint32_t i; 
-  int32_t diff, diffCrnt = 0;
+  int32_t diff;
+  uint32_t diffCrnt = 0;
   uint32_t maxDiff = 0;
 
   for (i = 0; i < numSamples; i++)
   {
     diff = pIn[i] - pOut[i];
-  	diffCrnt = (diff > 0) ? diff : -diff;
+    diffCrnt = (uint32_t)( (diff > 0) ? diff : -diff );
 
     if(diffCrnt > maxDiff)
     {
@@ -192,13 +193,14 @@ uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples)
 uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t * pOut, uint32_t numSamples)
 {
   uint32_t i; 
-  int32_t diff, diffCrnt = 0;
+  int32_t diff;
+  uint32_t diffCrnt = 0;
   uint32_t maxDiff = 0;
 
   for (i = 0; i < numSamples; i++)
   {
     diff = pIn[i] - pOut[i];
-  	diffCrnt = (diff > 0) ? diff : -diff;
+    diffCrnt = (uint32_t)( (diff > 0) ? diff : -diff );
 
     if(diffCrnt > maxDiff)
     {

cores/arduino/pulse.c

@@ -34,6 +34,36 @@ uint32_t pulseIn(uint32_t pin, uint32_t state, uint32_t timeout)
   uint32_t bit = 1 << p.ulPin;
   uint32_t stateMask = state ? bit : 0;
 
+#if defined(__SAMD51__)
+  /*
+   * The SAMD51 is fast enough to use really obvious code (similar to
+   * what was used to produce pulse_asm.S, but using micros() for timing.
+   * No assembly required, no conversion of loop counts to times (which is
+   * worrisome in the presence of cache.)
+   */
+  const volatile uint32_t *port = &(PORT->Group[p.ulPort].IN.reg);
+  uint32_t usCallStart;  // microseconds at start of call, for timeout.
+  uint32_t usPulseStart; // microseconds at start of measured pulse.
+  usCallStart = usPulseStart = micros();
+  // wait for any previous pulse to end
+  while ((*port & bit) == stateMask) {
+      if (micros() - usCallStart > timeout)
+          return -1;
+  }
+  // wait for the pulse to start
+  while ((*port & bit) != stateMask) {
+      usPulseStart = micros();
+      if (usPulseStart - usCallStart > timeout)
+          return -2;
+  }
+
+  // wait for the pulse to stop
+  while ((*port & bit) == stateMask) {
+      if (micros() - usCallStart > timeout)
+          return -3;
+  }
+  return micros() - usPulseStart;
+#else
   // convert the timeout from microseconds to a number of times through
   // the initial loop; it takes (roughly) 13 clock cycles per iteration.
   uint32_t maxloops = microsecondsToClockCycles(timeout) / 13;
@@ -48,5 +78,6 @@ uint32_t pulseIn(uint32_t pin, uint32_t state, uint32_t timeout)
     return clockCyclesToMicroseconds(width * 13 + 16);
   else
     return 0;
+#endif // SAMD51
 }
 

cores/arduino/startup.c

@@ -97,7 +97,7 @@ void SystemInit( void )
   }
   
   /* ----------------------------------------------------------------------------------------------
-   * 3) Put Generic Clock Generator 3 as source for Generic Clock Gen 0 (DFLL48M reference)
+   * 3) Put OSCULP32K as source for Generic Clock Generator 0
    */
   GCLK->GENCTRL[0].reg = GCLK_GENCTRL_SRC(GCLK_GENCTRL_SRC_OSCULP32K) | GCLK_GENCTRL_GENEN;
   
@@ -146,7 +146,7 @@ void SystemInit( void )
       /* Wait for synchronization */
     }
   
-  GCLK->GENCTRL[GENERIC_CLOCK_GENERATOR_1M].reg = GCLK_GENCTRL_SRC(GCLK_GENCTRL_SRC_DFLL_Val) | GCLK_GENCTRL_GENEN | GCLK_GENCTRL_DIV(24u);
+  GCLK->GENCTRL[GENERIC_CLOCK_GENERATOR_1M].reg = GCLK_GENCTRL_SRC(GCLK_GENCTRL_SRC_DFLL_Val) | GCLK_GENCTRL_GENEN | GCLK_GENCTRL_DIV(48u);
   
   while ( GCLK->SYNCBUSY.bit.GENCTRL5 ){
     /* Wait for synchronization */
@@ -160,7 +160,8 @@ void SystemInit( void )
   //PLL0 is 120MHz
   GCLK->PCHCTRL[OSCCTRL_GCLK_ID_FDPLL0].reg = (1 << GCLK_PCHCTRL_CHEN_Pos) | GCLK_PCHCTRL_GEN(GCLK_PCHCTRL_GEN_GCLK5_Val);
   
-  OSCCTRL->Dpll[0].DPLLRATIO.reg = OSCCTRL_DPLLRATIO_LDRFRAC(0x00) | OSCCTRL_DPLLRATIO_LDR(59); //120 Mhz
+  // This rounds to nearest full-MHz increment; not currently using frac
+  OSCCTRL->Dpll[0].DPLLRATIO.reg = OSCCTRL_DPLLRATIO_LDRFRAC(0x00) | OSCCTRL_DPLLRATIO_LDR((F_CPU - 500000) / 1000000);
   
   while(OSCCTRL->Dpll[0].DPLLSYNCBUSY.bit.DPLLRATIO);
   
@@ -174,7 +175,7 @@ void SystemInit( void )
   //PLL1 is 100MHz
   GCLK->PCHCTRL[OSCCTRL_GCLK_ID_FDPLL1].reg = (1 << GCLK_PCHCTRL_CHEN_Pos) | GCLK_PCHCTRL_GEN(GCLK_PCHCTRL_GEN_GCLK5_Val);
   
-  OSCCTRL->Dpll[1].DPLLRATIO.reg = OSCCTRL_DPLLRATIO_LDRFRAC(0x00) | OSCCTRL_DPLLRATIO_LDR(49); //100 Mhz
+  OSCCTRL->Dpll[1].DPLLRATIO.reg = OSCCTRL_DPLLRATIO_LDRFRAC(0x00) | OSCCTRL_DPLLRATIO_LDR(99); //100 Mhz
   
   while(OSCCTRL->Dpll[1].DPLLSYNCBUSY.bit.DPLLRATIO);
   
@@ -216,7 +217,7 @@ void SystemInit( void )
   GCLK->GENCTRL[GENERIC_CLOCK_GENERATOR_12M].reg = GCLK_GENCTRL_SRC(GCLK_GENCTRL_SRC_DFLL_Val) |
     GCLK_GENCTRL_IDC |
     GCLK_GENCTRL_DIV(4) |
-    GCLK_GENCTRL_DIVSEL |
+    //GCLK_GENCTRL_DIVSEL |
     //GCLK_GENCTRL_OE |
     GCLK_GENCTRL_GENEN;
   
@@ -253,6 +254,54 @@ void SystemInit( void )
   __enable_irq();
 #endif
 
+  /*---------------------------------------------------------------------
+   * Start up the "Debug Watchpoint and Trace" unit, so that we can use
+   * it's 32bit cycle counter for timing.
+   */
+  CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
+  DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk;
+
+  /* ----------------------------------------------------------------------------------------------
+   * 5) Load AC factory calibration values
+   */
+
+  uint32_t bias0 = (*((uint32_t *)AC_FUSES_BIAS0_ADDR) & AC_FUSES_BIAS0_Msk) >> AC_FUSES_BIAS0_Pos;
+  AC->CALIB.reg = AC_CALIB_BIAS0(bias0);
+
+  /* ----------------------------------------------------------------------------------------------
+   * 6) Load ADC factory calibration values
+   */
+
+  // ADC0 Bias Calibration
+  uint32_t biascomp = (*((uint32_t *)ADC0_FUSES_BIASCOMP_ADDR) & ADC0_FUSES_BIASCOMP_Msk) >> ADC0_FUSES_BIASCOMP_Pos;
+  uint32_t biasr2r = (*((uint32_t *)ADC0_FUSES_BIASR2R_ADDR) & ADC0_FUSES_BIASR2R_Msk) >> ADC0_FUSES_BIASR2R_Pos;
+  uint32_t biasref = (*((uint32_t *)ADC0_FUSES_BIASREFBUF_ADDR) & ADC0_FUSES_BIASREFBUF_Msk) >> ADC0_FUSES_BIASREFBUF_Pos;
+
+  ADC0->CALIB.reg = ADC_CALIB_BIASREFBUF(biasref)
+                    | ADC_CALIB_BIASR2R(biasr2r)
+                    | ADC_CALIB_BIASCOMP(biascomp);
+
+  // ADC1 Bias Calibration
+  biascomp = (*((uint32_t *)ADC1_FUSES_BIASCOMP_ADDR) & ADC1_FUSES_BIASCOMP_Msk) >> ADC1_FUSES_BIASCOMP_Pos;
+  biasr2r = (*((uint32_t *)ADC1_FUSES_BIASR2R_ADDR) & ADC1_FUSES_BIASR2R_Msk) >> ADC1_FUSES_BIASR2R_Pos;
+  biasref = (*((uint32_t *)ADC1_FUSES_BIASREFBUF_ADDR) & ADC1_FUSES_BIASREFBUF_Msk) >> ADC1_FUSES_BIASREFBUF_Pos;
+
+  ADC1->CALIB.reg = ADC_CALIB_BIASREFBUF(biasref)
+                    | ADC_CALIB_BIASR2R(biasr2r)
+                    | ADC_CALIB_BIASCOMP(biascomp);
+
+  /* ----------------------------------------------------------------------------------------------
+   * 7) Load USB factory calibration values
+   */
+
+  //USB Calibration
+  uint32_t usbtransn = (*((uint32_t *)USB_FUSES_TRANSN_ADDR) & USB_FUSES_TRANSN_Msk) >> USB_FUSES_TRANSN_Pos;
+  uint32_t usbtransp = (*((uint32_t *)USB_FUSES_TRANSP_ADDR) & USB_FUSES_TRANSP_Msk) >> USB_FUSES_TRANSP_Pos;
+  uint32_t usbtrim = (*((uint32_t *)USB_FUSES_TRIM_ADDR) & USB_FUSES_TRIM_Msk) >> USB_FUSES_TRIM_Pos;
+  USB->DEVICE.PADCAL.reg = USB_PADCAL_TRIM(usbtrim)
+                           | USB_PADCAL_TRANSN(usbtransn)
+                           | USB_PADCAL_TRANSP(usbtransp);
+
 //*************** END SAMD51 *************************//
   
 #else
@@ -528,4 +577,3 @@ void SystemInit( void )
     NVMCTRL->CTRLB.bit.MANW = 1;
   #endif
 }
-

cores/arduino/wiring.c

@@ -25,8 +25,7 @@ extern "C" {
 
 
 #if defined(__SAMD51__)
-//CHANGE THIS IF YOU CHANGE THE CLOCK SPEED
-uint32_t SystemCoreClock=120000000ul ;
+uint32_t SystemCoreClock=F_CPU;
 #else
 /*
  * System Core Clock is at 1MHz (8MHz/8) at Reset.
@@ -79,19 +78,21 @@ void init( void )
 //  PM->APBAMASK.reg |= PM_APBAMASK_EIC ;
 
 #if defined(__SAMD51__)
-  MCLK->APBAMASK.reg |= MCLK_APBAMASK_SERCOM0 | MCLK_APBAMASK_SERCOM1;
+  MCLK->APBAMASK.reg |= MCLK_APBAMASK_SERCOM0 | MCLK_APBAMASK_SERCOM1 | MCLK_APBAMASK_TC0 | MCLK_APBAMASK_TC1;
   
   MCLK->APBBMASK.reg |= MCLK_APBBMASK_SERCOM2 | MCLK_APBBMASK_SERCOM3 | MCLK_APBBMASK_TCC0 | MCLK_APBBMASK_TCC1 | MCLK_APBBMASK_TC3 | MCLK_APBBMASK_TC2;
   
-  MCLK->APBCMASK.reg |= MCLK_APBCMASK_TCC2 | MCLK_APBCMASK_TC4 | MCLK_APBCMASK_TC5;
+  MCLK->APBCMASK.reg |= MCLK_APBCMASK_TCC2 | MCLK_APBCMASK_TCC3 | MCLK_APBCMASK_TC4 | MCLK_APBCMASK_TC5;
+  
+  MCLK->APBDMASK.reg |= MCLK_APBDMASK_DAC | MCLK_APBDMASK_SERCOM4 | MCLK_APBDMASK_SERCOM5 | MCLK_APBDMASK_ADC0 | MCLK_APBDMASK_ADC1 | MCLK_APBDMASK_TCC4
+		  | MCLK_APBDMASK_TC6 | MCLK_APBDMASK_TC7 | MCLK_APBDMASK_SERCOM6 | MCLK_APBDMASK_SERCOM7;
 
-  MCLK->APBDMASK.reg |= MCLK_APBDMASK_DAC | MCLK_APBDMASK_SERCOM4 | MCLK_APBDMASK_SERCOM5 | MCLK_APBDMASK_ADC0 | MCLK_APBDMASK_ADC1;
 #else
   // Clock SERCOM for Serial
   PM->APBCMASK.reg |= PM_APBCMASK_SERCOM0 | PM_APBCMASK_SERCOM1 | PM_APBCMASK_SERCOM2 | PM_APBCMASK_SERCOM3 | PM_APBCMASK_SERCOM4 | PM_APBCMASK_SERCOM5 ;
 
   // Clock TC/TCC for Pulse and Analog
-  PM->APBCMASK.reg |= PM_APBCMASK_TCC0 | PM_APBCMASK_TCC1 | PM_APBCMASK_TCC2 | PM_APBCMASK_TC3 | PM_APBCMASK_TC4 | PM_APBCMASK_TC5 ;
+  PM->APBCMASK.reg |= PM_APBCMASK_TCC0 | PM_APBCMASK_TCC1 | PM_APBCMASK_TCC2 | PM_APBCMASK_TC3 | PM_APBCMASK_TC4 | PM_APBCMASK_TC5 | PM_APBCMASK_TC6 | PM_APBCMASK_TC7;
 
   // ATSAMR, for example, doesn't have a DAC
   #ifdef PM_APBCMASK_DAC
@@ -100,35 +101,45 @@ void init( void )
   #endif
 #endif
 
+/* 
+  Commented out to leave pins in default tri-state.  This is
+  aimed at avoiding power consumption in DeepSleep.
+  
   // Setup all pins (digital and analog) in INPUT mode (default is nothing)
   for (uint32_t ul = 0 ; ul < NUM_DIGITAL_PINS ; ul++ )
   {
     pinMode( ul, INPUT ) ;
   }
+*/
 
   // Initialize Analog Controller
   // Setting clock
 #if defined(__SAMD51__)
+  //set to 1/(1/(48000000/32) * 6) = 250000 SPS
 	GCLK->PCHCTRL[ADC0_GCLK_ID].reg = GCLK_PCHCTRL_GEN_GCLK1_Val | (1 << GCLK_PCHCTRL_CHEN_Pos); //use clock generator 1 (48Mhz)
+	GCLK->PCHCTRL[ADC1_GCLK_ID].reg = GCLK_PCHCTRL_GEN_GCLK1_Val | (1 << GCLK_PCHCTRL_CHEN_Pos); //use clock generator 1 (48Mhz)
+	Adc *adcs[] = {ADC0, ADC1};
+		for(int i=0; i<2; i++){
 
-	ADC0->CTRLA.bit.PRESCALER = ADC_CTRLA_PRESCALER_DIV256_Val;
-	ADC0->CTRLB.bit.RESSEL = ADC_CTRLB_RESSEL_10BIT_Val;
+		adcs[i]->CTRLA.bit.PRESCALER = ADC_CTRLA_PRESCALER_DIV32_Val;
+		adcs[i]->CTRLB.bit.RESSEL = ADC_CTRLB_RESSEL_10BIT_Val;
 
-	while( ADC0->SYNCBUSY.reg & ADC_SYNCBUSY_CTRLB );  //wait for sync
+		while( adcs[i]->SYNCBUSY.reg & ADC_SYNCBUSY_CTRLB );  //wait for sync
 
-	ADC0->SAMPCTRL.reg = 0x3f;                        // Set max Sampling Time Length
+		adcs[i]->SAMPCTRL.reg = 5;                        // sampling Time Length
 
-	while( ADC0->SYNCBUSY.reg & ADC_SYNCBUSY_SAMPCTRL );  //wait for sync
+		while( adcs[i]->SYNCBUSY.reg & ADC_SYNCBUSY_SAMPCTRL );  //wait for sync
 
-	ADC0->INPUTCTRL.reg = ADC_INPUTCTRL_MUXNEG_GND;   // No Negative input (Internal Ground)
+		adcs[i]->INPUTCTRL.reg = ADC_INPUTCTRL_MUXNEG_GND;   // No Negative input (Internal Ground)
 
-	while( ADC0->SYNCBUSY.reg & ADC_SYNCBUSY_INPUTCTRL );  //wait for sync
+		while( adcs[i]->SYNCBUSY.reg & ADC_SYNCBUSY_INPUTCTRL );  //wait for sync
 
 		// Averaging (see datasheet table in AVGCTRL register description)
-	ADC0->AVGCTRL.reg = ADC_AVGCTRL_SAMPLENUM_1 |    // 1 sample only (no oversampling nor averaging)
+		adcs[i]->AVGCTRL.reg = ADC_AVGCTRL_SAMPLENUM_1 |    // 1 sample only (no oversampling nor averaging)
 							ADC_AVGCTRL_ADJRES(0x0ul);   // Adjusting result by 0
 
-	while( ADC0->SYNCBUSY.reg & ADC_SYNCBUSY_AVGCTRL );  //wait for sync
+		while( adcs[i]->SYNCBUSY.reg & ADC_SYNCBUSY_AVGCTRL );  //wait for sync
+	}
 
 	analogReference( AR_DEFAULT ) ; // Analog Reference is AREF pin (3.3v)
 	
@@ -146,6 +157,8 @@ void init( void )
 	DAC->DACCTRL[1].bit.REFRESH = 2;
 
 #else
+  //set to 1/(1/(48000000/32) * 6) = 250000 SPS
+
   while(GCLK->STATUS.reg & GCLK_STATUS_SYNCBUSY);
 
   GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID( GCM_ADC ) | // Generic Clock ADC
@@ -154,10 +167,10 @@ void init( void )
 
   while( ADC->STATUS.bit.SYNCBUSY == 1 );          // Wait for synchronization of registers between the clock domains
 
-  ADC->CTRLB.reg = ADC_CTRLB_PRESCALER_DIV512 |    // Divide Clock by 512.
+  ADC->CTRLB.reg = ADC_CTRLB_PRESCALER_DIV32 |    // Divide Clock by 32.
                    ADC_CTRLB_RESSEL_10BIT;         // 10 bits resolution as default
 
-  ADC->SAMPCTRL.reg = 0x3f;                        // Set max Sampling Time Length
+  ADC->SAMPCTRL.reg = 5;                        // Sampling Time Length
 
   while( ADC->STATUS.bit.SYNCBUSY == 1 );          // Wait for synchronization of registers between the clock domains
 

cores/arduino/wiring_analog.c

@@ -32,7 +32,7 @@ static int _writeResolution = 12;
 static int _dacResolution = 12;
 #else
 static int _writeResolution = 8;
-static int _dacResolution = 8;
+//static int _dacResolution = 10;
 #endif
 
 
@@ -77,17 +77,21 @@ void analogReadResolution(int res)
 
 	if (res > 10) {
 		ADC0->CTRLB.bit.RESSEL = ADC_CTRLB_RESSEL_12BIT_Val;
+		ADC1->CTRLB.bit.RESSEL = ADC_CTRLB_RESSEL_12BIT_Val;
 		_ADCResolution = 12;
 		} else if (res > 8) {
 		ADC0->CTRLB.bit.RESSEL = ADC_CTRLB_RESSEL_10BIT_Val;
+		ADC1->CTRLB.bit.RESSEL = ADC_CTRLB_RESSEL_10BIT_Val;
 		_ADCResolution = 10;
 		} else {
 		ADC0->CTRLB.bit.RESSEL = ADC_CTRLB_RESSEL_8BIT_Val;
+		ADC1->CTRLB.bit.RESSEL = ADC_CTRLB_RESSEL_8BIT_Val;
 		_ADCResolution = 8;
 	}
 
 
 	while(ADC0->SYNCBUSY.reg & ADC_SYNCBUSY_CTRLB); //wait for sync
+	while(ADC1->SYNCBUSY.reg & ADC_SYNCBUSY_CTRLB); //wait for sync
 #else
 
 	if (res > 10) {
@@ -131,38 +135,92 @@ void analogReference(eAnalogReference mode)
 {
 #if defined(__SAMD51__)
 	while(ADC0->SYNCBUSY.reg & ADC_SYNCBUSY_REFCTRL); //wait for sync
+	while(ADC1->SYNCBUSY.reg & ADC_SYNCBUSY_REFCTRL); //wait for sync
 	
 	//TODO: fix gains
 	switch (mode)
 	{
-		case AR_INTERNAL:
-		case AR_INTERNAL2V23:
+		case AR_INTERNAL1V0:
 		//ADC0->GAINCORR.reg = ADC_GAINCORR_GAINCORR();      // Gain Factor Selection
-		ADC0->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_INTVCC0_Val; // 1/1.48 VDDANA = 1/1.48* 3V3 = 2.2297
+		SUPC->VREF.bit.SEL = SUPC_VREF_SEL_1V0_Val;		// select 1.0V
+		SUPC->VREF.bit.VREFOE = 1;	//	Turn on for use with ADC
+		ADC0->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_INTREF_Val; // Use SUPC.VREF
+		ADC1->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_INTREF_Val; // 
+		break;
+		
+		case AR_INTERNAL1V1:
+		//ADC0->GAINCORR.reg = ADC_GAINCORR_GAINCORR();      // Gain Factor Selection
+		SUPC->VREF.bit.SEL = SUPC_VREF_SEL_1V1_Val;		// select 1.1V
+		SUPC->VREF.bit.VREFOE = 1;	//	Turn on for use with ADC
+		ADC0->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_INTREF_Val; // Use SUPC.VREF
+		ADC1->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_INTREF_Val; // 
+		break;
+		
+		case AR_INTERNAL1V2:
+		//ADC0->GAINCORR.reg = ADC_GAINCORR_GAINCORR();      // Gain Factor Selection
+		SUPC->VREF.bit.SEL = SUPC_VREF_SEL_1V2_Val;		// select 1V2
+		SUPC->VREF.bit.VREFOE = 1;	//	Turn on for use with ADC
+		ADC0->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_INTREF_Val; // Use SUPC.VREF
+		ADC1->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_INTREF_Val; // 
+		break;
+
+		case AR_INTERNAL1V25:
+		//ADC0->GAINCORR.reg = ADC_GAINCORR_GAINCORR();      // Gain Factor Selection
+		SUPC->VREF.bit.SEL = SUPC_VREF_SEL_1V25_Val;		// select 1.25V
+		SUPC->VREF.bit.VREFOE = 1;	//	Turn on for use with ADC
+		ADC0->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_INTREF_Val; // Use SUPC.VREF
+		ADC1->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_INTREF_Val; // 
+		break;
+		
+		case AR_INTERNAL2V0:
+		//ADC0->GAINCORR.reg = ADC_GAINCORR_GAINCORR();      // Gain Factor Selection
+		SUPC->VREF.bit.SEL = SUPC_VREF_SEL_2V0_Val;		// select 2.0V
+		SUPC->VREF.bit.VREFOE = 1;	//	Turn on for use with ADC
+		ADC0->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_INTREF_Val; // Use SUPC.VREF
+		ADC1->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_INTREF_Val; // 
+		break;
+		
+		case AR_INTERNAL2V2:
+		//ADC0->GAINCORR.reg = ADC_GAINCORR_GAINCORR();      // Gain Factor Selection
+		SUPC->VREF.bit.SEL = SUPC_VREF_SEL_2V2_Val;		// select 2.2V
+		SUPC->VREF.bit.VREFOE = 1;	//	Turn on for use with ADC
+		ADC0->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_INTREF_Val; // Use SUPC.VREF
+		ADC1->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_INTREF_Val; // 
+		break;
+		
+		case AR_INTERNAL2V4:
+		//ADC0->GAINCORR.reg = ADC_GAINCORR_GAINCORR();      // Gain Factor Selection
+		SUPC->VREF.bit.SEL = SUPC_VREF_SEL_2V4_Val;		// select 2.4V
+		SUPC->VREF.bit.VREFOE = 1;	//	Turn on for use with ADC
+		ADC0->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_INTREF_Val; // Use SUPC.VREF
+		ADC1->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_INTREF_Val; // 
+		break;
+		
+		case AR_INTERNAL2V5:
+		//ADC0->GAINCORR.reg = ADC_GAINCORR_GAINCORR();      // Gain Factor Selection
+		SUPC->VREF.bit.SEL = SUPC_VREF_SEL_2V5_Val;		// select 2.5V
+		SUPC->VREF.bit.VREFOE = 1;	//	Turn on for use with ADC
+		ADC0->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_INTREF_Val; // Use SUPC.VREF
+		ADC1->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_INTREF_Val; // 
 		break;
 		
 		case AR_EXTERNAL:
 		//ADC0->INPUTCTRL.bit.GAIN = ADC_INPUTCTRL_GAIN_1X_Val;      // Gain Factor Selection
-		ADC0->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_AREFA_Val;
+		ADC0->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_AREFA_Val;	// AREF is jumpered to VCC, so 3.3V
+		ADC1->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_AREFA_Val;
 		break;
 
-/*		Don't think this works on SAMD51
-		case AR_INTERNAL1V0:
-		//ADC0->INPUTCTRL.bit.GAIN = ADC_INPUTCTRL_GAIN_1X_Val;      // Gain Factor Selection
-		ADC0->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_INT1V_Val;   // 1.0V voltage reference
-		break;
-*/
-
 		case AR_INTERNAL1V65:
-		//ADC0->INPUTCTRL.bit.GAIN = ADC_INPUTCTRL_GAIN_1X_Val;      // Gain Factor Selection
-		ADC0->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_INTVCC1_Val; // 1/2 VDDANA = 0.5* 3V3 = 1.65V
+		//ADC0->INPUTCTRL.bit.GAIN = ADC_INPUTCTRL_GAIN_DIV2_Val;
+		ADC0->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_INTVCC0_Val; // 1/2 VDDANA = 1.65
+		ADC1->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_INTVCC0_Val; // 
 		break;
 		
 		case AR_DEFAULT:
 		default:
 		//ADC0->INPUTCTRL.bit.GAIN = ADC_INPUTCTRL_GAIN_DIV2_Val;
-		ADC0->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_INTVCC1_Val; // 1/2 VDDANA = 0.5* 3V3 = 1.65V
-		
+		ADC0->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_INTVCC1_Val; // VDDANA = 3V3
+		ADC1->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_INTVCC1_Val; // 
 		break;
 	}
 	
@@ -170,7 +228,6 @@ void analogReference(eAnalogReference mode)
   syncADC();
   switch (mode)
   {
-    case AR_INTERNAL:
     case AR_INTERNAL2V23:
       ADC->INPUTCTRL.bit.GAIN = ADC_INPUTCTRL_GAIN_1X_Val;      // Gain Factor Selection
       ADC->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_INTVCC0_Val; // 1/1.48 VDDANA = 1/1.48* 3V3 = 2.2297
@@ -223,8 +280,8 @@ uint32_t analogRead(uint32_t pin)
 #ifdef DAC
 
 	#if defined(__SAMD51__)
-	  if (pin == A0 || pin == A1) { // Disable DAC, if analogWrite(A0,dval) used previously the DAC is enabled
-		uint8_t channel = (pin == PIN_A0 ? 0 : 1);
+	  if (pin == PIN_DAC0 || pin == PIN_DAC1) { // Disable DAC, if analogWrite(A0,dval) used previously the DAC is enabled
+		uint8_t channel = (pin == PIN_DAC0 ? 0 : 1);
 		
 		if(dacEnabled[channel]){
 			dacEnabled[channel] = false;
@@ -241,7 +298,7 @@ uint32_t analogRead(uint32_t pin)
 		
 		while (DAC->SYNCBUSY.bit.ENABLE);
 	#else
-	  if (pin == A0) { // Disable DAC, if analogWrite(A0,dval) used previously the DAC is enabled
+	  if (pin == PIN_DAC0) { // Disable DAC, if analogWrite(A0,dval) used previously the DAC is enabled
 	    syncDAC();
 		
 		DAC->CTRLA.bit.ENABLE = 0x00; // Disable DAC
@@ -253,8 +310,13 @@ uint32_t analogRead(uint32_t pin)
 #endif
 
 #if defined(__SAMD51__)
-  while( ADC0->SYNCBUSY.reg & ADC_SYNCBUSY_INPUTCTRL ); //wait for sync
-  ADC0->INPUTCTRL.bit.MUXPOS = g_APinDescription[pin].ulADCChannelNumber; // Selection for the positive ADC input
+  Adc *adc;
+  if(g_APinDescription[pin].ulPinAttribute & PIN_ATTR_ANALOG) adc = ADC0;
+  else if(g_APinDescription[pin].ulPinAttribute & PIN_ATTR_ANALOG_ALT) adc = ADC1;
+  else return 0;
+
+  while( adc->SYNCBUSY.reg & ADC_SYNCBUSY_INPUTCTRL ); //wait for sync
+  adc->INPUTCTRL.bit.MUXPOS = g_APinDescription[pin].ulADCChannelNumber; // Selection for the positive ADC input
   
   // Control A
   /*
@@ -268,27 +330,27 @@ uint32_t analogRead(uint32_t pin)
    * Before enabling the ADC, the asynchronous clock source must be selected and enabled, and the ADC reference must be
    * configured. The first conversion after the reference is changed must not be used.
    */
-  while( ADC0->SYNCBUSY.reg & ADC_SYNCBUSY_ENABLE ); //wait for sync
-  ADC0->CTRLA.bit.ENABLE = 0x01;             // Enable ADC
+  while( adc->SYNCBUSY.reg & ADC_SYNCBUSY_ENABLE ); //wait for sync
+  adc->CTRLA.bit.ENABLE = 0x01;             // Enable ADC
 
   // Start conversion
-  while( ADC0->SYNCBUSY.reg & ADC_SYNCBUSY_ENABLE ); //wait for sync
+  while( adc->SYNCBUSY.reg & ADC_SYNCBUSY_ENABLE ); //wait for sync
   
-  ADC0->SWTRIG.bit.START = 1;
+  adc->SWTRIG.bit.START = 1;
 
   // Clear the Data Ready flag
-  ADC0->INTFLAG.reg = ADC_INTFLAG_RESRDY;
+  adc->INTFLAG.reg = ADC_INTFLAG_RESRDY;
 
   // Start conversion again, since The first conversion after the reference is changed must not be used.
-  ADC0->SWTRIG.bit.START = 1;
+  adc->SWTRIG.bit.START = 1;
 
   // Store the value
-  while (ADC0->INTFLAG.bit.RESRDY == 0);   // Waiting for conversion to complete
-  valueRead = ADC0->RESULT.reg;
+  while (adc->INTFLAG.bit.RESRDY == 0);   // Waiting for conversion to complete
+  valueRead = adc->RESULT.reg;
 
-  while( ADC0->SYNCBUSY.reg & ADC_SYNCBUSY_ENABLE ); //wait for sync
-  ADC0->CTRLA.bit.ENABLE = 0x00;             // Disable ADC
-  while( ADC0->SYNCBUSY.reg & ADC_SYNCBUSY_ENABLE ); //wait for sync
+  while( adc->SYNCBUSY.reg & ADC_SYNCBUSY_ENABLE ); //wait for sync
+  adc->CTRLA.bit.ENABLE = 0x00;             // Disable ADC
+  while( adc->SYNCBUSY.reg & ADC_SYNCBUSY_ENABLE ); //wait for sync
   
 #else
   syncADC();
@@ -344,22 +406,21 @@ void analogWrite(uint32_t pin, uint32_t value)
 
  // ATSAMR, for example, doesn't have a DAC
 #ifdef DAC
-
 	  if ((attr & PIN_ATTR_ANALOG) == PIN_ATTR_ANALOG)
 	  {
 	    // DAC handling code
 #if defined(__SAMD51__)
-		if (pin != PIN_A0 && pin != PIN_A1) { // 2 DACs on A0 (PA02) and A1 (PA05)
+		if (pin == PIN_DAC0 || pin == PIN_DAC1) { // 2 DACs on A0 (PA02) and A1 (PA05)
 #else
-	    if (pin != PIN_A0) { // Only 1 DAC on A0 (PA02)
+	    if (pin == PIN_DAC0) { // Only 1 DAC on A0 (PA02)
 #endif
-	      return;
-	    }
+
+#if defined(__SAMD51__)
 
 	    value = mapResolution(value, _writeResolution, _dacResolution);
 
-	#if defined(__SAMD51__)
-		uint8_t channel = (pin == PIN_A0 ? 0 : 1);
+
+			uint8_t channel = (pin == PIN_DAC0 ? 0 : 1);
 
 			pinPeripheral(pin, PIO_ANALOG);
 
@@ -411,66 +472,33 @@ void analogWrite(uint32_t pin, uint32_t value)
 
 
 #else
-	    value = mapResolution(value, _dacResolution, 10);
 			syncDAC();
 			DAC->DATA.reg = value & 0x3FF;  // DAC on 10 bits.
 			syncDAC();
 			DAC->CTRLA.bit.ENABLE = 0x01;     // Enable DAC
 			syncDAC();
-	#endif
+#endif // __SAMD51__
 				return;
 	  }
-#endif
+	}
+#endif // DAC
 
-  if ((attr & PIN_ATTR_PWM) == PIN_ATTR_PWM)
-  {
-#ifndef __SAMD51__
-    value = mapResolution(value, _writeResolution, 16);
-	#endif
+#if defined(__SAMD51__)
+	if(attr & (PIN_ATTR_PWM_E|PIN_ATTR_PWM_F|PIN_ATTR_PWM_G)){
 
 		uint32_t tcNum = GetTCNumber(pinDesc.ulPWMChannel);
 		uint8_t tcChannel = GetTCChannelNumber(pinDesc.ulPWMChannel);
 		static bool tcEnabled[TCC_INST_NUM+TC_INST_NUM];
 
-    if (attr & PIN_ATTR_TIMER) {
-      #if !(ARDUINO_SAMD_VARIANT_COMPLIANCE >= 10603)
-      // Compatibility for cores based on SAMD core <=1.6.2
-      if (pinDesc.ulPinType == PIO_TIMER_ALT) {
-        pinPeripheral(pin, PIO_TIMER_ALT);
-      } else
-      #endif
-      {
-
-#if defined(__SAMD51__)
-          //on SAMD51 we are only using TCC for timers
-          pinPeripheral(pin, PIO_TCC_PDEC);
-#else
+		if(attr & PIN_ATTR_PWM_E)
 			pinPeripheral(pin, PIO_TIMER);
-#endif
-      }
-    } else if ((attr & PIN_ATTR_TIMER_ALT) == PIN_ATTR_TIMER_ALT){
-        //this is on an alt timer
+		else if(attr & PIN_ATTR_PWM_F)
 			pinPeripheral(pin, PIO_TIMER_ALT);
-    }
-    else{
-        return;
-    }
+		else if(attr & PIN_ATTR_PWM_G)
+			pinPeripheral(pin, PIO_TCC_PDEC);
 
 		if (!tcEnabled[tcNum]) {
 		  tcEnabled[tcNum] = true;
-
-#if defined(__SAMD51__)
-	uint32_t GCLK_CLKCTRL_IDs[] = {
-		TCC0_GCLK_ID,
-		TCC1_GCLK_ID,
-		TCC2_GCLK_ID,
-	#if defined(TCC3)
-		TCC3_GCLK_ID,
-		TCC4_GCLK_ID,
-		TC5_GCLK_ID,
-	#endif
-	};
-	
 	      GCLK->PCHCTRL[GCLK_CLKCTRL_IDs[tcNum]].reg = GCLK_PCHCTRL_GEN_GCLK0_Val | (1 << GCLK_PCHCTRL_CHEN_Pos); //use clock generator 0
 
 	      // Set PORT
@@ -527,7 +555,8 @@ void analogWrite(uint32_t pin, uint32_t value)
 				TCCx->CTRLA.bit.ENABLE = 1;
 				while (TCCx->SYNCBUSY.bit.ENABLE);
 			}
-	} else {
+		}
+		else {
 			if (tcNum >= TCC_INST_NUM) {
 				Tc* TCx = (Tc*) GetTC(pinDesc.ulPWMChannel);
 				TCx->COUNT8.CC[tcChannel].reg = (uint8_t) value;
@@ -543,7 +572,39 @@ void analogWrite(uint32_t pin, uint32_t value)
 				}
 		}
 
+		return;
+	}
+	  
 #else
+
+  if ((attr & PIN_ATTR_PWM) == PIN_ATTR_PWM)
+	  {
+	  value = mapResolution(value, _writeResolution, 16);
+
+	  uint32_t tcNum = GetTCNumber(pinDesc.ulPWMChannel);
+	  uint8_t tcChannel = GetTCChannelNumber(pinDesc.ulPWMChannel);
+	  static bool tcEnabled[TCC_INST_NUM+TC_INST_NUM];
+
+	    if (attr & PIN_ATTR_TIMER) {
+#if !(ARDUINO_SAMD_VARIANT_COMPLIANCE >= 10603)
+	      // Compatibility for cores based on SAMD core <=1.6.2
+	      if (pinDesc.ulPinType == PIO_TIMER_ALT) {
+	        pinPeripheral(pin, PIO_TIMER_ALT);
+	      } else
+#endif
+	      {
+	        pinPeripheral(pin, PIO_TIMER);
+	      }
+	    } else if ((attr & PIN_ATTR_TIMER_ALT) == PIN_ATTR_TIMER_ALT){
+	        //this is on an alt timer
+	        pinPeripheral(pin, PIO_TIMER_ALT);
+	    }
+	    else{
+	        return;
+	    }
+
+	    if (!tcEnabled[tcNum]) {
+	      tcEnabled[tcNum] = true;
 		  uint16_t GCLK_CLKCTRL_IDs[] = {
 			GCLK_CLKCTRL_ID(GCM_TCC0_TCC1), // TCC0
 			GCLK_CLKCTRL_ID(GCM_TCC0_TCC1), // TCC1
@@ -607,10 +668,9 @@ void analogWrite(uint32_t pin, uint32_t value)
 			syncTCC(TCCx);
 		  }
 		}
-#endif
-      
 	  return;
   }
+#endif
 
   // -- Defaults to digital write
   pinMode(pin, OUTPUT);

cores/arduino/wiring_analog.h

@@ -27,14 +27,21 @@ extern "C" {
 /*
  * \brief SAMD products have only one reference for ADC
  */
+ // add internal voltages for ATSAMD51 SUPC VREF register
 typedef enum _eAnalogReference
 {
   AR_DEFAULT,
-  AR_INTERNAL,
-  AR_EXTERNAL,
   AR_INTERNAL1V0,
+  AR_INTERNAL1V1,
+  AR_INTERNAL1V2,
+  AR_INTERNAL1V25,
+  AR_INTERNAL2V0,
+  AR_INTERNAL2V2,
+  AR_INTERNAL2V23,
+  AR_INTERNAL2V4,
+  AR_INTERNAL2V5,
   AR_INTERNAL1V65,
-  AR_INTERNAL2V23
+  AR_EXTERNAL
 } eAnalogReference ;
 
 

cores/arduino/wiring_digital.c

@@ -30,39 +30,43 @@ void pinMode( uint32_t ulPin, uint32_t ulMode )
     return ;
   }
 
+  EPortType port = g_APinDescription[ulPin].ulPort;
+  uint32_t pin = g_APinDescription[ulPin].ulPin;
+  uint32_t pinMask = (1ul << pin);
+
   // Set pin mode according to chapter '22.6.3 I/O Pin Configuration'
   switch ( ulMode )
   {
     case INPUT:
       // Set pin to input mode
-      PORT->Group[g_APinDescription[ulPin].ulPort].PINCFG[g_APinDescription[ulPin].ulPin].reg=(uint8_t)(PORT_PINCFG_INEN) ;
-      PORT->Group[g_APinDescription[ulPin].ulPort].DIRCLR.reg = (uint32_t)(1<<g_APinDescription[ulPin].ulPin) ;
+      PORT->Group[port].PINCFG[pin].reg=(uint8_t)(PORT_PINCFG_INEN) ;
+      PORT->Group[port].DIRCLR.reg = pinMask ;
     break ;
 
     case INPUT_PULLUP:
       // Set pin to input mode with pull-up resistor enabled
-      PORT->Group[g_APinDescription[ulPin].ulPort].PINCFG[g_APinDescription[ulPin].ulPin].reg=(uint8_t)(PORT_PINCFG_INEN|PORT_PINCFG_PULLEN) ;
-      PORT->Group[g_APinDescription[ulPin].ulPort].DIRCLR.reg = (uint32_t)(1<<g_APinDescription[ulPin].ulPin) ;
+      PORT->Group[port].PINCFG[pin].reg=(uint8_t)(PORT_PINCFG_INEN|PORT_PINCFG_PULLEN) ;
+      PORT->Group[port].DIRCLR.reg = pinMask ;
 
       // Enable pull level (cf '22.6.3.2 Input Configuration' and '22.8.7 Data Output Value Set')
-      PORT->Group[g_APinDescription[ulPin].ulPort].OUTSET.reg = (uint32_t)(1<<g_APinDescription[ulPin].ulPin) ;
+      PORT->Group[port].OUTSET.reg = pinMask ;
     break ;
 
     case INPUT_PULLDOWN:
       // Set pin to input mode with pull-down resistor enabled
-      PORT->Group[g_APinDescription[ulPin].ulPort].PINCFG[g_APinDescription[ulPin].ulPin].reg=(uint8_t)(PORT_PINCFG_INEN|PORT_PINCFG_PULLEN) ;
-      PORT->Group[g_APinDescription[ulPin].ulPort].DIRCLR.reg = (uint32_t)(1<<g_APinDescription[ulPin].ulPin) ;
+      PORT->Group[port].PINCFG[pin].reg=(uint8_t)(PORT_PINCFG_INEN|PORT_PINCFG_PULLEN) ;
+      PORT->Group[port].DIRCLR.reg = pinMask ;
 
       // Enable pull level (cf '22.6.3.2 Input Configuration' and '22.8.6 Data Output Value Clear')
-      PORT->Group[g_APinDescription[ulPin].ulPort].OUTCLR.reg = (uint32_t)(1<<g_APinDescription[ulPin].ulPin) ;
+      PORT->Group[port].OUTCLR.reg = pinMask ;
     break ;
 
     case OUTPUT:
       // enable input, to support reading back values, with pullups disabled
-      PORT->Group[g_APinDescription[ulPin].ulPort].PINCFG[g_APinDescription[ulPin].ulPin].reg=(uint8_t)(PORT_PINCFG_INEN) ;
+      PORT->Group[port].PINCFG[pin].reg=(uint8_t)(PORT_PINCFG_INEN) ;
 
       // Set pin to output mode
-      PORT->Group[g_APinDescription[ulPin].ulPort].DIRSET.reg = (uint32_t)(1<<g_APinDescription[ulPin].ulPin) ;
+      PORT->Group[port].DIRSET.reg = pinMask ;
     break ;
 
     default:

cores/arduino/wiring_private.c

@@ -107,7 +107,7 @@ int pinPeripheral( uint32_t ulPin, EPioType ulPeripheral )
         // Set new muxing
         PORT->Group[g_APinDescription[ulPin].ulPort].PMUX[g_APinDescription[ulPin].ulPin >> 1].reg = temp|PORT_PMUX_PMUXO( ulPeripheral ) ;
         // Enable port mux
-        PORT->Group[g_APinDescription[ulPin].ulPort].PINCFG[g_APinDescription[ulPin].ulPin].reg |= PORT_PINCFG_PMUXEN ;
+        PORT->Group[g_APinDescription[ulPin].ulPort].PINCFG[g_APinDescription[ulPin].ulPin].reg |= PORT_PINCFG_PMUXEN | PORT_PINCFG_DRVSTR;
       }
       else // even pin
       {
@@ -115,7 +115,7 @@ int pinPeripheral( uint32_t ulPin, EPioType ulPeripheral )
 
         temp = (PORT->Group[g_APinDescription[ulPin].ulPort].PMUX[g_APinDescription[ulPin].ulPin >> 1].reg) & PORT_PMUX_PMUXO( 0xF ) ;
         PORT->Group[g_APinDescription[ulPin].ulPort].PMUX[g_APinDescription[ulPin].ulPin >> 1].reg = temp|PORT_PMUX_PMUXE( ulPeripheral ) ;
-        PORT->Group[g_APinDescription[ulPin].ulPort].PINCFG[g_APinDescription[ulPin].ulPin].reg |= PORT_PINCFG_PMUXEN ; // Enable port mux
+        PORT->Group[g_APinDescription[ulPin].ulPort].PINCFG[g_APinDescription[ulPin].ulPin].reg |= PORT_PINCFG_PMUXEN | PORT_PINCFG_DRVSTR ; // Enable port mux
       }
 #endif
     break ;

drivers/prewin10/adafruit_circuit_playground_express.inf

@@ -46,6 +46,14 @@ StartType=3
 ErrorControl=1
 ServiceBinary=%12%\%DRIVERFILENAME%.sys
 
+[NullInstall.nt]
+; nothing to do for a null driver
+
+[NullInstall.nt.Services]
+; null driver has no service and no service name
+AddService=, 0x00000002
+
+
 ;------------------------------------------------------------------------------
 ;  Vista-64bit Sections
 ;------------------------------------------------------------------------------
@@ -73,6 +81,13 @@ StartType=3
 ErrorControl=1
 ServiceBinary=%12%\%DRIVERFILENAME%.sys
 
+[NullInstall.NTamd64]
+; nothing to do for a null driver
+
+[NullInstall.NTamd64.Services]
+; null driver has no service and no service name
+AddService=, 0x00000002
+
 
 ;------------------------------------------------------------------------------
 ;  Vendor and Product ID Definitions
@@ -87,14 +102,14 @@ ServiceBinary=%12%\%DRIVERFILENAME%.sys
 [SourceDisksNames]
 [DeviceList]
 "%DESCRIPTION% UF2 Bootloader (0018:00) BSP"=DriverInstall, USB\VID_239A&PID_0018&MI_00
-"%DESCRIPTION% UF2 WebUSB dummy (0018:04) BSP"=DriverInstall, USB\VID_239A&PID_0018&MI_00
+"%DESCRIPTION% UF2 WebUSB dummy (0018:04) BSP"=NullInstall, USB\VID_239A&PID_0018&MI_04
 "%DESCRIPTION% (0019:00) BSP"=DriverInstall, USB\VID_239A&PID_0019&MI_00
 "%DESCRIPTION% Arduino (8018:00) BSP"=DriverInstall, USB\VID_239A&PID_8018&MI_00
 "%DESCRIPTION% CircuitPython (8019:00) BSP"=DriverInstall, USB\VID_239A&PID_8019&MI_00
 
 [DeviceList.NTamd64]
 "%DESCRIPTION% UF2 Bootloader (0018:00) BSP"=DriverInstall, USB\VID_239A&PID_0018&MI_00
-"%DESCRIPTION% UF2 WebUSB dummy (0018:04) BSP"=DriverInstall, USB\VID_239A&PID_0018&MI_00
+"%DESCRIPTION% UF2 WebUSB dummy (0018:04) BSP"=NullInstall, USB\VID_239A&PID_0018&MI_04
 "%DESCRIPTION% (0019:00) BSP"=DriverInstall, USB\VID_239A&PID_0019&MI_00
 "%DESCRIPTION% Arduino (8018:00) BSP"=DriverInstall, USB\VID_239A&PID_8018&MI_00
 "%DESCRIPTION% CircuitPython (8019:00) BSP"=DriverInstall, USB\VID_239A&PID_8019&MI_00

extras/build_all.py

@@ -0,0 +1,124 @@
+import os
+import glob
+import sys
+import subprocess
+import time
+import argparse
+
+FQBN_PREFIX='adafruit:samd:adafruit_'
+
+
+parser = argparse.ArgumentParser(
+    description='python wrapper for adafruit arduino CI workflows',
+    allow_abbrev=False
+    )
+parser.add_argument(
+    '--all_warnings', '--Wall',
+    action='store_true',
+    help='build with all warnings enabled (`--warnings all`)',
+    )
+parser.add_argument(
+    '--warnings_do_not_cause_job_failure',
+    action='store_true',
+    help='failed builds will be listed as failed, but not cause job to exit with an error status',
+    )
+parser.add_argument(
+    'build_boards',
+    metavar='board',
+    nargs='*',
+    help='list of boards to be built -- Note that the fqbn is created by prepending "{}"'.format(FQBN_PREFIX),
+    default= [ 'metro_m0', 'metro_m4', 'circuitplayground_m0' ]
+    )
+args = parser.parse_args()
+
+exit_status = 0
+success_count = 0
+fail_count = 0
+skip_count = 0
+build_format = '| {:22} | {:30} | {:9} '
+build_separator = '-' * 80
+
+def errorOutputFilter(line: str):
+    if len(line) == 0:
+        return False
+    if line.isspace(): # Note: empty string does not match here!
+        return False
+    # TODO: additional items to remove?
+    return True
+
+def build_examples(variant: str):
+    global args, exit_status, success_count, fail_count, skip_count, build_format, build_separator
+
+    print('\n')
+    print(build_separator)
+    print('| {:^76} |'.format('Board ' + variant))
+    print(build_separator)
+    print((build_format + '| {:6} |').format('Library', 'Example', 'Result', 'Time'))
+    print(build_separator)
+    
+    fqbn = "{}{}".format(FQBN_PREFIX, variant)
+
+    for sketch in glob.iglob('libraries/**/*.ino', recursive=True):
+        start_time = time.monotonic()
+
+        # Skip if contains: ".board.test.skip" or ".all.test.skip"
+        # Skip if not contains: ".board.test.only" for a specific board
+        sketchdir = os.path.dirname(sketch)
+        if os.path.exists(sketchdir + '/.all.test.skip') or os.path.exists(sketchdir + '/.' + variant + '.test.skip'):
+            success = "\033[33mskipped\033[0m  "
+        elif glob.glob(sketchdir+"/.*.test.only") and not os.path.exists(sketchdir + '/.build.' + variant):
+            success = "\033[33mskipped\033[0m  "
+        else:
+            # TODO - preferably, would have STDERR show up in **both** STDOUT and STDERR.
+            #        preferably, would use Python logging handler to get both distinct outputs and one merged output
+            #        for now, split STDERR when building with all warnings enabled, so can detect warning/error output.
+            if args.all_warnings:
+                build_result = subprocess.run("arduino-cli compile --warnings all --fqbn {} {}".format(fqbn, sketch), shell=True, stdout=subprocess.PIPE, stderr=subprocess.PIPE)
+            else:
+                build_result = subprocess.run("arduino-cli compile --warnings default --fqbn {} {}".format(fqbn, sketch), shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
+
+            # get stderr into a form where len(warningLines) indicates a true warning was output to stderr
+            warningLines = [];
+            if args.all_warnings and build_result.stderr:
+                tmpWarningLines = build_result.stderr.decode("utf-8").splitlines()
+                warningLines = list(filter(errorOutputFilter, (tmpWarningLines)))
+
+            if build_result.returncode != 0:
+                exit_status = build_result.returncode
+                success = "\033[31mfailed\033[0m   "
+                fail_count += 1
+            elif len(warningLines) != 0:
+                if not args.warnings_do_not_cause_job_failure:
+                    exit_status = -1
+                success = "\033[31mwarnings\033[0m "
+                fail_count += 1
+            else:
+                success = "\033[32msucceeded\033[0m"
+                success_count += 1
+
+        build_duration = time.monotonic() - start_time
+
+        print((build_format + '| {:5.2f}s |').format(sketch.split(os.path.sep)[1], os.path.basename(sketch), success, build_duration))
+
+        if success != "\033[33mskipped\033[0m  ":
+            if build_result.returncode != 0:
+                print(build_result.stdout.decode("utf-8"))
+                if (build_result.stderr):
+                    print(build_result.stderr.decode("utf-8"))
+            if len(warningLines) != 0:
+                for line in warningLines:
+                    print(line)
+        else:
+            skip_count += 1
+
+build_time = time.monotonic()
+
+for board in args.build_boards:
+    build_examples(board)
+
+print(build_separator)
+build_time = time.monotonic() - build_time
+print("Build Summary: {} \033[32msucceeded\033[0m, {} \033[31mfailed\033[0m, {} \033[33mskipped\033[0m and took {:.2f}s".format(success_count, fail_count, skip_count, build_time))
+print(build_separator)
+
+sys.exit(exit_status)

keywords.txt

@@ -1,2 +1,3 @@
 SerialGSM	KEYWORD1
+SerialSARA	KEYWORD1
 INPUT_PULLDOWN	LITERAL1	Constants	RESERVED_WORD_2

libraries/Adafruit_ZeroDMA/Adafruit_ZeroDMA.cpp

@@ -0,0 +1,654 @@
+#include <Adafruit_ZeroDMA.h>
+#include <malloc.h> // memalign() function
+
+#include "utility/dma.h"
+static volatile uint32_t _channelMask = 0; // Bitmask of allocated channels
+
+// DMA descriptor list entry point (and writeback buffer) per channel
+__attribute__((__aligned__(16))) static DmacDescriptor // 128 bit alignment
+  _descriptor[DMAC_CH_NUM] SECTION_DMAC_DESCRIPTOR,
+  _writeback[DMAC_CH_NUM]  SECTION_DMAC_DESCRIPTOR;
+
+// Pointer to ZeroDMA object for each channel is needed for the
+// ISR (in C, outside of class context) to access callbacks.
+static Adafruit_ZeroDMA *_dmaPtr[DMAC_CH_NUM] = { 0 }; // Init to NULL
+
+// Adapted from ASF3 interrupt_sam_nvic.c:
+
+static volatile unsigned long cpu_irq_critical_section_counter = 0;
+static volatile unsigned char cpu_irq_prev_interrupt_state     = 0;
+
+static void cpu_irq_enter_critical(void) {
+    if(!cpu_irq_critical_section_counter) {
+        if(__get_PRIMASK() == 0) { // IRQ enabled?
+            __disable_irq();   // Disable it
+            __DMB();
+            cpu_irq_prev_interrupt_state = 1;
+        } else {
+            // Make sure the to save the prev state as false
+            cpu_irq_prev_interrupt_state = 0;
+        }
+    }
+
+    cpu_irq_critical_section_counter++;
+}
+
+static void cpu_irq_leave_critical(void) {
+    // Check if the user is trying to leave a critical section
+    // when not in a critical section
+    if(cpu_irq_critical_section_counter > 0) {
+        cpu_irq_critical_section_counter--;
+
+        // Only enable global interrupts when the counter
+        // reaches 0 and the state of the global interrupt flag
+        // was enabled when entering critical state */
+        if((!cpu_irq_critical_section_counter) &&
+            cpu_irq_prev_interrupt_state) {
+                __DMB();
+                __enable_irq();
+        }
+    }
+}
+
+// CONSTRUCTOR -------------------------------------------------------------
+
+// Constructor initializes Adafruit_ZeroDMA basics but does NOT allocate a
+// DMA channel (that's done in allocate()) or start a job (that's done in
+// startJob()).  This is because constructors in a global context are called
+// before a sketch's setup() function, which may have some other hardware
+// initialization of its own, don't want it clobbering us.
+Adafruit_ZeroDMA::Adafruit_ZeroDMA(void) {
+    channel           = 0xFF;  // Channel not yet allocated
+    jobStatus         = DMA_STATUS_OK;
+    hasDescriptors    = false; // No descriptors allocated yet
+    loopFlag          = false;
+    peripheralTrigger = 0;     // Software trigger only by default
+    triggerAction     = DMA_TRIGGER_ACTON_TRANSACTION;
+    memset(callback, 0, sizeof(callback));
+}
+
+// TODO: add destructor? Should stop job, delete descriptors, free channel.
+
+// INTERRUPT SERVICE ROUTINE -----------------------------------------------
+
+// This is a C function that exists outside the Adafruit_ZeroDMA context.
+// DMA channel number is determined from the INTPEND register, from this
+// we get a ZeroDMA object pointer through the _dmaPtr[] array.
+// (It's done this way because jobStatus and callback[] are protected
+// elements in the ZeroDMA object -- we can't touch them in C, but the
+// next function after this, being part of the ZeroDMA class, can.)
+
+#ifdef __SAMD51__
+void DMAC_0_Handler(void) {
+#else
+void DMAC_Handler(void) {
+#endif
+    cpu_irq_enter_critical();
+
+    uint8_t channel = DMAC->INTPEND.bit.ID; // Channel # causing interrupt
+    if(channel < DMAC_CH_NUM) {
+        Adafruit_ZeroDMA *dma;
+        if((dma = _dmaPtr[channel])) { // -> Channel's ZeroDMA object
+#ifdef __SAMD51__
+            // Call IRQ handler with channel #
+            dma->_IRQhandler(channel);
+#else
+            DMAC->CHID.bit.ID = channel;
+            // Call IRQ handler with interrupt flag(s)
+            dma->_IRQhandler(DMAC->CHINTFLAG.reg);
+#endif
+        }
+    }
+
+    cpu_irq_leave_critical();
+}
+
+#ifdef __SAMD51__
+void DMAC_1_Handler(void) __attribute__((weak, alias("DMAC_0_Handler")));
+void DMAC_2_Handler(void) __attribute__((weak, alias("DMAC_0_Handler")));
+void DMAC_3_Handler(void) __attribute__((weak, alias("DMAC_0_Handler")));
+void DMAC_4_Handler(void) __attribute__((weak, alias("DMAC_0_Handler")));
+#endif
+
+void Adafruit_ZeroDMA::_IRQhandler(uint8_t flags) {
+#ifdef __SAMD51__
+    // 'flags' is initially passed in as channel number,
+    // from which we look up the actual interrupt flags...
+    flags = DMAC->Channel[flags].CHINTFLAG.reg;
+#endif
+    if(flags & DMAC_CHINTENCLR_TERR) {
+        // Clear error flag
+#ifdef __SAMD51__
+        DMAC->Channel[channel].CHINTFLAG.reg = DMAC_CHINTENCLR_TERR;
+#else
+        DMAC->CHINTFLAG.reg = DMAC_CHINTENCLR_TERR;
+#endif
+        jobStatus           = DMA_STATUS_ERR_IO;
+        if(callback[DMA_CALLBACK_TRANSFER_ERROR]) {
+            callback[DMA_CALLBACK_TRANSFER_ERROR](this);
+        }
+    } else if(flags & DMAC_CHINTENCLR_TCMPL) {
+        // Clear transfer complete flag
+#ifdef __SAMD51__
+        DMAC->Channel[channel].CHINTFLAG.reg = DMAC_CHINTENCLR_TCMPL;
+#else
+        DMAC->CHINTFLAG.reg = DMAC_CHINTENCLR_TCMPL;
+#endif
+        jobStatus           = DMA_STATUS_OK;
+        if(callback[DMA_CALLBACK_TRANSFER_DONE]) {
+            callback[DMA_CALLBACK_TRANSFER_DONE](this);
+        }
+    } else if(flags & DMAC_CHINTENCLR_SUSP) {
+        // Clear channel suspend flag
+#ifdef __SAMD51__
+        DMAC->Channel[channel].CHINTFLAG.reg = DMAC_CHINTENCLR_SUSP;
+#else
+        DMAC->CHINTFLAG.reg = DMAC_CHINTENCLR_SUSP;
+#endif
+        jobStatus           = DMA_STATUS_SUSPEND;
+        if(callback[DMA_CALLBACK_CHANNEL_SUSPEND]) {
+            callback[DMA_CALLBACK_CHANNEL_SUSPEND](this);
+        }
+    }
+}
+
+// DMA CHANNEL FUNCTIONS ---------------------------------------------------
+
+// Allocates channel for ZeroDMA object
+ZeroDMAstatus Adafruit_ZeroDMA::allocate(void) {
+
+    if(channel < DMAC_CH_NUM) return DMA_STATUS_OK; // Already alloc'd!
+
+    // Find index of first free DMA channel.  As currently written,
+    // this "does not play well with others" as it assumes _channelMask
+    // is the final arbiter of channels in use (this is true only within
+    // this library -- but other DMA-driven code may have allocated its
+    // own channel(s) elsewhere, sometimes with an equally broken
+    // approach).  A possible alternate approach, I haven't tested this
+    // yet, might be to loop through each channel, set DMAC->CHID.bit.ID
+    // and then test whether CHCTRLA.bit.ENABLE is set?  But for now...
+    for(channel=0; (channel < DMAC_CH_NUM) &&
+      (_channelMask & (1 << channel)); channel++);
+    // Doesn't help that code later does a software reset of the DMA
+    // controller, which would blow out other DMA-using libraries
+    // anyway (or they're just as likely to blow out this one).
+    // I think it's just an all-or-nothing affair...use one library
+    // for DMA everything, never mix and match.
+
+    if(channel >= DMAC_CH_NUM) { // No free channel!
+        return DMA_STATUS_ERR_NOT_FOUND;
+    }
+
+    cpu_irq_enter_critical();
+
+    if(!_channelMask) { // No channels allocated yet; initialize DMA!
+#if (SAML21) || (SAML22) || (SAMC20) || (SAMC21)
+        PM->AHBMASK.bit.DMAC_       = 1;
+#elif defined(__SAMD51__)
+        MCLK->AHBMASK.bit.DMAC_     = 1; // Initialize DMA clocks
+#else
+        PM->AHBMASK.bit.DMAC_       = 1; // Initialize DMA clocks
+        PM->APBBMASK.bit.DMAC_      = 1;
+#endif
+        DMAC->CTRL.bit.DMAENABLE    = 0; // Disable DMA controller
+        DMAC->CTRL.bit.SWRST        = 1; // Perform software reset
+
+        // Initialize descriptor list addresses
+        DMAC->BASEADDR.bit.BASEADDR = (uint32_t)_descriptor;
+        DMAC->WRBADDR.bit.WRBADDR   = (uint32_t)_writeback;
+        memset(_descriptor, 0, sizeof(_descriptor));
+        memset(_writeback , 0, sizeof(_writeback));
+
+        // Re-enable DMA controller with all priority levels
+        DMAC->CTRL.reg = DMAC_CTRL_DMAENABLE | DMAC_CTRL_LVLEN(0xF);
+
+        // Enable DMA interrupt at lowest priority
+#ifdef __SAMD51__
+        IRQn_Type irqs[] = { DMAC_0_IRQn, DMAC_1_IRQn, DMAC_2_IRQn,
+                             DMAC_3_IRQn, DMAC_4_IRQn };
+        for(uint8_t i=0; i<(sizeof irqs / sizeof irqs[0]); i++) {
+            NVIC_EnableIRQ(irqs[i]);
+            NVIC_SetPriority(irqs[i], (1<<__NVIC_PRIO_BITS)-1);
+        }
+#else
+        NVIC_EnableIRQ(DMAC_IRQn);
+        NVIC_SetPriority(DMAC_IRQn, (1 << __NVIC_PRIO_BITS) - 1);
+#endif
+    }
+
+    _channelMask    |= 1 << channel; // Mark channel as allocated
+    _dmaPtr[channel] = this;         // Channel-index-to-object pointer
+
+    // Reset the allocated channel
+#ifdef __SAMD51__
+    DMAC->Channel[channel].CHCTRLA.bit.ENABLE  = 0;
+    DMAC->Channel[channel].CHCTRLA.bit.SWRST   = 1;
+#else
+    DMAC->CHID.bit.ID         = channel;
+    DMAC->CHCTRLA.bit.ENABLE  = 0;
+    DMAC->CHCTRLA.bit.SWRST   = 1;
+#endif
+
+    // Clear software trigger
+    DMAC->SWTRIGCTRL.reg     &= ~(1 << channel);
+
+    // Configure default behaviors
+#ifdef __SAMD51__
+    DMAC->Channel[channel].CHPRILVL.bit.PRILVL = 0;
+    DMAC->Channel[channel].CHCTRLA.bit.TRIGSRC = peripheralTrigger;
+    DMAC->Channel[channel].CHCTRLA.bit.TRIGACT = triggerAction;
+    DMAC->Channel[channel].CHCTRLA.bit.BURSTLEN =
+      DMAC_CHCTRLA_BURSTLEN_SINGLE_Val; // Single-beat burst length
+#else
+    DMAC->CHCTRLB.bit.LVL     = 0;
+    DMAC->CHCTRLB.bit.TRIGSRC = peripheralTrigger;
+    DMAC->CHCTRLB.bit.TRIGACT = triggerAction;
+#endif
+
+    cpu_irq_leave_critical();
+
+    return DMA_STATUS_OK;
+}
+
+void Adafruit_ZeroDMA::setPriority(dma_priority pri) const {
+#ifdef __SAMD51__
+    DMAC->Channel[channel].CHPRILVL.bit.PRILVL = pri;
+#else
+    DMAC->CHCTRLB.bit.LVL = pri;
+#endif
+}
+
+// Deallocate DMA channel
+// TODO: should this delete/deallocate the descriptor list?
+ZeroDMAstatus Adafruit_ZeroDMA::free(void) {
+
+    ZeroDMAstatus status = DMA_STATUS_OK;
+
+    cpu_irq_enter_critical(); // jobStatus is volatile
+
+    if(jobStatus == DMA_STATUS_BUSY) {
+        status = DMA_STATUS_BUSY; // Can't leave when busy
+    } else if((channel < DMAC_CH_NUM) && (_channelMask & (1 << channel))) {
+        // Valid in-use channel; release it
+        _channelMask &= ~(1 << channel); // Clear bit
+        if(!_channelMask) {              // No more channels in use?
+#ifdef __SAMD51__
+            NVIC_DisableIRQ(DMAC_0_IRQn); // Disable DMA interrupt
+            DMAC->CTRL.bit.DMAENABLE = 0; // Disable DMA
+            MCLK->AHBMASK.bit.DMAC_  = 0; // Disable DMA clock
+#else
+            NVIC_DisableIRQ(DMAC_IRQn);   // Disable DMA interrupt
+            DMAC->CTRL.bit.DMAENABLE = 0; // Disable DMA
+            PM->APBBMASK.bit.DMAC_   = 0; // Disable DMA clocks
+            PM->AHBMASK.bit.DMAC_    = 0;
+#endif
+        }
+        _dmaPtr[channel] = NULL;
+        channel          = 0xFF;
+    } else {
+        status = DMA_STATUS_ERR_NOT_INITIALIZED; // Channel not in use
+    }
+
+    cpu_irq_leave_critical();
+
+    return status;
+}
+
+// Start DMA transfer job.  Channel and descriptors should be allocated
+// before calling this.
+ZeroDMAstatus Adafruit_ZeroDMA::startJob(void) {
+    ZeroDMAstatus status = DMA_STATUS_OK;
+
+    cpu_irq_enter_critical(); // Job status is volatile
+
+    if(jobStatus == DMA_STATUS_BUSY) {
+        status = DMA_STATUS_BUSY; // Resource is busy
+    } else if(channel >= DMAC_CH_NUM) {
+        status = DMA_STATUS_ERR_NOT_INITIALIZED; // Channel not in use
+    } else if(!hasDescriptors || (_descriptor[channel].BTCNT.reg <= 0)) {
+        status = DMA_STATUS_ERR_INVALID_ARG; // Bad transfer size
+    } else {
+        uint8_t i, interruptMask = 0;
+        for(i=0; i<DMA_CALLBACK_N; i++) {
+            if(callback[i]) interruptMask |= (1 << i);
+        }
+        jobStatus            = DMA_STATUS_BUSY;
+#ifdef __SAMD51__
+        DMAC->Channel[channel].CHINTENSET.reg =
+          DMAC_CHINTENSET_MASK &  interruptMask;
+        DMAC->Channel[channel].CHINTENCLR.reg =
+          DMAC_CHINTENCLR_MASK & ~interruptMask;
+        DMAC->Channel[channel].CHCTRLA.bit.ENABLE = 1;
+#else
+        DMAC->CHID.bit.ID    = channel;
+        DMAC->CHINTENSET.reg = DMAC_CHINTENSET_MASK &  interruptMask;
+        DMAC->CHINTENCLR.reg = DMAC_CHINTENCLR_MASK & ~interruptMask;
+        DMAC->CHCTRLA.bit.ENABLE = 1; // Enable the transfer channel
+#endif
+    }
+
+    cpu_irq_leave_critical();
+
+    return status;
+}
+
+// Set and enable callback function for ZeroDMA object. This can be called
+// before or after channel and/or descriptors are allocated, but needs
+// to be called before job is started.
+void Adafruit_ZeroDMA::setCallback(
+  void (*cb)(Adafruit_ZeroDMA *), dma_callback_type type) {
+    callback[type] = cb;
+}
+
+// Suspend/resume don't quite do what I thought -- avoid using for now.
+void Adafruit_ZeroDMA::suspend(void) const {
+    cpu_irq_enter_critical();
+#ifdef __SAMD51__
+    DMAC->Channel[channel].CHCTRLB.reg |= DMAC_CHCTRLB_CMD_SUSPEND;
+#else
+    DMAC->CHID.bit.ID  = channel;
+    DMAC->CHCTRLB.reg |= DMAC_CHCTRLB_CMD_SUSPEND;
+#endif
+    cpu_irq_leave_critical();
+}
+
+#define MAX_JOB_RESUME_COUNT 10000
+void Adafruit_ZeroDMA::resume(void) {
+    cpu_irq_enter_critical(); // jobStatus is volatile
+    if(jobStatus == DMA_STATUS_SUSPEND) {
+        int      count;
+        uint32_t bitMask   = 1 << channel;
+#ifdef __SAMD51__
+        DMAC->Channel[channel].CHCTRLB.reg |= DMAC_CHCTRLB_CMD_RESUME;
+#else
+        DMAC->CHID.bit.ID  = channel;
+        DMAC->CHCTRLB.reg |= DMAC_CHCTRLB_CMD_RESUME;
+#endif
+
+        for(count = 0; (count < MAX_JOB_RESUME_COUNT) &&
+          !(DMAC->BUSYCH.reg & bitMask); count++);
+
+        jobStatus = (count < MAX_JOB_RESUME_COUNT) ?
+          DMA_STATUS_BUSY : DMA_STATUS_ERR_TIMEOUT;
+    }
+    cpu_irq_leave_critical();
+}
+
+// Abort is OK though.
+void Adafruit_ZeroDMA::abort(void) {
+    if(channel <= DMAC_CH_NUM) {
+        cpu_irq_enter_critical();
+#ifdef __SAMD51__
+        DMAC->Channel[channel].CHCTRLA.reg = 0; // Disable channel
+#else
+        DMAC->CHID.bit.ID = channel; // Select channel
+        DMAC->CHCTRLA.reg = 0;       // Disable
+#endif
+        jobStatus         = DMA_STATUS_ABORTED;
+        cpu_irq_leave_critical();
+    }
+}
+
+// Set DMA peripheral trigger.
+// This can be done before or after channel is allocated.
+void Adafruit_ZeroDMA::setTrigger(uint8_t trigger) {
+    peripheralTrigger = trigger; // Save value for allocate()
+
+    // If channel already allocated, configure peripheral trigger
+    // (old lib required configure before alloc -- either way OK now)
+    if(channel < DMAC_CH_NUM) {
+        cpu_irq_enter_critical();
+#ifdef __SAMD51__
+        DMAC->Channel[channel].CHCTRLA.bit.TRIGSRC = trigger;
+#else
+        DMAC->CHID.bit.ID         = channel;
+        DMAC->CHCTRLB.bit.TRIGSRC = trigger;
+#endif
+        cpu_irq_leave_critical();
+    }
+}
+
+// Set DMA trigger action.
+// This can be done before or after channel is allocated.
+void Adafruit_ZeroDMA::setAction(dma_transfer_trigger_action action) {
+    triggerAction = action; // Save value for allocate()
+
+    // If channel already allocated, configure trigger action
+    // (old lib required configure before alloc -- either way OK now)
+    if(channel < DMAC_CH_NUM) {
+        cpu_irq_enter_critical();
+#ifdef __SAMD51__
+        DMAC->Channel[channel].CHCTRLA.bit.TRIGACT = action;
+#else
+        DMAC->CHID.bit.ID         = channel;
+        DMAC->CHCTRLB.bit.TRIGACT = action;
+#endif
+        cpu_irq_leave_critical();
+    }
+}
+
+// Issue software trigger. Channel must be allocated & descriptors added!
+void Adafruit_ZeroDMA::trigger(void) const {
+    if((channel <= DMAC_CH_NUM) & hasDescriptors) {
+        DMAC->SWTRIGCTRL.reg |= (1 << channel);
+    }
+}
+
+// Returns true if DMA transfer in progress.
+bool Adafruit_ZeroDMA::isActive(void) const {
+    return _writeback[channel].BTCTRL.bit.VALID;
+}
+
+// DMA DESCRIPTOR FUNCTIONS ------------------------------------------------
+
+// Allocates a new DMA descriptor (if needed) and appends it to the
+// channel's descriptor list.  Returns pointer to DmacDescriptor,
+// or NULL on various errors.  You'll want to keep the pointer for
+// later if you need to modify or free the descriptor.
+// Channel must be allocated first!
+DmacDescriptor *Adafruit_ZeroDMA::addDescriptor(
+  void           *src,
+  void           *dst,
+  uint32_t        count,
+  dma_beat_size   size,
+  bool            srcInc,
+  bool            dstInc,
+  uint32_t        stepSize,
+  bool            stepSel) {
+
+    // Channel must be allocated first
+       if(channel >= DMAC_CH_NUM) return NULL;
+
+    // Can't do while job's busy
+    if(jobStatus == DMA_STATUS_BUSY) return NULL;
+
+    DmacDescriptor *desc;
+
+    // Scan descriptor list to find last entry.  If an entry's
+    // DESCADDR value is 0, that's the end of the list and it's
+    // currently un-looped.  If the DESCADDR value is the same
+    // as the first entry, that's the end of the list and it's
+    // looped.  Either way, set the last entry's DESCADDR value
+    // to the new descriptor, and the descriptor's own DESCADDR
+    // will be set later either to 0 or the list head.
+    if(hasDescriptors) {
+        // DMA descriptors must be 128-bit (16 byte) aligned.
+        // memalign() is considered 'obsolete' but it's replacements
+        // (aligned_alloc() or posix_memalign()) are not currently
+        // available in the version of ARM GCC in use, but this is,
+        // so here we are.
+        if(!(desc = (DmacDescriptor *)memalign(16, sizeof(DmacDescriptor)))) {
+            return NULL;
+        }
+        DmacDescriptor *prev = &_descriptor[channel];
+        while(prev->DESCADDR.reg &&
+             (prev->DESCADDR.reg != (uint32_t)&_descriptor[channel])) {
+            prev = (DmacDescriptor *)prev->DESCADDR.reg;
+        }
+        prev->DESCADDR.reg = (uint32_t)desc;
+    } else {
+        desc = &_descriptor[channel];
+    }
+    hasDescriptors = true;
+
+    uint8_t bytesPerBeat; // Beat transfer size IN BYTES
+    switch(size) {
+       default:                  bytesPerBeat = 1; break;
+       case DMA_BEAT_SIZE_HWORD: bytesPerBeat = 2; break;
+       case DMA_BEAT_SIZE_WORD:  bytesPerBeat = 4; break;
+    }
+
+    desc->BTCTRL.bit.VALID     = true;
+    desc->BTCTRL.bit.EVOSEL    = DMA_EVENT_OUTPUT_DISABLE;
+    desc->BTCTRL.bit.BLOCKACT  = DMA_BLOCK_ACTION_NOACT;
+    desc->BTCTRL.bit.BEATSIZE  = size;
+    desc->BTCTRL.bit.SRCINC    = srcInc;
+    desc->BTCTRL.bit.DSTINC    = dstInc;
+    desc->BTCTRL.bit.STEPSEL   = stepSel;
+    desc->BTCTRL.bit.STEPSIZE  = stepSize;
+    desc->BTCNT.reg            = count;
+    desc->SRCADDR.reg          = (uint32_t)src;
+
+    if(srcInc) {
+        if(stepSel) {
+            desc->SRCADDR.reg += bytesPerBeat * count * (1 << stepSize);
+        } else {
+            desc->SRCADDR.reg += bytesPerBeat * count;
+        }
+    }
+
+    desc->DSTADDR.reg          = (uint32_t)dst;
+
+    if(dstInc) {
+        if(!stepSel) {
+            desc->DSTADDR.reg += bytesPerBeat * count * (1 << stepSize);
+        } else {
+            desc->DSTADDR.reg += bytesPerBeat * count;
+        }
+    }
+
+    desc->DESCADDR.reg = loopFlag ? (uint32_t)&_descriptor[channel] : 0;
+
+    return desc;
+}
+
+// Modify DMA descriptor with a new source address, destination address &
+// block transfer count.  All other attributes (including increment enables,
+// etc.) are unchanged.  Mostly for changing the data being pushed to a
+// peripheral (DAC, SPI, whatev.)
+void Adafruit_ZeroDMA::changeDescriptor(DmacDescriptor *desc,
+  void *src, void *dst, uint32_t count) {
+
+    uint8_t bytesPerBeat; // Beat transfer size IN BYTES
+    switch(desc->BTCTRL.bit.BEATSIZE) {
+       default:                  bytesPerBeat = 1; break;
+       case DMA_BEAT_SIZE_HWORD: bytesPerBeat = 2; break;
+       case DMA_BEAT_SIZE_WORD:  bytesPerBeat = 4; break;
+    }
+
+    if(count) desc->BTCNT.reg = count;
+
+    if(src) {
+        desc->SRCADDR.reg = (uint32_t)src;
+        if(desc->BTCTRL.bit.SRCINC) {
+            if(desc->BTCTRL.bit.STEPSEL) {
+                desc->SRCADDR.reg += desc->BTCNT.reg *
+                  bytesPerBeat * (1 << desc->BTCTRL.bit.STEPSIZE);
+            } else {
+                desc->SRCADDR.reg += desc->BTCNT.reg * bytesPerBeat;
+            }
+        }
+    }
+
+    if(dst) {
+        desc->DSTADDR.reg = (uint32_t)dst;
+        if(desc->BTCTRL.bit.DSTINC) {
+            if(!desc->BTCTRL.bit.STEPSEL) {
+                desc->DSTADDR.reg += desc->BTCNT.reg *
+                  bytesPerBeat * (1 << desc->BTCTRL.bit.STEPSIZE);
+            } else {
+                desc->DSTADDR.reg += desc->BTCNT.reg * bytesPerBeat;
+            }
+        }
+    }
+
+// I think this code is here by accident -- disabling for now.
+#if 0
+    cpu_irq_enter_critical();
+    jobStatus          = DMA_STATUS_OK;
+#ifdef __SAMD51__
+    DMAC->Channel[channel].CHCTRLA.bit.ENABLE = 1;
+#else
+    DMAC->CHID.bit.ID  = channel;
+    DMAC->CHCTRLA.reg |= DMAC_CHCTRLA_ENABLE;
+#endif
+    cpu_irq_leave_critical();
+#endif
+}
+
+// TODO: delete descriptor, delete whole descriptor chain
+
+// Select whether channel's descriptor list should repeat or not.
+// This can be done before or after channel & any descriptors are allocated.
+void Adafruit_ZeroDMA::loop(boolean flag) {
+    // The loop selection is 'sticky' -- that is, you can enable or
+    // disable looping before a descriptor list is built, or after
+    // the fact.  This requires some extra steps in the library code
+    // but avoids a must-do-in-X-order constraint on user.
+    loopFlag = flag;
+
+    if(hasDescriptors) { // Descriptor list already started?
+        // Scan descriptor list to find last entry.  If an entry's
+        // DESCADDR value is 0, that's the end of the list and it's
+        // currently un-looped.  If the DESCADDR value is the same
+        // as the first entry, that's the end of the list and it's
+        // already looped.
+        DmacDescriptor *desc = &_descriptor[channel];
+        while(desc->DESCADDR.reg &&
+          (desc->DESCADDR.reg != (uint32_t)&_descriptor[channel])) {
+            desc = (DmacDescriptor *)desc->DESCADDR.reg;
+        }
+        // Loop or unloop descriptor list as appropriate
+        desc->DESCADDR.reg = loopFlag ?  (uint32_t)&_descriptor[channel] : 0;
+    }
+}
+
+// MISCELLANY --------------------------------------------------------------
+
+void Adafruit_ZeroDMA::printStatus(ZeroDMAstatus s) const {
+    if(s == DMA_STATUS_JOBSTATUS) s = jobStatus;
+    Serial.print("Status: ");
+    switch(s) {
+       case DMA_STATUS_OK:
+            Serial.println("OK");
+            break;
+       case DMA_STATUS_ERR_NOT_FOUND:
+            Serial.println("NOT FOUND");
+            break;
+       case DMA_STATUS_ERR_NOT_INITIALIZED:
+            Serial.println("NOT INITIALIZED");
+            break;
+       case DMA_STATUS_ERR_INVALID_ARG:
+            Serial.println("INVALID ARGUMENT");
+            break;
+       case DMA_STATUS_ERR_IO:
+            Serial.println("IO ERROR");
+            break;
+       case DMA_STATUS_ERR_TIMEOUT:
+            Serial.println("TIMEOUT");
+            break;
+       case DMA_STATUS_BUSY:
+            Serial.println("BUSY");
+            break;
+       case DMA_STATUS_SUSPEND:
+            Serial.println("SUSPENDED");
+            break;
+       case DMA_STATUS_ABORTED:
+            Serial.println("ABORTED");
+            break;
+       default:
+            Serial.print("Unknown 0x");
+            Serial.println((int)s);
+            break;
+    }
+}

libraries/Adafruit_ZeroDMA/Adafruit_ZeroDMA.h

@@ -0,0 +1,66 @@
+#ifndef _ADAFRUIT_ZERODMA_H_
+#define _ADAFRUIT_ZERODMA_H_
+
+#include "Arduino.h"
+#include "utility/dma.h"
+
+// Status codes returned by some DMA functions and/or held in
+// a channel's jobStatus variable.
+enum ZeroDMAstatus {
+    DMA_STATUS_OK = 0,
+    DMA_STATUS_ERR_NOT_FOUND,
+    DMA_STATUS_ERR_NOT_INITIALIZED,
+    DMA_STATUS_ERR_INVALID_ARG,
+    DMA_STATUS_ERR_IO,
+    DMA_STATUS_ERR_TIMEOUT,
+    DMA_STATUS_BUSY,
+    DMA_STATUS_SUSPEND,
+    DMA_STATUS_ABORTED,
+    DMA_STATUS_JOBSTATUS = -1 // For printStatus() function
+};
+
+class Adafruit_ZeroDMA {
+ public:
+  Adafruit_ZeroDMA(void);
+
+  // DMA channel functions
+  ZeroDMAstatus   allocate(void), // Allocates DMA channel
+                  startJob(void),
+                  free(void);     // Deallocates DMA channel
+  void            trigger(void) const,
+                  setTrigger(uint8_t trigger),
+                  setAction(dma_transfer_trigger_action action),
+                  setCallback(void (*callback)(Adafruit_ZeroDMA *) = NULL,
+                    dma_callback_type type = DMA_CALLBACK_TRANSFER_DONE),
+                  loop(boolean flag),
+                  suspend(void) const,
+                  resume(void),
+                  abort(void),
+                  setPriority(dma_priority pri) const,
+                  printStatus(ZeroDMAstatus s = DMA_STATUS_JOBSTATUS) const;
+  uint8_t         getChannel(void) const { return channel; }
+
+  // DMA descriptor functions
+  DmacDescriptor *addDescriptor(void *src, void *dst, uint32_t count = 0,
+                    dma_beat_size size = DMA_BEAT_SIZE_BYTE,
+                    bool srcInc = true, bool dstInc = true, 
+                    uint32_t stepSize = DMA_ADDRESS_INCREMENT_STEP_SIZE_1, 
+                    bool stepSel = DMA_STEPSEL_DST);
+  void            changeDescriptor(DmacDescriptor *d, void *src = NULL,
+                    void *dst = NULL, uint32_t count = 0);
+  bool            isActive(void) const;
+
+  void            _IRQhandler(uint8_t flags); // DO NOT TOUCH
+
+
+ protected:  
+  uint8_t                     channel;
+  volatile enum ZeroDMAstatus jobStatus;
+  bool                        hasDescriptors;
+  bool                        loopFlag;
+  uint8_t                     peripheralTrigger;
+  dma_transfer_trigger_action triggerAction;
+  void                      (*callback[DMA_CALLBACK_N])(Adafruit_ZeroDMA *);
+};
+
+#endif // _ADAFRUIT_ZERODMA_H_

libraries/Adafruit_ZeroDMA/LICENSE

@@ -0,0 +1,22 @@
+The MIT License (MIT)
+
+Copyright (c) 2016 Adafruit Industries
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in all
+copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+SOFTWARE.
+

libraries/Adafruit_ZeroDMA/README.md

@@ -0,0 +1,6 @@
+# Adafruit_ZeroDMA
+DMA helper/wrapped for ATSAMD21 such as Arduino Zero & Feather M0
+
+Current version of this library no longer requires Adafruit_ASFcore as a prerequisite. However...IT BREAKS COMPATIBILITY WITH PRIOR VERSIONS. Function names, calling sequence and return types/values have changed. See examples!
+
+Item(s) in 'utility' directory are much pared-down derivatives of Atmel ASFcore 3 files. Please keep their original copyright and license intact when editing.

libraries/Adafruit_ZeroDMA/examples/zerodma_memcpy/zerodma_memcpy.ino

@@ -0,0 +1,95 @@
+// Simple ZeroDMA example -- an equivalent to the memcpy() function.
+// Decause it uses DMA, unlike memcpy(), your code could be doing other
+// things simultaneously while the copy operation runs.
+
+#include <Adafruit_ZeroDMA.h>
+#include "utility/dma.h"
+
+Adafruit_ZeroDMA myDMA;
+ZeroDMAstatus    stat; // DMA status codes returned by some functions
+
+// The memory we'll be moving:
+#define DATA_LENGTH 1024
+uint8_t source_memory[DATA_LENGTH],
+        destination_memory[DATA_LENGTH];
+
+volatile bool transfer_is_done = false; // Done yet?
+
+// Callback for end-of-DMA-transfer
+void dma_callback(Adafruit_ZeroDMA *dma) {
+  (void)dma; // avoid compiler warning about unused function parameter
+  transfer_is_done = true;
+}
+
+void setup() {
+  uint32_t t;
+  pinMode(LED_BUILTIN, OUTPUT);   // Onboard LED can be used for precise
+  digitalWrite(LED_BUILTIN, LOW); // benchmarking with an oscilloscope
+  Serial.begin(115200);
+  while(!Serial);                 // Wait for Serial monitor before continuing
+
+  Serial.println("DMA test: memory copy");
+
+  Serial.print("Allocating DMA channel...");
+  stat = myDMA.allocate();
+  myDMA.printStatus(stat);
+
+  Serial.println("Setting up transfer");
+  myDMA.addDescriptor(source_memory, destination_memory, DATA_LENGTH);
+
+  Serial.println("Adding callback");
+  // register_callback() can optionally take a second argument
+  // (callback type), default is DMA_CALLBACK_TRANSFER_DONE
+  myDMA.setCallback(dma_callback);
+
+  // Fill the source buffer with incrementing bytes, dest buf with 0's
+  for(uint32_t i=0; i<DATA_LENGTH; i++) source_memory[i] = i;
+  memset(destination_memory, 0, DATA_LENGTH);
+
+  // Show the destination buffer is empty before transfer
+  Serial.println("Destination buffer before transfer:");
+  dump();
+
+  Serial.println("Starting transfer job");
+  stat = myDMA.startJob();
+  myDMA.printStatus(stat);
+
+  Serial.println("Triggering DMA transfer...");
+  t = micros();
+  digitalWrite(LED_BUILTIN, HIGH);
+  myDMA.trigger();
+
+  // Your code could do other things here while copy happens!
+
+  while(!transfer_is_done); // Chill until DMA transfer completes
+
+  digitalWrite(LED_BUILTIN, LOW);
+  t = micros() - t; // Elapsed time
+
+  Serial.print("Done! ");
+  Serial.print(t);
+  Serial.println(" microseconds");
+
+  Serial.println("Destination buffer after transfer:");
+  dump();
+
+  // Now repeat the same operation, but 'manually' using memcpy() (not DMA):
+  t = micros();
+  digitalWrite(LED_BUILTIN, HIGH);
+  memcpy(destination_memory, source_memory,  DATA_LENGTH);
+  digitalWrite(LED_BUILTIN, LOW);
+  t = micros() - t; // Elapsed time
+  Serial.print("Same operation without DMA: ");
+  Serial.print(t);
+  Serial.println(" microseconds");
+}
+
+// Show contents of destination_memory[] array
+void dump() {
+  for(uint32_t i=0; i<DATA_LENGTH; i++) {
+    Serial.print(destination_memory[i], HEX); Serial.print(' ');
+    if ((i & 15) == 15) Serial.println();
+  }
+}
+
+void loop() { }

libraries/Adafruit_ZeroDMA/examples/zerodma_spi1/zerodma_spi1.ino

@@ -0,0 +1,98 @@
+// DMA-based SPI buffer write.  This is transmit-only as written, i.e.
+// not equivalent to Arduino's SPI.transfer() which both sends and
+// receives a single byte or word.  Also, this is single-buffered to
+// demonstrate a simple SPI write case.  See zerodma_spi2.ino for an
+// example using double buffering (2 buffers alternating fill & transmit).
+
+#include <SPI.h>
+#include <Adafruit_ZeroDMA.h>
+#include "utility/dma.h"
+
+Adafruit_ZeroDMA myDMA;
+ZeroDMAstatus    stat; // DMA status codes returned by some functions
+
+// The memory we'll be issuing to SPI:
+#define DATA_LENGTH 2048
+uint8_t source_memory[DATA_LENGTH];
+
+volatile bool transfer_is_done = false; // Done yet?
+
+// Callback for end-of-DMA-transfer
+void dma_callback(Adafruit_ZeroDMA *dma) {
+  (void)dma; // avoid compiler warning about unused parameter
+  transfer_is_done = true;
+}
+
+void setup() {
+  uint32_t t;
+  pinMode(LED_BUILTIN, OUTPUT);   // Onboard LED can be used for precise
+  digitalWrite(LED_BUILTIN, LOW); // benchmarking with an oscilloscope
+  Serial.begin(115200);
+  while(!Serial);                 // Wait for Serial monitor before continuing
+
+  Serial.println("DMA test: SPI data out");
+
+  SPI.begin();
+
+  Serial.println("Configuring DMA trigger");
+#ifdef __SAMD51__
+  // SERCOM2 is the 'native' SPI SERCOM on Metro M4
+  myDMA.setTrigger(SERCOM2_DMAC_ID_TX);
+#else
+  // SERCOM4 is the 'native' SPI SERCOM on most M0 boards
+  myDMA.setTrigger(SERCOM4_DMAC_ID_TX);
+#endif
+  myDMA.setAction(DMA_TRIGGER_ACTON_BEAT);
+
+  Serial.print("Allocating DMA channel...");
+  stat = myDMA.allocate();
+  myDMA.printStatus(stat);
+
+  Serial.println("Setting up transfer");
+  myDMA.addDescriptor(
+    source_memory,                    // move data from here
+#ifdef __SAMD51__
+    (void *)(&SERCOM2->SPI.DATA.reg), // to here (M4)
+#else
+    (void *)(&SERCOM4->SPI.DATA.reg), // to here (M0)
+#endif
+    DATA_LENGTH,                      // this many...
+    DMA_BEAT_SIZE_BYTE,               // bytes/hword/words
+    true,                             // increment source addr?
+    false);                           // increment dest addr?
+
+  Serial.println("Adding callback");
+  // register_callback() can optionally take a second argument
+  // (callback type), default is DMA_CALLBACK_TRANSFER_DONE
+  myDMA.setCallback(dma_callback);
+
+  // Fill the source buffer with incrementing bytes
+  for(uint32_t i=0; i<DATA_LENGTH; i++) source_memory[i] = i;
+
+  // Start SPI transaction at 12 MHz
+  SPI.beginTransaction(SPISettings(12000000, MSBFIRST, SPI_MODE0));
+
+  Serial.println("Starting transfer job");
+  t = micros();
+  digitalWrite(LED_BUILTIN, HIGH);
+
+  // Because we've configured a peripheral trigger (SPI), there's
+  // no need to manually trigger transfer, it starts up on its own.
+  stat = myDMA.startJob();
+
+  // Your code could do other things here while SPI write happens!
+
+  while(!transfer_is_done); // Chill until DMA transfer completes
+
+  digitalWrite(LED_BUILTIN, LOW);
+  t = micros() - t; // Elapsed time
+
+  SPI.endTransaction();
+  myDMA.printStatus(stat); // Results of start_transfer_job()
+
+  Serial.print("Done! ");
+  Serial.print(t);
+  Serial.println(" microseconds");
+}
+
+void loop() { }

libraries/Adafruit_ZeroDMA/examples/zerodma_spi2/zerodma_spi2.ino

@@ -0,0 +1,104 @@
+// Double-buffered DMA on auxiliary SPI peripheral on pins 11/12/13.
+// Continuously alternates between two data buffers...one is filled
+// with new data as the other is being transmitted.
+
+#include <SPI.h>
+#include <Adafruit_ZeroDMA.h>
+#include "utility/dma.h"
+#include "wiring_private.h" // pinPeripheral() function
+
+// Declare our own SPI peripheral 'mySPI' on pins 11/12/13:
+// (Do not call this SPI1; Arduino Zero and Metro M0 already
+// have an SPI1 (the EDBG interface) and it won't compile.)
+SPIClass mySPI(
+  &sercom1,         // -> Sercom peripheral
+  34,               // MISO pin (also digital pin 12)
+  37,               // SCK pin  (also digital pin 13)
+  35,               // MOSI pin (also digital pin 11)
+  SPI_PAD_0_SCK_1,  // TX pad (MOSI, SCK pads)
+  SERCOM_RX_PAD_3); // RX pad (MISO pad)
+
+Adafruit_ZeroDMA myDMA;
+ZeroDMAstatus    stat; // DMA status codes returned by some functions
+
+// Data we'll issue to mySPI.  There are TWO buffers; one being
+// filled with new data while the other's being transmitted in
+// the background.
+#define DATA_LENGTH 512
+uint8_t source_memory[2][DATA_LENGTH],
+        buffer_being_filled = 0, // Index of 'filling' buffer
+        buffer_value        = 0; // Value of fill
+
+volatile bool transfer_is_done = true; // Done yet?
+
+// Callback for end-of-DMA-transfer
+void dma_callback(Adafruit_ZeroDMA *dma) {
+  (void)dma; // avoid compiler warning about unused parameter
+  transfer_is_done = true;
+}
+
+DmacDescriptor *desc; // DMA descriptor address (so we can change contents)
+
+void setup() {
+  Serial.begin(115200);
+  while(!Serial); // Wait for Serial monitor before continuing
+
+  Serial.println("DMA test: SPI data out");
+
+  mySPI.begin();
+  // Assign pins 11, 12, 13 to SERCOM functionality
+  pinPeripheral(11, PIO_SERCOM);
+  pinPeripheral(12, PIO_SERCOM);
+  pinPeripheral(13, PIO_SERCOM);
+
+  // Configure DMA for SERCOM1 (our 'mySPI' port on 11/12/13)
+  Serial.println("Configuring DMA trigger");
+  myDMA.setTrigger(SERCOM1_DMAC_ID_TX);
+  myDMA.setAction(DMA_TRIGGER_ACTON_BEAT);
+
+  Serial.print("Allocating DMA channel...");
+  stat = myDMA.allocate();
+  myDMA.printStatus(stat);
+
+  desc = myDMA.addDescriptor(
+    source_memory[buffer_being_filled], // move data from here
+    (void *)(&SERCOM1->SPI.DATA.reg),   // to here
+    DATA_LENGTH,                        // this many...
+    DMA_BEAT_SIZE_BYTE,                 // bytes/hword/words
+    true,                               // increment source addr?
+    false);                             // increment dest addr?
+
+  Serial.println("Adding callback");
+  // register_callback() can optionally take a second argument
+  // (callback type), default is DMA_CALLBACK_TRANSFER_DONE
+  myDMA.setCallback(dma_callback);
+}
+
+void loop() {
+  // Fill buffer with new data.  The other buffer might
+  // still be transmitting in the background via DMA.
+  memset(source_memory[buffer_being_filled], buffer_value, DATA_LENGTH);
+
+  // Wait for prior transfer to complete before starting new one...
+  Serial.print("Waiting on prior transfer...");
+  while(!transfer_is_done) Serial.write('.');
+  mySPI.endTransaction();
+  Serial.println("Done!");
+
+  // Modify the DMA descriptor using the newly-filled buffer as source...
+  myDMA.changeDescriptor(desc,           // DMA descriptor address
+    source_memory[buffer_being_filled]); // New src; dst & count don't change
+
+  // Begin new transfer...
+  Serial.println("Starting new transfer job");
+  mySPI.beginTransaction(SPISettings(12000000, MSBFIRST, SPI_MODE0));
+  transfer_is_done = false;            // Reset 'done' flag
+  stat             = myDMA.startJob(); // Go!
+  myDMA.printStatus(stat);
+
+  // Switch buffer indices so the alternate buffer is filled/xfer'd
+  // on the next pass.
+  buffer_being_filled = 1 - buffer_being_filled;
+  buffer_value++;
+}
+

libraries/Adafruit_ZeroDMA/library.properties

@@ -0,0 +1,9 @@
+name=Adafruit Zero DMA Library
+version=1.0.4
+author=Adafruit
+maintainer=Adafruit <info@adafruit.com>
+sentence=DMA helper/wrapped for ATSAMD21 such as Arduino Zero & Feather M0
+paragraph=DMA helper/wrapped for ATSAMD21 such as Arduino Zero & Feather M0
+category=Signal Input/Output
+url=https://github.com/adafruit/Adafruit_ZeroDMA
+architectures=samd

libraries/Adafruit_ZeroDMA/utility/dma.h

@@ -0,0 +1,145 @@
+/**
+ * \file
+ *
+ * \brief SAM Direct Memory Access Controller Driver
+ *
+ * Copyright (C) 2014-2015 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+/*
+ * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
+ */
+#ifndef DMA_H_INCLUDED
+#define DMA_H_INCLUDED
+
+// THIS IS A PARED-DOWN VERSION OF DMA.H FROM ATMEL ASFCORE 3.
+// Please keep original copyright and license intact!
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if (SAML21) || (SAML22) || (SAMC20) || (SAMC21) || defined(__DOXYGEN__) || defined(__SAMD51__)
+#define FEATURE_DMA_CHANNEL_STANDBY
+#endif
+
+enum dma_transfer_trigger_action{
+#ifdef __SAMD51__
+    // SAMD51 has a 'burst' transfer which can be set to one
+    // beat to accomplish same idea as SAMD21's 'beat' transfer.
+    // Trigger name is ACTON_BEAT for backward compatibility.
+    DMA_TRIGGER_ACTON_BLOCK       = DMAC_CHCTRLA_TRIGACT_BLOCK_Val,
+    DMA_TRIGGER_ACTON_BEAT        = DMAC_CHCTRLA_TRIGACT_BURST_Val,
+    DMA_TRIGGER_ACTON_TRANSACTION = DMAC_CHCTRLA_TRIGACT_TRANSACTION_Val,
+#else
+    DMA_TRIGGER_ACTON_BLOCK       = DMAC_CHCTRLB_TRIGACT_BLOCK_Val,
+    DMA_TRIGGER_ACTON_BEAT        = DMAC_CHCTRLB_TRIGACT_BEAT_Val,
+    DMA_TRIGGER_ACTON_TRANSACTION = DMAC_CHCTRLB_TRIGACT_TRANSACTION_Val,
+#endif
+};
+
+enum dma_callback_type {
+    // First item here is for any transfer errors. A transfer error is
+    // flagged if a bus error is detected during an AHB access or when
+    // the DMAC fetches an invalid descriptor
+    DMA_CALLBACK_TRANSFER_ERROR,
+    DMA_CALLBACK_TRANSFER_DONE,
+    DMA_CALLBACK_CHANNEL_SUSPEND,
+    DMA_CALLBACK_N, // Number of available callbacks
+};
+
+enum dma_beat_size {
+    DMA_BEAT_SIZE_BYTE = 0, // 8-bit
+    DMA_BEAT_SIZE_HWORD,    // 16-bit
+    DMA_BEAT_SIZE_WORD,     // 32-bit
+};
+
+enum dma_event_output_selection {
+    DMA_EVENT_OUTPUT_DISABLE = 0, // Disable event generation
+    DMA_EVENT_OUTPUT_BLOCK,       // Event strobe when block xfer complete
+    DMA_EVENT_OUTPUT_RESERVED,
+    DMA_EVENT_OUTPUT_BEAT,        // Event strobe when beat xfer complete
+};
+
+enum dma_block_action {
+    DMA_BLOCK_ACTION_NOACT = 0,
+    // Channel in normal operation and sets transfer complete interrupt
+    // flag after block transfer
+    DMA_BLOCK_ACTION_INT,
+    // Trigger channel suspend after block transfer and sets channel
+    // suspend interrupt flag once the channel is suspended
+    DMA_BLOCK_ACTION_SUSPEND,
+    // Sets transfer complete interrupt flag after a block transfer and
+    // trigger channel suspend. The channel suspend interrupt flag will
+    // be set once the channel is suspended.
+    DMA_BLOCK_ACTION_BOTH,
+};
+
+// DMA step selection. This bit determines whether the step size setting
+// is applied to source or destination address.
+enum dma_step_selection {
+    DMA_STEPSEL_DST = 0,
+    DMA_STEPSEL_SRC,
+};
+
+// Address increment step size. These bits select the address increment step
+// size. The setting apply to source or destination address, depending on
+// STEPSEL setting.
+enum dma_address_increment_stepsize {
+    DMA_ADDRESS_INCREMENT_STEP_SIZE_1 = 0, // beat size * 1
+    DMA_ADDRESS_INCREMENT_STEP_SIZE_2,     // beat size * 2
+    DMA_ADDRESS_INCREMENT_STEP_SIZE_4,     // beat size * 4
+    DMA_ADDRESS_INCREMENT_STEP_SIZE_8,     // etc...
+    DMA_ADDRESS_INCREMENT_STEP_SIZE_16,
+    DMA_ADDRESS_INCREMENT_STEP_SIZE_32,
+    DMA_ADDRESS_INCREMENT_STEP_SIZE_64,
+    DMA_ADDRESS_INCREMENT_STEP_SIZE_128,
+};
+
+// higher numbers are higher priority
+enum dma_priority {
+    DMA_PRIORITY_0, // lowest (default)
+    DMA_PRIORITY_1,
+    DMA_PRIORITY_2,
+    DMA_PRIORITY_3, // highest
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // DMA_H_INCLUDED

libraries/CI_Tests/CI_Tests.h

@@ -0,0 +1 @@
+// fake empty header file to make Arduino IDE happy

libraries/CI_Tests/examples/test_cmsis_fast_rfft/test_cmsis_fast_rfft.ino

@@ -0,0 +1,12 @@
+#include <arm_math.h>
+
+arm_rfft_fast_instance_f32 plan;
+
+void setup() {
+  arm_rfft_fast_init_f32(&plan, 256);
+}
+
+void loop() {
+    float in[256] = { 0 }, out[256] = { 0 };
+    arm_rfft_fast_f32(&plan, in, out, 0);
+}

libraries/SDU/extras/SDUBoot/build.sh

@@ -28,4 +28,5 @@ buildSDUBootSketch "arduino:samd:mkrfox1200" "$OUTPUT_PATH/mkrfox1200.h"
 buildSDUBootSketch "arduino:samd:mkrgsm1400" "$OUTPUT_PATH/mkrgsm1400.h"
 buildSDUBootSketch "arduino:samd:mkrwan1300" "$OUTPUT_PATH/mkrwan1300.h"
 buildSDUBootSketch "arduino:samd:mkrwifi1010" "$OUTPUT_PATH/mkrwifi1010.h"
+buildSDUBootSketch "arduino:samd:mkrnb1500" "$OUTPUT_PATH/mkrnb1500.h"
 buildSDUBootSketch "arduino:samd:mzero_bl" "$OUTPUT_PATH/mzero.h"

libraries/SDU/src/SDU.cpp

@@ -36,6 +36,8 @@ unsigned char sduBoot[0x4000] = {
   #include "boot/mkrwan1300.h"
 #elif defined(ARDUINO_SAMD_MKRWIFI1010)
   #include "boot/mkrwifi1010.h"
+#elif defined(ARDUINO_SAMD_MKRNB1500)
+  #include "boot/mkrnb1500.h"
 #elif defined(ARDUINO_SAM_ZERO)
   #include "boot/mzero.h"
 #else

libraries/SPI/SPI.cpp

@@ -46,7 +46,16 @@ SPIClass::SPIClass(SERCOM *p_sercom, uint8_t uc_pinMISO, uint8_t uc_pinSCK, uint
 
 void SPIClass::begin()
 {
-  init();
+  if(!initialized) {
+    interruptMode = SPI_IMODE_NONE;
+    interruptSave = 0;
+    interruptMask = 0;
+    initialized = true;
+  }
+
+  if(!use_dma) {
+    dmaAllocate();
+  }
 
   // PIO init
   pinPeripheral(_uc_pinMiso, g_APinDescription[_uc_pinMiso].ulPinType);
@@ -56,16 +65,6 @@ void SPIClass::begin()
   config(DEFAULT_SPI_SETTINGS);
 }
 
-void SPIClass::init()
-{
-  if (initialized)
-    return;
-  interruptMode = SPI_IMODE_NONE;
-  interruptSave = 0;
-  interruptMask = 0;
-  initialized = true;
-}
-
 void SPIClass::config(SPISettings settings)
 {
   _p_sercom->disableSPI();
@@ -80,6 +79,7 @@ void SPIClass::end()
 {
   _p_sercom->resetSPI();
   initialized = false;
+  // Add DMA deallocation here
 }
 
 #ifndef interruptsStatus
@@ -235,6 +235,231 @@ void SPIClass::transfer(void *buf, size_t count)
   }
 }
 
+// DMA-based SPI transfer() function ---------------------------------------
+
+// IMPORTANT: references to 65535 throughout the DMA code are INTENTIONAL.
+// DO NOT try to 'fix' by changing to 65536, or large transfers will fail!
+// The BTCNT value of a DMA descriptor is an unsigned 16-bit value with a
+// max of 65535. Larger transfers are handled by linked descriptors.
+
+// Pointer to SPIClass object, one per DMA channel. This allows the
+// DMA callback (which has to exist outside the class context) to have
+// a reference back to the originating SPIClass object.
+static SPIClass *spiPtr[DMAC_CH_NUM] = { 0 }; // Legit inits list to NULL
+
+void SPIClass::dmaCallback(Adafruit_ZeroDMA *dma) {
+  // dmaCallback() receives an Adafruit_ZeroDMA object. From this we can get
+  // a channel number (0 to DMAC_CH_NUM-1, always unique per ZeroDMA object),
+  // then locate the originating SPIClass object using array lookup, setting
+  // the dma_busy element 'false' to indicate end of transfer. Doesn't matter
+  // if it's a read or write transfer...both channels get pointers to it.
+  spiPtr[dma->getChannel()]->dma_busy = false;
+}
+
+// For read-only and read+write transfers, a callback is assigned only
+// to the read channel to indicate end-of-transfer, and the write channel's
+// callback is assigned to this nonsense function (for reasons I'm not
+// entirely sure of, setting the callback to NULL doesn't work).
+static void dmaDoNothingCallback(Adafruit_ZeroDMA *dma) { (void)dma; }
+
+// This could've gone in begin(), but for the sake of organization...
+void SPIClass::dmaAllocate(void) {
+  // In order to support fully non-blocking SPI transfers, DMA descriptor
+  // lists must be created for the input and/or output data. Rather than
+  // do this dynamically with every transfer, the lists are allocated once
+  // on SPI init. Maximum list size is finite and knowable -- transfers to
+  // or from RAM or from flash memory will never exceed the corresponding
+  // memory size (if they do, you have bigger problems). Descriptors
+  // aren't large and there's usually only a handful to a dozen, so this
+  // isn't an excessive burden in exchange for big non-blocking transfers.
+  uint32_t maxWriteBytes = FLASH_SIZE; // Writes can't exceed all of flash
+#if defined(__SAMD51__)
+  uint32_t maxReadBytes = HSRAM_SIZE;  // Reads can't exceed all of RAM
+#else
+  uint32_t maxReadBytes = HMCRAMC0_SIZE;
+#endif
+  if(maxReadBytes > maxWriteBytes) { // I don't think any SAMD devices
+    maxWriteBytes = maxReadBytes;    // have RAM > flash, but just in case
+  }
+
+  // VITAL to alloc read channel first, assigns it a higher DMA priority!
+  if(readChannel.allocate() == DMA_STATUS_OK) {
+    if(writeChannel.allocate() == DMA_STATUS_OK) {
+
+      // Both DMA channels (read and write) allocated successfully,
+      // set up transfer triggers and other basics...
+
+      // readChannel callback only needs to be set up once.
+      // Unlike the write callback which may get switched on or off,
+      // read callback stays put. In certain cases the read DMA job
+      // just isn't started and the callback is a non-issue then.
+      readChannel.setTrigger(getDMAC_ID_RX());
+      readChannel.setAction(DMA_TRIGGER_ACTON_BEAT);
+      readChannel.setCallback(dmaCallback);
+      spiPtr[readChannel.getChannel()] = this;
+
+      writeChannel.setTrigger(getDMAC_ID_TX());
+      writeChannel.setAction(DMA_TRIGGER_ACTON_BEAT);
+      spiPtr[writeChannel.getChannel()] = this;
+
+      // One descriptor per channel has already been allocated
+      // in Adafruit_ZeroDMA, this just gets pointers to them...
+      firstReadDescriptor = readChannel.addDescriptor(
+        (void *)getDataRegister(), // Source address (SPI data reg)
+        NULL,                      // Dest address (set later)
+        0,                         // Count (set later)
+        DMA_BEAT_SIZE_BYTE,        // Bytes/hwords/words
+        false,                     // Don't increment source address
+        true);                     // Increment dest address
+      firstWriteDescriptor = writeChannel.addDescriptor(
+        NULL,                      // Source address (set later)
+        (void *)getDataRegister(), // Dest (SPI data register)
+        0,                         // Count (set later)
+        DMA_BEAT_SIZE_BYTE,        // Bytes/hwords/words
+        true,                      // Increment source address
+        false);                    // Don't increment dest address
+      // This is the number of EXTRA descriptors beyond the first.
+      int numReadDescriptors  = ((maxReadBytes  + 65534) / 65535) - 1;
+      int numWriteDescriptors = ((maxWriteBytes + 65534) / 65535) - 1;
+      int totalDescriptors    = numReadDescriptors + numWriteDescriptors;
+
+      if(totalDescriptors <= 0) { // Don't need extra descriptors,
+        use_dma = true;           // channels are allocated, we're good.
+      } else {                    // Else allocate extra descriptor lists...
+        // Although DMA descriptors are technically a linked list, we just
+        // allocate a chunk all at once, and finesse the pointers later.
+        if((extraReadDescriptors = (DmacDescriptor *)malloc(
+          totalDescriptors * sizeof(DmacDescriptor)))) {
+          use_dma = true; // Everything allocated successfully
+          extraWriteDescriptors = &extraReadDescriptors[numReadDescriptors];
+          // Initialize descriptors (copy from first ones)
+          for(int i=0; i<numReadDescriptors; i++) {
+            memcpy(&extraReadDescriptors[i], firstReadDescriptor,
+              sizeof(DmacDescriptor));
+          }
+          for(int i=0; i<numWriteDescriptors; i++) {
+            memcpy(&extraWriteDescriptors[i], firstWriteDescriptor,
+              sizeof(DmacDescriptor));
+          }
+        } // end malloc
+      } // end extra descriptor check
+
+      if(use_dma) { // If everything allocated successfully,
+        return;     // then we're done here.
+      }             // Otherwise clean up interim allocations...
+      writeChannel.free();
+    } // end writeChannel alloc
+    readChannel.free();
+  } // end readChannel alloc
+
+  // NOT FATAL if channel or descriptor allocation fails.
+  // transfer() function will fall back on a manual byte-by-byte loop.
+}
+
+void SPIClass::transfer(const void *txbuf, void *rxbuf, size_t count,
+  bool block) {
+
+  if((!txbuf && !rxbuf) || !count) { // Validate inputs
+    return;
+  }
+  // OK to assume now that txbuf and/or rxbuf are non-NULL, an if/else is
+  // often sufficient, don't need else-ifs for everything buffer related.
+
+  uint8_t *txbuf8 = (uint8_t *)txbuf; // Must cast to byte size
+  uint8_t *rxbuf8 = (uint8_t *)rxbuf; // for pointer math
+
+  if(use_dma) { // DMA-BASED TRANSFER YAY ----------------------------------
+
+    static const uint8_t dum = 0xFF; // Dummy byte for read-only xfers
+
+    // Set up DMA descriptor lists -----------------------------------------
+
+    DmacDescriptor *rDesc = firstReadDescriptor;
+    DmacDescriptor *wDesc = firstWriteDescriptor;
+    int descIdx = 0; // Index into extra descriptor lists
+
+    while(count) { // Counts down to end of transfer
+      uint32_t bytesThisDescriptor = count;
+      if(bytesThisDescriptor > 65535) { // Limit each descriptor
+        bytesThisDescriptor = 65535;    // to 65535 (not 65536) bytes
+      }
+      rDesc->BTCNT.reg = wDesc->BTCNT.reg = bytesThisDescriptor;
+      if(rxbuf) { // Read-only or read+write
+        // Auto-inc addresses in DMA descriptors must point to END of data.
+        // Buf pointers would advance at end of loop anyway, do it now...
+        rxbuf8 += bytesThisDescriptor;
+        rDesc->DSTADDR.reg = (uint32_t)rxbuf8;
+      }
+      if(txbuf) { // Write-only or read+write
+        txbuf8 += bytesThisDescriptor; // Same as above
+        wDesc->SRCADDR.reg       = (uint32_t)txbuf8;
+        wDesc->BTCTRL.bit.SRCINC = 1; // Increment source pointer
+      } else { // Read-only requires dummy write
+        wDesc->SRCADDR.reg       = (uint32_t)&dum;
+        wDesc->BTCTRL.bit.SRCINC = 0; // Don't increment source pointer
+      }
+      count -= bytesThisDescriptor;
+      if(count) { // Still more data?
+        // Link to next descriptors. Extra descriptors are IN ADDITION
+        // to first, so it's safe and correct that descIdx starts at 0.
+        rDesc->DESCADDR.reg = (uint32_t)&extraReadDescriptors[descIdx];
+        wDesc->DESCADDR.reg = (uint32_t)&extraWriteDescriptors[descIdx];
+        rDesc = &extraReadDescriptors[descIdx];  // Update pointers to
+        wDesc = &extraWriteDescriptors[descIdx]; // next descriptors
+        descIdx++;
+        // A write-only transfer doesn't use the read descriptor list, but
+        // it's quicker to build it (full of nonsense) anyway than to check.
+      } else { // No more data, end descriptor linked lists
+        rDesc->DESCADDR.reg = wDesc->DESCADDR.reg = 0;
+      }
+    }
+
+    // Set up DMA transfer job(s) ------------------------------------------
+
+    if(rxbuf) { // Read+write or read-only
+      // End-of-read callback is already set up, disable write CB, start job
+      writeChannel.setCallback(dmaDoNothingCallback);
+      readChannel.startJob();
+    } else { // Write-only, use end-of-write callback
+      writeChannel.setCallback(dmaCallback);
+    }
+
+    // Run DMA jobs, blocking if requested ---------------------------------
+
+    dma_busy = true;
+    writeChannel.startJob(); // All xfers, even read-only, need write job.
+    if(block) {              // If blocking transfer requested,
+      while(dma_busy);       // wait for job to finish
+    }
+
+  } else { // NON-DMA FALLBACK ---------------------------------------------
+
+    if(txbuf8) {
+      if(rxbuf8) { // Write + read simultaneously
+        while(count--) {
+          *rxbuf8++ = _p_sercom->transferDataSPI(*txbuf8++);
+        }
+      } else {     // Write only
+        while(count--) {
+          (void)_p_sercom->transferDataSPI(*txbuf8++);
+        }
+      }
+    } else {       // Read only
+      while(count--) {
+        *rxbuf8++ = _p_sercom->transferDataSPI(0xFF);
+      }
+    }
+
+  } // end non-DMA
+}
+
+// Waits for a prior in-background DMA transfer to complete.
+void SPIClass::waitForTransfer(void) {
+  while(dma_busy);
+}
+
+// End DMA-based SPI transfer() code ---------------------------------------
+
 void SPIClass::attachInterrupt() {
   // Should be enableInterrupt()
 }
@@ -243,6 +468,61 @@ void SPIClass::detachInterrupt() {
   // Should be disableInterrupt()
 }
 
+// SPI DMA lookup works on both SAMD21 and SAMD51
+
+static const struct {
+  volatile uint32_t *data_reg;
+  int                dmac_id_tx;
+  int                dmac_id_rx;
+} sercomData[] = {
+  { &SERCOM0->SPI.DATA.reg, SERCOM0_DMAC_ID_TX, SERCOM0_DMAC_ID_RX },
+  { &SERCOM1->SPI.DATA.reg, SERCOM1_DMAC_ID_TX, SERCOM1_DMAC_ID_RX },
+  { &SERCOM2->SPI.DATA.reg, SERCOM2_DMAC_ID_TX, SERCOM2_DMAC_ID_RX },
+  { &SERCOM3->SPI.DATA.reg, SERCOM3_DMAC_ID_TX, SERCOM3_DMAC_ID_RX },
+#if defined(SERCOM4)
+  { &SERCOM4->SPI.DATA.reg, SERCOM4_DMAC_ID_TX, SERCOM4_DMAC_ID_RX },
+#endif
+#if defined(SERCOM5)
+  { &SERCOM5->SPI.DATA.reg, SERCOM5_DMAC_ID_TX, SERCOM5_DMAC_ID_RX },
+#endif
+#if defined(SERCOM6)
+  { &SERCOM6->SPI.DATA.reg, SERCOM6_DMAC_ID_TX, SERCOM6_DMAC_ID_RX },
+#endif
+#if defined(SERCOM7)
+  { &SERCOM7->SPI.DATA.reg, SERCOM7_DMAC_ID_TX, SERCOM7_DMAC_ID_RX },
+#endif
+};
+
+volatile uint32_t *SPIClass::getDataRegister(void) {
+  int8_t idx = _p_sercom->getSercomIndex();
+  return (idx >= 0) ? sercomData[idx].data_reg: NULL;
+}
+
+int SPIClass::getDMAC_ID_TX(void) {
+  int8_t idx = _p_sercom->getSercomIndex();
+  return (idx >= 0) ? sercomData[idx].dmac_id_tx : -1;
+}
+
+int SPIClass::getDMAC_ID_RX(void) {
+  int8_t idx = _p_sercom->getSercomIndex();
+  return (idx >= 0) ? sercomData[idx].dmac_id_rx : -1;
+}
+
+#if defined(__SAMD51__)
+
+// Set the SPI device's SERCOM clock CORE and SLOW clock sources.
+// SercomClockSource values are an enumeration in SERCOM.h.
+// This works on SAMD51 only.  On SAMD21, a dummy function is declared
+// in SPI.h which compiles to nothing, so user code doesn't need to check
+// and conditionally compile lines for different architectures.
+void SPIClass::setClockSource(SercomClockSource clk) {
+  int8_t idx = _p_sercom->getSercomIndex();
+  _p_sercom->setClockSource(idx, clk, true);  // true  = set core clock
+  _p_sercom->setClockSource(idx, clk, false); // false = set slow clock
+}
+
+#endif // end __SAMD51__
+
 #if SPI_INTERFACES_COUNT > 0
   /* In case new variant doesn't define these macros,
    * we put here the ones for Arduino Zero.
@@ -275,4 +555,3 @@ void SPIClass::detachInterrupt() {
 #if SPI_INTERFACES_COUNT > 5
   SPIClass SPI5(&PERIPH_SPI5, PIN_SPI5_MISO, PIN_SPI5_SCK, PIN_SPI5_MOSI, PAD_SPI5_TX, PAD_SPI5_RX);
 #endif
-

libraries/SPI/SPI.h

@@ -21,6 +21,7 @@
 #define _SPI_H_INCLUDED
 
 #include <Arduino.h>
+#include <Adafruit_ZeroDMA.h>
 
 // SPI_HAS_TRANSACTION means SPI has
 //   - beginTransaction()
@@ -37,12 +38,27 @@
 #define SPI_MODE2 0x03
 #define SPI_MODE3 0x01
 
-#if defined(ARDUINO_ARCH_SAMD)
+#if defined(__SAMD51__)
+  // SAMD51 has configurable MAX_SPI, else use peripheral clock default.
+  // Update: changing MAX_SPI via compiler flags is DEPRECATED, because
+  // this affects ALL SPI peripherals including some that should NOT be
+  // changed (e.g. anything using SD card). Use the setClockSource()
+  // function instead. This is left here for compatibility with interim code.
+  #if !defined(MAX_SPI)
+    #define MAX_SPI 24000000
+  #endif
+  #define SPI_MIN_CLOCK_DIVIDER 1
+#else
   // The datasheet specifies a typical SPI SCK period (tSCK) of 42 ns,
   // see "Table 36-48. SPI Timing Characteristics and Requirements",
   // which translates into a maximum SPI clock of 23.8 MHz.
-  // Conservatively, the divider is set for a 12 MHz maximum SPI clock.
-  #define SPI_MIN_CLOCK_DIVIDER (uint8_t)(1 + ((F_CPU - 1) / 12000000))
+  // We'll permit use of 24 MHz SPI even though this is slightly out
+  // of spec. Given how clock dividers work, the next "sensible"
+  // threshold would be a substantial drop down to 12 MHz.
+  #if !defined(MAX_SPI)
+    #define MAX_SPI 24000000
+  #endif
+  #define SPI_MIN_CLOCK_DIVIDER (uint8_t)(1 + ((F_CPU - 1) / MAX_SPI))
 #endif
 
 class SPISettings {
@@ -64,7 +80,11 @@ class SPISettings {
   }
 
   void init_AlwaysInline(uint32_t clock, BitOrder bitOrder, uint8_t dataMode) __attribute__((__always_inline__)) {
-    this->clockFreq = (clock >= (F_CPU / SPI_MIN_CLOCK_DIVIDER) ? F_CPU / SPI_MIN_CLOCK_DIVIDER : clock);
+#if defined(__SAMD51__)
+    this->clockFreq = clock; // Clipping handled in SERCOM.cpp
+#else
+    this->clockFreq = clock >= MAX_SPI ? MAX_SPI : clock;
+#endif
 
     this->bitOrder = (bitOrder == MSBFIRST ? MSB_FIRST : LSB_FIRST);
 
@@ -94,10 +114,12 @@ class SPIClass {
   public:
   SPIClass(SERCOM *p_sercom, uint8_t uc_pinMISO, uint8_t uc_pinSCK, uint8_t uc_pinMOSI, SercomSpiTXPad, SercomRXPad);
 
-
   byte transfer(uint8_t data);
   uint16_t transfer16(uint16_t data);
   void transfer(void *buf, size_t count);
+  void transfer(const void* txbuf, void* rxbuf, size_t count,
+         bool block = true);
+  void waitForTransfer(void);
 
   // Transaction Functions
   void usingInterrupt(int interruptNumber);
@@ -116,8 +138,21 @@ class SPIClass {
   void setDataMode(uint8_t uc_mode);
   void setClockDivider(uint8_t uc_div);
 
+  // SERCOM lookup functions are available on both SAMD51 and 21.
+  volatile uint32_t *getDataRegister(void);
+  int getDMAC_ID_TX(void);
+  int getDMAC_ID_RX(void);
+  uint8_t getSercomIndex(void) { return _p_sercom->getSercomIndex(); };
+#if defined(__SAMD51__)
+  // SERCOM clock source override is available only on SAMD51.
+  void setClockSource(SercomClockSource clk);
+#else
+  // On SAMD21, this compiles to nothing, so user code doesn't need to
+  // check and conditionally compile lines for different architectures.
+  void setClockSource(SercomClockSource clk) { (void)clk; };
+#endif // end __SAMD51__
+
   private:
-  void init();
   void config(SPISettings settings);
 
   SERCOM *_p_sercom;
@@ -132,6 +167,18 @@ class SPIClass {
   uint8_t interruptMode;
   char interruptSave;
   uint32_t interruptMask;
+
+  // transfer(txbuf, rxbuf, count, block) uses DMA when possible
+  Adafruit_ZeroDMA readChannel;
+  Adafruit_ZeroDMA writeChannel;
+  DmacDescriptor  *firstReadDescriptor   = NULL;  // List entry point
+  DmacDescriptor  *firstWriteDescriptor  = NULL;
+  DmacDescriptor  *extraReadDescriptors  = NULL;  // Add'l descriptors
+  DmacDescriptor  *extraWriteDescriptors = NULL;
+  bool             use_dma               = false; // true on successful alloc
+  volatile bool    dma_busy              = false;
+  void             dmaAllocate(void);
+  static void      dmaCallback(Adafruit_ZeroDMA *dma);
 };
 
 #if SPI_INTERFACES_COUNT > 0
@@ -155,14 +202,12 @@ class SPIClass {
 
 // For compatibility with sketches designed for AVR @ 16 MHz
 // New programs should use SPI.beginTransaction to set the SPI clock
-#if F_CPU == 48000000
-  #define SPI_CLOCK_DIV2   6
-  #define SPI_CLOCK_DIV4   12
-  #define SPI_CLOCK_DIV8   24
-  #define SPI_CLOCK_DIV16  48
-  #define SPI_CLOCK_DIV32  96
-  #define SPI_CLOCK_DIV64  192
-  #define SPI_CLOCK_DIV128 255
-#endif
+#define SPI_CLOCK_DIV2   (MAX_SPI * 2 / 8000000)
+#define SPI_CLOCK_DIV4   (MAX_SPI * 2 / 4000000)
+#define SPI_CLOCK_DIV8   (MAX_SPI * 2 / 2000000)
+#define SPI_CLOCK_DIV16  (MAX_SPI * 2 / 1000000)
+#define SPI_CLOCK_DIV32  (MAX_SPI * 2 / 500000)
+#define SPI_CLOCK_DIV64  (MAX_SPI * 2 / 250000)
+#define SPI_CLOCK_DIV128 (MAX_SPI * 2 / 125000)
 
 #endif

libraries/Servo/README.adoc

@@ -0,0 +1,25 @@
+= Servo Library for Arduino =
+
+This library allows an Arduino board to control RC (hobby) servo motors.
+
+For more information about this library please visit us at
+http://www.arduino.cc/en/Reference/Servo
+
+== License ==
+
+Copyright (c) 2013 Arduino LLC. All right reserved.
+Copyright (c) 2009 Michael Margolis.  All right reserved.
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA

libraries/Servo/examples/Knob/Knob.ino

@@ -0,0 +1,27 @@
+/*
+ Controlling a servo position using a potentiometer (variable resistor)
+ by Michal Rinott <http://people.interaction-ivrea.it/m.rinott>
+
+ modified on 8 Nov 2013
+ by Scott Fitzgerald
+ http://www.arduino.cc/en/Tutorial/Knob
+*/
+
+#include <Servo.h>
+
+Servo myservo;  // create servo object to control a servo
+
+int potpin = 0;  // analog pin used to connect the potentiometer
+int val;    // variable to read the value from the analog pin
+
+void setup() {
+  myservo.attach(9);  // attaches the servo on pin 9 to the servo object
+}
+
+void loop() {
+  val = analogRead(potpin);            // reads the value of the potentiometer (value between 0 and 1023)
+  val = map(val, 0, 1023, 0, 180);     // scale it to use it with the servo (value between 0 and 180)
+  myservo.write(val);                  // sets the servo position according to the scaled value
+  delay(15);                           // waits for the servo to get there
+}
+