631 lines
18 KiB
C
631 lines
18 KiB
C
/*
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Copyright (c) 2014 Arduino LLC. All right reserved.
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SAMD51 support added by Adafruit - Copyright (c) 2018 Dean Miller for Adafruit Industries
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This library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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This library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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See the GNU Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with this library; if not, write to the Free Software
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Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "Arduino.h"
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#include "wiring_private.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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static int _readResolution = 10;
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static int _ADCResolution = 10;
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#if defined(__SAMD51__)
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static int _writeResolution = 12;
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static int _dacResolution = 12;
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#else
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static int _writeResolution = 8;
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static int _dacResolution = 8;
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#endif
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#if !defined(__SAMD51__)
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// Wait for synchronization of registers between the clock domains
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static __inline__ void syncADC() __attribute__((always_inline, unused));
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static void syncADC() {
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while (ADC->STATUS.bit.SYNCBUSY == 1)
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;
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}
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// ATSAMR, for example, doesn't have a DAC
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#ifdef DAC
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// Wait for synchronization of registers between the clock domains
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static __inline__ void syncDAC() __attribute__((always_inline, unused));
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static void syncDAC() {
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while (DAC->STATUS.bit.SYNCBUSY == 1)
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;
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}
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#endif
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// Wait for synchronization of registers between the clock domains
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static __inline__ void syncTC_8(Tc* TCx) __attribute__((always_inline, unused));
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static void syncTC_8(Tc* TCx) {
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while (TCx->COUNT8.STATUS.bit.SYNCBUSY);
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}
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// Wait for synchronization of registers between the clock domains
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static __inline__ void syncTCC(Tcc* TCCx) __attribute__((always_inline, unused));
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static void syncTCC(Tcc* TCCx) {
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while (TCCx->SYNCBUSY.reg & TCC_SYNCBUSY_MASK);
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}
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#else
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static bool dacEnabled[2];
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#endif
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void analogReadResolution(int res)
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{
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_readResolution = res;
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#if defined(__SAMD51__)
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if (res > 10) {
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ADC0->CTRLB.bit.RESSEL = ADC_CTRLB_RESSEL_12BIT_Val;
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_ADCResolution = 12;
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} else if (res > 8) {
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ADC0->CTRLB.bit.RESSEL = ADC_CTRLB_RESSEL_10BIT_Val;
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_ADCResolution = 10;
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} else {
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ADC0->CTRLB.bit.RESSEL = ADC_CTRLB_RESSEL_8BIT_Val;
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_ADCResolution = 8;
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}
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while(ADC0->SYNCBUSY.reg & ADC_SYNCBUSY_CTRLB); //wait for sync
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#else
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if (res > 10) {
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ADC->CTRLB.bit.RESSEL = ADC_CTRLB_RESSEL_12BIT_Val;
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_ADCResolution = 12;
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} else if (res > 8) {
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ADC->CTRLB.bit.RESSEL = ADC_CTRLB_RESSEL_10BIT_Val;
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_ADCResolution = 10;
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} else {
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ADC->CTRLB.bit.RESSEL = ADC_CTRLB_RESSEL_8BIT_Val;
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_ADCResolution = 8;
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}
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syncADC();
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#endif
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}
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void analogWriteResolution(int res)
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{
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_writeResolution = res;
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}
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static inline uint32_t mapResolution(uint32_t value, uint32_t from, uint32_t to)
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{
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if (from == to) {
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return value;
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}
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if (from > to) {
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return value >> (from-to);
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}
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return value << (to-from);
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}
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/*
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* Internal Reference is at 1.0v
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* External Reference should be between 1v and VDDANA-0.6v=2.7v
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*
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* Warning : On Arduino Zero board the input/output voltage for SAMD21G18 is 3.3 volts maximum
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*/
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void analogReference(eAnalogReference mode)
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{
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#if defined(__SAMD51__)
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while(ADC0->SYNCBUSY.reg & ADC_SYNCBUSY_REFCTRL); //wait for sync
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//TODO: fix gains
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switch (mode)
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{
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case AR_INTERNAL:
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case AR_INTERNAL2V23:
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//ADC0->GAINCORR.reg = ADC_GAINCORR_GAINCORR(); // Gain Factor Selection
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ADC0->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_INTVCC0_Val; // 1/1.48 VDDANA = 1/1.48* 3V3 = 2.2297
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break;
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case AR_EXTERNAL:
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//ADC0->INPUTCTRL.bit.GAIN = ADC_INPUTCTRL_GAIN_1X_Val; // Gain Factor Selection
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ADC0->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_AREFA_Val;
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break;
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/* Don't think this works on SAMD51
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case AR_INTERNAL1V0:
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//ADC0->INPUTCTRL.bit.GAIN = ADC_INPUTCTRL_GAIN_1X_Val; // Gain Factor Selection
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ADC0->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_INT1V_Val; // 1.0V voltage reference
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break;
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*/
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case AR_INTERNAL1V65:
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//ADC0->INPUTCTRL.bit.GAIN = ADC_INPUTCTRL_GAIN_1X_Val; // Gain Factor Selection
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ADC0->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_INTVCC1_Val; // 1/2 VDDANA = 0.5* 3V3 = 1.65V
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break;
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case AR_DEFAULT:
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default:
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//ADC0->INPUTCTRL.bit.GAIN = ADC_INPUTCTRL_GAIN_DIV2_Val;
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ADC0->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_INTVCC1_Val; // 1/2 VDDANA = 0.5* 3V3 = 1.65V
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break;
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}
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#else
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syncADC();
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switch (mode)
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{
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case AR_INTERNAL:
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case AR_INTERNAL2V23:
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ADC->INPUTCTRL.bit.GAIN = ADC_INPUTCTRL_GAIN_1X_Val; // Gain Factor Selection
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ADC->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_INTVCC0_Val; // 1/1.48 VDDANA = 1/1.48* 3V3 = 2.2297
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break;
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case AR_EXTERNAL:
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ADC->INPUTCTRL.bit.GAIN = ADC_INPUTCTRL_GAIN_1X_Val; // Gain Factor Selection
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ADC->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_AREFA_Val;
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break;
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case AR_INTERNAL1V0:
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ADC->INPUTCTRL.bit.GAIN = ADC_INPUTCTRL_GAIN_1X_Val; // Gain Factor Selection
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ADC->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_INT1V_Val; // 1.0V voltage reference
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break;
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case AR_INTERNAL1V65:
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ADC->INPUTCTRL.bit.GAIN = ADC_INPUTCTRL_GAIN_1X_Val; // Gain Factor Selection
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ADC->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_INTVCC1_Val; // 1/2 VDDANA = 0.5* 3V3 = 1.65V
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break;
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case AR_DEFAULT:
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default:
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ADC->INPUTCTRL.bit.GAIN = ADC_INPUTCTRL_GAIN_DIV2_Val;
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ADC->REFCTRL.bit.REFSEL = ADC_REFCTRL_REFSEL_INTVCC1_Val; // 1/2 VDDANA = 0.5* 3V3 = 1.65V
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break;
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}
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#endif
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}
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uint32_t analogRead(uint32_t pin)
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{
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uint32_t valueRead = 0;
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#if defined(PIN_A6)
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if (pin == 6) {
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pin = PIN_A6;
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} else
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#endif
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#if defined(PIN_A7)
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if (pin == 7) {
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pin = PIN_A7;
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} else
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#endif
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if (pin <= 5) {
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pin += A0;
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}
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pinPeripheral(pin, PIO_ANALOG);
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//ATSAMR, for example, doesn't have a DAC
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#ifdef DAC
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#if defined(__SAMD51__)
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if (pin == A0 || pin == A1) { // Disable DAC, if analogWrite(A0,dval) used previously the DAC is enabled
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uint8_t channel = (pin == PIN_A0 ? 0 : 1);
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if(dacEnabled[channel]){
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dacEnabled[channel] = false;
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while (DAC->SYNCBUSY.bit.ENABLE || DAC->SYNCBUSY.bit.SWRST);
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DAC->CTRLA.bit.ENABLE = 0; // disable DAC
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while (DAC->SYNCBUSY.bit.ENABLE || DAC->SYNCBUSY.bit.SWRST);
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DAC->DACCTRL[channel].bit.ENABLE = 0;
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while (DAC->SYNCBUSY.bit.ENABLE || DAC->SYNCBUSY.bit.SWRST);
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DAC->CTRLA.bit.ENABLE = 1; // enable DAC
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}
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while (DAC->SYNCBUSY.bit.ENABLE);
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#else
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if (pin == A0) { // Disable DAC, if analogWrite(A0,dval) used previously the DAC is enabled
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syncDAC();
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DAC->CTRLA.bit.ENABLE = 0x00; // Disable DAC
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//DAC->CTRLB.bit.EOEN = 0x00; // The DAC output is turned off.
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syncDAC();
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#endif
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}
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#endif
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#if defined(__SAMD51__)
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while( ADC0->SYNCBUSY.reg & ADC_SYNCBUSY_INPUTCTRL ); //wait for sync
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ADC0->INPUTCTRL.bit.MUXPOS = g_APinDescription[pin].ulADCChannelNumber; // Selection for the positive ADC input
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// Control A
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/*
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* Bit 1 ENABLE: Enable
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* 0: The ADC is disabled.
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* 1: The ADC is enabled.
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* Due to synchronization, there is a delay from writing CTRLA.ENABLE until the peripheral is enabled/disabled. The
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* value written to CTRL.ENABLE will read back immediately and the Synchronization Busy bit in the Status register
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* (STATUS.SYNCBUSY) will be set. STATUS.SYNCBUSY will be cleared when the operation is complete.
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*
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* Before enabling the ADC, the asynchronous clock source must be selected and enabled, and the ADC reference must be
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* configured. The first conversion after the reference is changed must not be used.
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*/
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while( ADC0->SYNCBUSY.reg & ADC_SYNCBUSY_ENABLE ); //wait for sync
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ADC0->CTRLA.bit.ENABLE = 0x01; // Enable ADC
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// Start conversion
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while( ADC0->SYNCBUSY.reg & ADC_SYNCBUSY_ENABLE ); //wait for sync
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ADC0->SWTRIG.bit.START = 1;
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// Clear the Data Ready flag
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ADC0->INTFLAG.reg = ADC_INTFLAG_RESRDY;
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// Start conversion again, since The first conversion after the reference is changed must not be used.
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ADC0->SWTRIG.bit.START = 1;
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// Store the value
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while (ADC0->INTFLAG.bit.RESRDY == 0); // Waiting for conversion to complete
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valueRead = ADC0->RESULT.reg;
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while( ADC0->SYNCBUSY.reg & ADC_SYNCBUSY_ENABLE ); //wait for sync
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ADC0->CTRLA.bit.ENABLE = 0x00; // Disable ADC
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while( ADC0->SYNCBUSY.reg & ADC_SYNCBUSY_ENABLE ); //wait for sync
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#else
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syncADC();
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ADC->INPUTCTRL.bit.MUXPOS = g_APinDescription[pin].ulADCChannelNumber; // Selection for the positive ADC input
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// Control A
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/*
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* Bit 1 ENABLE: Enable
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* 0: The ADC is disabled.
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* 1: The ADC is enabled.
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* Due to synchronization, there is a delay from writing CTRLA.ENABLE until the peripheral is enabled/disabled. The
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* value written to CTRL.ENABLE will read back immediately and the Synchronization Busy bit in the Status register
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* (STATUS.SYNCBUSY) will be set. STATUS.SYNCBUSY will be cleared when the operation is complete.
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*
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* Before enabling the ADC, the asynchronous clock source must be selected and enabled, and the ADC reference must be
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* configured. The first conversion after the reference is changed must not be used.
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*/
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syncADC();
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ADC->CTRLA.bit.ENABLE = 0x01; // Enable ADC
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// Start conversion
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syncADC();
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ADC->SWTRIG.bit.START = 1;
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// Clear the Data Ready flag
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ADC->INTFLAG.reg = ADC_INTFLAG_RESRDY;
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// Start conversion again, since The first conversion after the reference is changed must not be used.
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syncADC();
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ADC->SWTRIG.bit.START = 1;
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// Store the value
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while (ADC->INTFLAG.bit.RESRDY == 0); // Waiting for conversion to complete
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valueRead = ADC->RESULT.reg;
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syncADC();
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ADC->CTRLA.bit.ENABLE = 0x00; // Disable ADC
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syncADC();
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#endif
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return mapResolution(valueRead, _ADCResolution, _readResolution);
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}
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// Right now, PWM output only works on the pins with
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// hardware support. These are defined in the appropriate
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// pins_*.c file. For the rest of the pins, we default
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// to digital output.
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void analogWrite(uint32_t pin, uint32_t value)
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{
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PinDescription pinDesc = g_APinDescription[pin];
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uint32_t attr = pinDesc.ulPinAttribute;
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// ATSAMR, for example, doesn't have a DAC
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#ifdef DAC
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if ((attr & PIN_ATTR_ANALOG) == PIN_ATTR_ANALOG)
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{
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// DAC handling code
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#if defined(__SAMD51__)
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if (pin != PIN_A0 && pin != PIN_A1) { // 2 DACs on A0 (PA02) and A1 (PA05)
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#else
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if (pin != PIN_A0) { // Only 1 DAC on A0 (PA02)
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#endif
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return;
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}
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value = mapResolution(value, _writeResolution, _dacResolution);
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#if defined(__SAMD51__)
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uint8_t channel = (pin == PIN_A0 ? 0 : 1);
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pinPeripheral(pin, PIO_ANALOG);
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if(!dacEnabled[channel]){
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dacEnabled[channel] = true;
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while (DAC->SYNCBUSY.bit.ENABLE || DAC->SYNCBUSY.bit.SWRST);
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DAC->CTRLA.bit.ENABLE = 0; // disable DAC
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while (DAC->SYNCBUSY.bit.ENABLE || DAC->SYNCBUSY.bit.SWRST);
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DAC->DACCTRL[channel].bit.ENABLE = 1;
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while (DAC->SYNCBUSY.bit.ENABLE || DAC->SYNCBUSY.bit.SWRST);
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DAC->CTRLA.bit.ENABLE = 1; // enable DAC
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if(channel == 0){
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while ( !DAC->STATUS.bit.READY0 );
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while (DAC->SYNCBUSY.bit.DATA0);
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DAC->DATA[0].reg = value;
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}
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else if(channel == 1){
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while ( !DAC->STATUS.bit.READY1 );
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while (DAC->SYNCBUSY.bit.DATA1);
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DAC->DATA[1].reg = value;
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}
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delayMicroseconds(10000);
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}
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//ERROR!
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while(!DAC->DACCTRL[channel].bit.ENABLE);
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if(channel == 0){
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while ( !DAC->STATUS.bit.READY0 );
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while (DAC->SYNCBUSY.bit.DATA0);
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DAC->DATA[0].reg = value; // DAC on 10 bits.
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}
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else if(channel == 1){
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while ( !DAC->STATUS.bit.READY1 );
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while (DAC->SYNCBUSY.bit.DATA1);
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DAC->DATA[1].reg = value; // DAC on 10 bits.
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}
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#else
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value = mapResolution(value, _dacResolution, 10);
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syncDAC();
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DAC->DATA.reg = value & 0x3FF; // DAC on 10 bits.
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syncDAC();
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DAC->CTRLA.bit.ENABLE = 0x01; // Enable DAC
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syncDAC();
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#endif
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return;
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}
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#endif
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if ((attr & PIN_ATTR_PWM) == PIN_ATTR_PWM)
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{
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uint32_t tcNum = GetTCNumber(pinDesc.ulPWMChannel);
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uint8_t tcChannel = GetTCChannelNumber(pinDesc.ulPWMChannel);
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static bool tcEnabled[TCC_INST_NUM+TC_INST_NUM];
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if (attr & PIN_ATTR_TIMER) {
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#if !(ARDUINO_SAMD_VARIANT_COMPLIANCE >= 10603)
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// Compatibility for cores based on SAMD core <=1.6.2
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if (pinDesc.ulPinType == PIO_TIMER_ALT) {
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pinPeripheral(pin, PIO_TIMER_ALT);
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} else
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#endif
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{
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#if defined(__SAMD51__)
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//on SAMD51 we are only using TCC for timers
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pinPeripheral(pin, PIO_TCC_PDEC);
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#else
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pinPeripheral(pin, PIO_TIMER);
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#endif
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}
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} else if ((attr & PIN_ATTR_TIMER_ALT) == PIN_ATTR_TIMER_ALT){
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//this is on an alt timer
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pinPeripheral(pin, PIO_TIMER_ALT);
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}
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else{
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return;
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}
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|
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if (!tcEnabled[tcNum]) {
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tcEnabled[tcNum] = true;
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|
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#if defined(__SAMD51__)
|
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uint32_t GCLK_CLKCTRL_IDs[] = {
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TCC0_GCLK_ID,
|
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TCC1_GCLK_ID,
|
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TCC2_GCLK_ID,
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#if defined(TCC3)
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TCC3_GCLK_ID,
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TCC4_GCLK_ID,
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TC5_GCLK_ID,
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#endif
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};
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GCLK->PCHCTRL[GCLK_CLKCTRL_IDs[tcNum]].reg = GCLK_PCHCTRL_GEN_GCLK0_Val | (1 << GCLK_PCHCTRL_CHEN_Pos); //use clock generator 0
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|
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// Set PORT
|
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if (tcNum >= TCC_INST_NUM) {
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// -- Configure TC
|
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Tc* TCx = (Tc*) GetTC(pinDesc.ulPWMChannel);
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|
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//reset
|
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TCx->COUNT8.CTRLA.bit.SWRST = 1;
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while (TCx->COUNT8.SYNCBUSY.bit.SWRST);
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|
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// Disable TCx
|
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TCx->COUNT8.CTRLA.bit.ENABLE = 0;
|
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while (TCx->COUNT8.SYNCBUSY.bit.ENABLE);
|
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// Set Timer counter Mode to 8 bits, normal PWM, prescaler 1/256
|
|
TCx->COUNT8.CTRLA.reg = TC_CTRLA_MODE_COUNT8 | TC_CTRLA_PRESCALER_DIV256;
|
|
TCx->COUNT8.WAVE.reg = TC_WAVE_WAVEGEN_NPWM;
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|
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while (TCx->COUNT8.SYNCBUSY.bit.CC0);
|
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// Set the initial value
|
|
TCx->COUNT8.CC[tcChannel].reg = (uint8_t) value;
|
|
while (TCx->COUNT8.SYNCBUSY.bit.CC0);
|
|
// Set PER to maximum counter value (resolution : 0xFF)
|
|
TCx->COUNT8.PER.reg = 0xFF;
|
|
while (TCx->COUNT8.SYNCBUSY.bit.PER);
|
|
// Enable TCx
|
|
TCx->COUNT8.CTRLA.bit.ENABLE = 1;
|
|
while (TCx->COUNT8.SYNCBUSY.bit.ENABLE);
|
|
} else {
|
|
// -- Configure TCC
|
|
Tcc* TCCx = (Tcc*) GetTC(pinDesc.ulPWMChannel);
|
|
|
|
TCCx->CTRLA.bit.SWRST = 1;
|
|
while (TCCx->SYNCBUSY.bit.SWRST);
|
|
|
|
// Disable TCCx
|
|
TCCx->CTRLA.bit.ENABLE = 0;
|
|
while (TCCx->SYNCBUSY.bit.ENABLE);
|
|
// Set prescaler to 1/256
|
|
TCCx->CTRLA.reg = TCC_CTRLA_PRESCALER_DIV256 | TCC_CTRLA_PRESCSYNC_GCLK;
|
|
|
|
// Set TCx as normal PWM
|
|
TCCx->WAVE.reg = TCC_WAVE_WAVEGEN_NPWM;
|
|
while ( TCCx->SYNCBUSY.bit.WAVE );
|
|
|
|
while (TCCx->SYNCBUSY.bit.CC0 || TCCx->SYNCBUSY.bit.CC1);
|
|
// Set the initial value
|
|
TCCx->CC[tcChannel].reg = (uint32_t) value;
|
|
while (TCCx->SYNCBUSY.bit.CC0 || TCCx->SYNCBUSY.bit.CC1);
|
|
// Set PER to maximum counter value (resolution : 0xFF)
|
|
TCCx->PER.reg = 0xFF;
|
|
while (TCCx->SYNCBUSY.bit.PER);
|
|
// Enable TCCx
|
|
TCCx->CTRLA.bit.ENABLE = 1;
|
|
while (TCCx->SYNCBUSY.bit.ENABLE);
|
|
}
|
|
} else {
|
|
if (tcNum >= TCC_INST_NUM) {
|
|
Tc* TCx = (Tc*) GetTC(pinDesc.ulPWMChannel);
|
|
TCx->COUNT8.CC[tcChannel].reg = (uint8_t) value;
|
|
while (TCx->COUNT8.SYNCBUSY.bit.CC0 || TCx->COUNT8.SYNCBUSY.bit.CC1);
|
|
} else {
|
|
Tcc* TCCx = (Tcc*) GetTC(pinDesc.ulPWMChannel);
|
|
while (TCCx->SYNCBUSY.bit.CTRLB);
|
|
while (TCCx->SYNCBUSY.bit.CC0 || TCCx->SYNCBUSY.bit.CC1);
|
|
TCCx->CCBUF[tcChannel].reg = (uint32_t) value;
|
|
while (TCCx->SYNCBUSY.bit.CC0 || TCCx->SYNCBUSY.bit.CC1);
|
|
TCCx->CTRLBCLR.bit.LUPD = 1;
|
|
while (TCCx->SYNCBUSY.bit.CTRLB);
|
|
}
|
|
}
|
|
|
|
#else
|
|
uint16_t GCLK_CLKCTRL_IDs[] = {
|
|
GCLK_CLKCTRL_ID(GCM_TCC0_TCC1), // TCC0
|
|
GCLK_CLKCTRL_ID(GCM_TCC0_TCC1), // TCC1
|
|
GCLK_CLKCTRL_ID(GCM_TCC2_TC3), // TCC2
|
|
GCLK_CLKCTRL_ID(GCM_TCC2_TC3), // TC3
|
|
GCLK_CLKCTRL_ID(GCM_TC4_TC5), // TC4
|
|
GCLK_CLKCTRL_ID(GCM_TC4_TC5), // TC5
|
|
GCLK_CLKCTRL_ID(GCM_TC6_TC7), // TC6
|
|
GCLK_CLKCTRL_ID(GCM_TC6_TC7), // TC7
|
|
};
|
|
GCLK->CLKCTRL.reg = (uint16_t) (GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_IDs[tcNum]);
|
|
while (GCLK->STATUS.bit.SYNCBUSY == 1);
|
|
|
|
// Set PORT
|
|
if (tcNum >= TCC_INST_NUM) {
|
|
// -- Configure TC
|
|
Tc* TCx = (Tc*) GetTC(pinDesc.ulPWMChannel);
|
|
// Disable TCx
|
|
TCx->COUNT8.CTRLA.bit.ENABLE = 0;
|
|
syncTC_8(TCx);
|
|
// Set Timer counter Mode to 8 bits, normal PWM, prescaler 1/256
|
|
TCx->COUNT8.CTRLA.reg |= TC_CTRLA_MODE_COUNT8 | TC_CTRLA_WAVEGEN_NPWM | TC_CTRLA_PRESCALER_DIV256;
|
|
syncTC_8(TCx);
|
|
// Set the initial value
|
|
TCx->COUNT8.CC[tcChannel].reg = (uint8_t) value;
|
|
syncTC_8(TCx);
|
|
// Set PER to maximum counter value (resolution : 0xFF)
|
|
TCx->COUNT8.PER.reg = 0xFF;
|
|
syncTC_8(TCx);
|
|
// Enable TCx
|
|
TCx->COUNT8.CTRLA.bit.ENABLE = 1;
|
|
syncTC_8(TCx);
|
|
} else {
|
|
// -- Configure TCC
|
|
Tcc* TCCx = (Tcc*) GetTC(pinDesc.ulPWMChannel);
|
|
// Disable TCCx
|
|
TCCx->CTRLA.bit.ENABLE = 0;
|
|
syncTCC(TCCx);
|
|
// Set prescaler to 1/256
|
|
TCCx->CTRLA.reg |= TCC_CTRLA_PRESCALER_DIV256;
|
|
syncTCC(TCCx);
|
|
// Set TCx as normal PWM
|
|
TCCx->WAVE.reg |= TCC_WAVE_WAVEGEN_NPWM;
|
|
syncTCC(TCCx);
|
|
// Set the initial value
|
|
TCCx->CC[tcChannel].reg = (uint32_t) value;
|
|
syncTCC(TCCx);
|
|
// Set PER to maximum counter value (resolution : 0xFF)
|
|
TCCx->PER.reg = 0xFF;
|
|
syncTCC(TCCx);
|
|
// Enable TCCx
|
|
TCCx->CTRLA.bit.ENABLE = 1;
|
|
syncTCC(TCCx);
|
|
}
|
|
} else {
|
|
if (tcNum >= TCC_INST_NUM) {
|
|
Tc* TCx = (Tc*) GetTC(pinDesc.ulPWMChannel);
|
|
TCx->COUNT8.CC[tcChannel].reg = (uint8_t) value;
|
|
syncTC_8(TCx);
|
|
} else {
|
|
Tcc* TCCx = (Tcc*) GetTC(pinDesc.ulPWMChannel);
|
|
TCCx->CTRLBSET.bit.LUPD = 1;
|
|
syncTCC(TCCx);
|
|
TCCx->CCB[tcChannel].reg = (uint32_t) value;
|
|
syncTCC(TCCx);
|
|
TCCx->CTRLBCLR.bit.LUPD = 1;
|
|
syncTCC(TCCx);
|
|
}
|
|
}
|
|
#endif
|
|
|
|
|
|
return;
|
|
}
|
|
|
|
// -- Defaults to digital write
|
|
pinMode(pin, OUTPUT);
|
|
value = mapResolution(value, _writeResolution, 8);
|
|
if (value < 128) {
|
|
digitalWrite(pin, LOW);
|
|
} else {
|
|
digitalWrite(pin, HIGH);
|
|
}
|
|
}
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|