Add fruit jam sound
This commit is contained in:
parent
5c7a6eb70a
commit
29ee6308fc
3 changed files with 276 additions and 176 deletions
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@ -433,6 +433,13 @@ add_executable(${TARGET}
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pico_generate_pio_header(${TARGET} ${CMAKE_CURRENT_LIST_DIR}/psram/psram_spi.pio)
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add_subdirectory(pico-extras/src/rp2_common/pico_audio_i2s)
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add_subdirectory(pico-extras/src/common/pico_audio)
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add_subdirectory(pico-extras/src/common/pico_util_buffer)
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add_compile_definitions(PICO_AUDIO_I2S_PIO=1 PICO_AUDIO_I2S_DMA_IRQ=1 PICO_AUDIO_I2S_DATA_PIN=24 PICO_AUDIO_I2S_CLOCK_PIN_BASE=25 PICO_AUDIO_I2S_MONO_INPUT=1 PICO_AUDIO_I2S_SWAP_CLOCK=1)
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add_compile_definitions(PICO_DEFAULT_UART=0 PICO_DEFAULT_UART_TX_PIN=44 PICO_DEFAULT_UART_RX_PIN=45)
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set(EXTRA_AUDIO_LIB pico_util_buffer pico_audio pico_audio_i2s hardware_i2c)
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target_link_libraries(${TARGET} pico_multicore
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pico_stdlib
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hardware_dma
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@ -443,6 +450,7 @@ target_link_libraries(${TARGET} pico_multicore
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tinyusb_host
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tinyusb_board
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tinyusb_pico_pio_usb
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${EXTRA_AUDIO_LIB}
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)
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target_compile_definitions(${TARGET} PRIVATE
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@ -451,7 +459,6 @@ target_compile_definitions(${TARGET} PRIVATE
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target_compile_definitions(${TARGET} PRIVATE PICO_CLOCK_AJDUST_PERI_CLOCK_WITH_SYS_CLOCK=1)
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#target_compile_definitions(${TARGET} PRIVATE CFG_TUSB_DEBUG=2)
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#target_compile_options(${TARGET} PUBLIC -O3)
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#target_compile_options(${TARGET} PUBLIC -Wall -Wextra -Wno-unused-function -Wno-unused-parameter)
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@ -1278,206 +1278,300 @@ void PICO_DSP::drawTextNoDma(int16_t x, int16_t y, const char * text, dsp_pixel
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#include "pico/float.h"
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#include <string.h>
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#include <stdio.h>
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#include "pico/audio_i2s.h"
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#include "hardware/i2c.h"
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#ifdef AUDIO_1DMA
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#define SAMPLE_REPEAT_SHIFT 0 // not possible to repeat samples with single DMA!!
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#endif
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#ifdef AUDIO_3DMA
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#define SAMPLE_REPEAT_SHIFT 2 // shift 2 is REPETITION_RATE=4
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#endif
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#ifndef SAMPLE_REPEAT_SHIFT
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#define SAMPLE_REPEAT_SHIFT 0 // not possible to repeat samples CBACK!!
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#endif
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#define REPETITION_RATE (1<<SAMPLE_REPEAT_SHIFT)
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static void (*fillsamples)(audio_sample * stream, int len) = nullptr;
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static audio_sample * snd_buffer; // samples buffer (1 malloc for 2 buffers)
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static uint16_t snd_nb_samples; // total nb samples (mono) later divided by 2
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static uint16_t snd_sample_ptr = 0; // sample index
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static audio_sample * audio_buffers[2]; // pointers to 2 samples buffers
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static volatile int cur_audio_buffer;
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static volatile int last_audio_buffer;
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#ifdef AUDIO_3DMA
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static uint32_t single_sample = 0;
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static uint32_t *single_sample_ptr = &single_sample;
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static int pwm_dma_chan, trigger_dma_chan, sample_dma_chan;
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#endif
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#ifdef AUDIO_1DMA
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static int pwm_dma_chan;
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#endif
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/********************************
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* Processing
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********************************/
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#ifdef AUDIO_1DMA
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static void __isr __time_critical_func(AUDIO_isr)()
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{
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cur_audio_buffer = 1 - cur_audio_buffer;
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dma_hw->ch[pwm_dma_chan].al3_read_addr_trig = (intptr_t)audio_buffers[cur_audio_buffer];
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dma_hw->ints1 = (1u << pwm_dma_chan);
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}
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#endif
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#ifdef AUDIO_3DMA
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static void __isr __time_critical_func(AUDIO_isr)()
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{
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cur_audio_buffer = 1 - cur_audio_buffer;
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dma_hw->ch[sample_dma_chan].al1_read_addr = (intptr_t)audio_buffers[cur_audio_buffer];
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dma_hw->ch[trigger_dma_chan].al3_read_addr_trig = (intptr_t)&single_sample_ptr;
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dma_hw->ints1 = (1u << trigger_dma_chan);
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}
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#endif
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// fill half buffer depending on current position
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static void pwm_audio_handle_buffer(void)
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{
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if (last_audio_buffer == cur_audio_buffer) {
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return;
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}
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audio_sample *buf = audio_buffers[last_audio_buffer];
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last_audio_buffer = cur_audio_buffer;
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fillsamples(buf, snd_nb_samples);
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}
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static void pwm_audio_reset(void)
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{
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memset((void*)snd_buffer,0, snd_nb_samples*sizeof(uint8_t));
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}
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/********************************
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* Initialization
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********************************/
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static void pwm_audio_init(int buffersize, void (*callback)(audio_sample * stream, int len))
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{
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fillsamples = callback;
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snd_nb_samples = buffersize;
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snd_sample_ptr = 0;
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snd_buffer = (audio_sample*)malloc(snd_nb_samples*sizeof(audio_sample));
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if (snd_buffer == NULL) {
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printf("sound buffer could not be allocated!!!!!\n");
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return;
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struct audio_buffer_pool *producer_pool;
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#if AUDIO_8BIT
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_Static_assert(!AUDIO_8BIT, "only configured for 16 bit audio");
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#endif
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static audio_format_t audio_format = {
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.sample_freq = SOUNDRATE,
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.format = AUDIO_BUFFER_FORMAT_PCM_S16,
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.channel_count = 1,
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};
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const struct audio_i2s_config config =
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{
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.data_pin = PICO_AUDIO_I2S_DATA_PIN,
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.clock_pin_base = PICO_AUDIO_I2S_CLOCK_PIN_BASE,
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.dma_channel = AUD_DMA_CHANNEL,
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.pio_sm = 0,
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.clock_pins_swapped = true,
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};
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static struct audio_buffer_format producer_format = {
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.format = &audio_format,
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.sample_stride = 2
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};
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#define I2C_ADDR 0x18
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static void writeRegister(uint8_t reg, uint8_t value) {
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uint8_t buf[2];
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buf[0] = reg;
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buf[1] = value;
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int res = i2c_write_timeout_us(i2c0, I2C_ADDR, buf, sizeof(buf), /* nostop */ false, 1000);
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if (res != 2) {
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printf("res=%d\n", res);
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panic("i2c_write_timeout failed: res=%d\n", res);
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}
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memset((void*)snd_buffer,128, snd_nb_samples*sizeof(audio_sample));
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printf("Write Reg: %d = 0x%x\n", reg, value);
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}
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gpio_set_function(AUDIO_PIN, GPIO_FUNC_PWM);
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static uint8_t readRegister(uint8_t reg) {
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uint8_t buf[1];
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buf[0] = reg;
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int res = i2c_write_timeout_us(i2c0, I2C_ADDR, buf, sizeof(buf), /* nostop */ true, 1000);
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if (res != 1) {
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printf("res=%d\n", res);
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panic("i2c_write_timeout failed: res=%d\n", res);
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}
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res = i2c_read_timeout_us(i2c0, I2C_ADDR, buf, sizeof(buf), /* nostop */ false, 1000);
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if (res != 1) {
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printf("res=%d\n", res);
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panic("i2c_read_timeout failed: res=%d\n", res);
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}
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uint8_t value = buf[0];
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printf("Read Reg: %d = 0x%x\n", reg, value);
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return value;
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}
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int audio_pin_slice = pwm_gpio_to_slice_num(AUDIO_PIN);
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pwm_set_gpio_level(AUDIO_PIN, 0);
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static void modifyRegister(uint8_t reg, uint8_t mask, uint8_t value) {
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uint8_t current = readRegister(reg);
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printf("Modify Reg: %d = [Before: 0x%x] with mask 0x%x and value 0x%x\n", reg, current, mask, value);
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uint8_t new_value = (current & ~mask) | (value & mask);
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writeRegister(reg, new_value);
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}
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// Setup PWM for audio output
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pwm_config config = pwm_get_default_config();
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pwm_config_set_clkdiv(&config, (((float)SOUNDRATE)/1000) / REPETITION_RATE);
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pwm_config_set_wrap(&config, 254);
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pwm_init(audio_pin_slice, &config, true);
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snd_nb_samples = snd_nb_samples/2;
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audio_buffers[0] = &snd_buffer[0];
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audio_buffers[1] = &snd_buffer[snd_nb_samples];
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#ifdef AUDIO_3DMA
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int audio_pin_chan = pwm_gpio_to_channel(AUDIO_PIN);
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// DMA chain of 3 DMA channels
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sample_dma_chan = AUD_DMA_CHANNEL;
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pwm_dma_chan = AUD_DMA_CHANNEL+1;
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trigger_dma_chan = AUD_DMA_CHANNEL+2;
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// setup PWM DMA channel
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dma_channel_config pwm_dma_chan_config = dma_channel_get_default_config(pwm_dma_chan);
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channel_config_set_transfer_data_size(&pwm_dma_chan_config, DMA_SIZE_32); // transfer 32 bits at a time
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channel_config_set_read_increment(&pwm_dma_chan_config, false); // always read from the same address
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channel_config_set_write_increment(&pwm_dma_chan_config, false); // always write to the same address
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channel_config_set_chain_to(&pwm_dma_chan_config, sample_dma_chan); // trigger sample DMA channel when done
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channel_config_set_dreq(&pwm_dma_chan_config, DREQ_PWM_WRAP0 + audio_pin_slice); // transfer on PWM cycle end
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dma_channel_configure(pwm_dma_chan,
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&pwm_dma_chan_config,
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&pwm_hw->slice[audio_pin_slice].cc, // write to PWM slice CC register
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&single_sample, // read from single_sample
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REPETITION_RATE, // transfer once per desired sample repetition
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false // don't start yet
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);
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static void setPage(uint8_t page) {
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printf("Set page %d\n", page);
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writeRegister(0x00, page);
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}
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// setup trigger DMA channel
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dma_channel_config trigger_dma_chan_config = dma_channel_get_default_config(trigger_dma_chan);
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channel_config_set_transfer_data_size(&trigger_dma_chan_config, DMA_SIZE_32); // transfer 32-bits at a time
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channel_config_set_read_increment(&trigger_dma_chan_config, false); // always read from the same address
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channel_config_set_write_increment(&trigger_dma_chan_config, false); // always write to the same address
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channel_config_set_dreq(&trigger_dma_chan_config, DREQ_PWM_WRAP0 + audio_pin_slice); // transfer on PWM cycle end
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dma_channel_configure(trigger_dma_chan,
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&trigger_dma_chan_config,
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&dma_hw->ch[pwm_dma_chan].al3_read_addr_trig, // write to PWM DMA channel read address trigger
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&single_sample_ptr, // read from location containing the address of single_sample
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REPETITION_RATE * snd_nb_samples, // trigger once per audio sample per repetition rate
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false // don't start yet
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);
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dma_channel_set_irq1_enabled(trigger_dma_chan, true); // fire interrupt when trigger DMA channel is done
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irq_set_exclusive_handler(DMA_IRQ_1, AUDIO_isr);
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irq_set_priority (DMA_IRQ_1, PICO_DEFAULT_IRQ_PRIORITY-8);
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irq_set_enabled(DMA_IRQ_1, true);
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static void Wire_begin() {
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i2c_init(i2c0, 100000);
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gpio_set_function(20, GPIO_FUNC_I2C);
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gpio_set_function(21, GPIO_FUNC_I2C);
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}
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// setup sample DMA channel
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dma_channel_config sample_dma_chan_config = dma_channel_get_default_config(sample_dma_chan);
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channel_config_set_transfer_data_size(&sample_dma_chan_config, DMA_SIZE_8); // transfer 8-bits at a time
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channel_config_set_read_increment(&sample_dma_chan_config, true); // increment read address to go through audio buffer
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channel_config_set_write_increment(&sample_dma_chan_config, false); // always write to the same address
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dma_channel_configure(sample_dma_chan,
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&sample_dma_chan_config,
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(char*)&single_sample + 2*audio_pin_chan, // write to single_sample
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snd_buffer, // read from audio buffer
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1, // only do one transfer (once per PWM DMA completion due to chaining)
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false // don't start yet
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);
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static void i2s_audio_init(int buffersize, void (*callback)(audio_sample * stream, int len))
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{
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// Kick things off with the trigger DMA channel
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dma_channel_start(trigger_dma_chan);
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#endif
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#ifdef AUDIO_1DMA
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// Each sample played from a single DMA channel
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// Setup DMA channel to drive the PWM
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pwm_dma_chan = AUD_DMA_CHANNEL;
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dma_channel_config pwm_dma_chan_config = dma_channel_get_default_config(pwm_dma_chan);
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// Transfer 16 bits at once, increment read address to go through sample
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// buffer, always write to the same address (PWM slice CC register).
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channel_config_set_transfer_data_size(&pwm_dma_chan_config, DMA_SIZE_16);
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channel_config_set_read_increment(&pwm_dma_chan_config, true);
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channel_config_set_write_increment(&pwm_dma_chan_config, false);
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// Transfer on PWM cycle end
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channel_config_set_dreq(&pwm_dma_chan_config, DREQ_PWM_WRAP0 + audio_pin_slice);
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gpio_init(22);
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gpio_set_dir(22, true);
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gpio_put(22, true); // allow i2s to come out of reset
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// Setup the channel and set it going
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dma_channel_configure(
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pwm_dma_chan,
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&pwm_dma_chan_config,
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&pwm_hw->slice[audio_pin_slice].cc, // Write to PWM counter compare
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snd_buffer, // Read values from audio buffer
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snd_nb_samples,
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false // Start immediately if true.
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);
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Wire_begin();
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sleep_ms(1000);
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printf("initialize codec\n");
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// Setup interrupt handler to fire when PWM DMA channel has gone through the
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// whole audio buffer
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dma_channel_set_irq1_enabled(pwm_dma_chan, true);
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irq_set_exclusive_handler(DMA_IRQ_1, AUDIO_isr);
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//irq_set_priority (DMA_IRQ_1, PICO_DEFAULT_IRQ_PRIORITY-8);
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irq_set_enabled(DMA_IRQ_1, true);
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dma_channel_start(pwm_dma_chan);
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#endif
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// Reset codec
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writeRegister(0x01, 0x01);
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sleep_ms(10);
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// Interface Control
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modifyRegister(0x1B, 0xC0, 0x00);
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modifyRegister(0x1B, 0x30, 0x00);
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// Clock MUX and PLL settings
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modifyRegister(0x04, 0x03, 0x03);
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modifyRegister(0x04, 0x0C, 0x04);
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writeRegister(0x06, 0x20); // PLL J
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writeRegister(0x08, 0x00); // PLL D LSB
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writeRegister(0x07, 0x00); // PLL D MSB
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modifyRegister(0x05, 0x0F, 0x02); // PLL P/R
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modifyRegister(0x05, 0x70, 0x10);
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// DAC/ADC Config
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modifyRegister(0x0B, 0x7F, 0x08); // NDAC
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modifyRegister(0x0B, 0x80, 0x80);
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modifyRegister(0x0C, 0x7F, 0x02); // MDAC
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modifyRegister(0x0C, 0x80, 0x80);
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modifyRegister(0x12, 0x7F, 0x08); // NADC
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modifyRegister(0x12, 0x80, 0x80);
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modifyRegister(0x13, 0x7F, 0x02); // MADC
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modifyRegister(0x13, 0x80, 0x80);
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// PLL Power Up
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modifyRegister(0x05, 0x80, 0x80);
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// Headset and GPIO Config
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setPage(1);
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modifyRegister(0x2e, 0xFF, 0x0b);
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setPage(0);
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modifyRegister(0x43, 0x80, 0x80); // Headset Detect
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modifyRegister(0x30, 0x80, 0x80); // INT1 Control
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modifyRegister(0x33, 0x3C, 0x14); // GPIO1
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// DAC Setup
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modifyRegister(0x3F, 0xC0, 0xC0);
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// DAC Routing
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setPage(1);
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modifyRegister(0x23, 0xC0, 0x40);
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modifyRegister(0x23, 0x0C, 0x04);
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// DAC Volume Control
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setPage(0);
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modifyRegister(0x40, 0x0C, 0x00);
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writeRegister(0x41, 0x28); // Left DAC Vol
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writeRegister(0x42, 0x28); // Right DAC Vol
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// ADC Setup
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modifyRegister(0x51, 0x80, 0x80);
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modifyRegister(0x52, 0x80, 0x00);
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writeRegister(0x53, 0x68); // ADC Volume
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// Headphone and Speaker Setup
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setPage(1);
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modifyRegister(0x1F, 0xC0, 0xC0); // HP Driver
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modifyRegister(0x28, 0x04, 0x04); // HP Left Gain
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modifyRegister(0x29, 0x04, 0x04); // HP Right Gain
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writeRegister(0x24, 0x0A); // Left Analog HP
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writeRegister(0x25, 0x0A); // Right Analog HP
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modifyRegister(0x28, 0x78, 0x40); // HP Left Gain
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modifyRegister(0x29, 0x78, 0x40); // HP Right Gain
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// Speaker Amp
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modifyRegister(0x20, 0x80, 0x80);
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modifyRegister(0x2A, 0x04, 0x04);
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modifyRegister(0x2A, 0x18, 0x08);
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writeRegister(0x26, 0x0A);
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// Return to page 0
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setPage(0);
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printf("Initialization complete!\n");
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// Read all registers for verification
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printf("Reading all registers for verification:\n");
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setPage(0);
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readRegister(0x00); // AIC31XX_PAGECTL
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readRegister(0x01); // AIC31XX_RESET
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readRegister(0x03); // AIC31XX_OT_FLAG
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||||
readRegister(0x04); // AIC31XX_CLKMUX
|
||||
readRegister(0x05); // AIC31XX_PLLPR
|
||||
readRegister(0x06); // AIC31XX_PLLJ
|
||||
readRegister(0x07); // AIC31XX_PLLDMSB
|
||||
readRegister(0x08); // AIC31XX_PLLDLSB
|
||||
readRegister(0x0B); // AIC31XX_NDAC
|
||||
readRegister(0x0C); // AIC31XX_MDAC
|
||||
readRegister(0x0D); // AIC31XX_DOSRMSB
|
||||
readRegister(0x0E); // AIC31XX_DOSRLSB
|
||||
readRegister(0x10); // AIC31XX_MINI_DSP_INPOL
|
||||
readRegister(0x12); // AIC31XX_NADC
|
||||
readRegister(0x13); // AIC31XX_MADC
|
||||
readRegister(0x14); // AIC31XX_AOSR
|
||||
readRegister(0x19); // AIC31XX_CLKOUTMUX
|
||||
readRegister(0x1A); // AIC31XX_CLKOUTMVAL
|
||||
readRegister(0x1B); // AIC31XX_IFACE1
|
||||
readRegister(0x1C); // AIC31XX_DATA_OFFSET
|
||||
readRegister(0x1D); // AIC31XX_IFACE2
|
||||
readRegister(0x1E); // AIC31XX_BCLKN
|
||||
readRegister(0x1F); // AIC31XX_IFACESEC1
|
||||
readRegister(0x20); // AIC31XX_IFACESEC2
|
||||
readRegister(0x21); // AIC31XX_IFACESEC3
|
||||
readRegister(0x22); // AIC31XX_I2C
|
||||
readRegister(0x24); // AIC31XX_ADCFLAG
|
||||
readRegister(0x25); // AIC31XX_DACFLAG1
|
||||
readRegister(0x26); // AIC31XX_DACFLAG2
|
||||
readRegister(0x27); // AIC31XX_OFFLAG
|
||||
readRegister(0x2C); // AIC31XX_INTRDACFLAG
|
||||
readRegister(0x2D); // AIC31XX_INTRADCFLAG
|
||||
readRegister(0x2E); // AIC31XX_INTRDACFLAG2
|
||||
readRegister(0x2F); // AIC31XX_INTRADCFLAG2
|
||||
readRegister(0x30); // AIC31XX_INT1CTRL
|
||||
readRegister(0x31); // AIC31XX_INT2CTRL
|
||||
readRegister(0x33); // AIC31XX_GPIO1
|
||||
readRegister(0x3C); // AIC31XX_DACPRB
|
||||
readRegister(0x3D); // AIC31XX_ADCPRB
|
||||
readRegister(0x3F); // AIC31XX_DACSETUP
|
||||
readRegister(0x40); // AIC31XX_DACMUTE
|
||||
readRegister(0x41); // AIC31XX_LDACVOL
|
||||
readRegister(0x42); // AIC31XX_RDACVOL
|
||||
readRegister(0x43); // AIC31XX_HSDETECT
|
||||
readRegister(0x51); // AIC31XX_ADCSETUP
|
||||
readRegister(0x52); // AIC31XX_ADCFGA
|
||||
readRegister(0x53); // AIC31XX_ADCVOL
|
||||
|
||||
setPage(1);
|
||||
readRegister(0x1F); // AIC31XX_HPDRIVER
|
||||
readRegister(0x20); // AIC31XX_SPKAMP
|
||||
readRegister(0x21); // AIC31XX_HPPOP
|
||||
readRegister(0x22); // AIC31XX_SPPGARAMP
|
||||
readRegister(0x23); // AIC31XX_DACMIXERROUTE
|
||||
readRegister(0x24); // AIC31XX_LANALOGHPL
|
||||
readRegister(0x25); // AIC31XX_RANALOGHPR
|
||||
readRegister(0x26); // AIC31XX_LANALOGSPL
|
||||
readRegister(0x27); // AIC31XX_RANALOGSPR
|
||||
readRegister(0x28); // AIC31XX_HPLGAIN
|
||||
readRegister(0x29); // AIC31XX_HPRGAIN
|
||||
readRegister(0x2A); // AIC31XX_SPLGAIN
|
||||
readRegister(0x2B); // AIC31XX_SPRGAIN
|
||||
readRegister(0x2C); // AIC31XX_HPCONTROL
|
||||
readRegister(0x2E); // AIC31XX_MICBIAS
|
||||
readRegister(0x2F); // AIC31XX_MICPGA
|
||||
readRegister(0x30); // AIC31XX_MICPGAPI
|
||||
readRegister(0x31); // AIC31XX_MICPGAMI
|
||||
readRegister(0x32); // AIC31XX_MICPGACM
|
||||
|
||||
setPage(3);
|
||||
readRegister(0x10); // AIC31XX_TIMERDIVIDER
|
||||
|
||||
const struct audio_format *output_format = audio_i2s_setup(&audio_format, &config);
|
||||
assert(output_format);
|
||||
if (!output_format) {
|
||||
panic("PicoAudio: Unable to open audio device.\n");
|
||||
}
|
||||
producer_pool = audio_new_producer_pool(&producer_format, 3, buffersize);
|
||||
assert(producer_pool);
|
||||
bool ok = audio_i2s_connect(producer_pool);
|
||||
assert(ok);
|
||||
audio_i2s_set_enabled(true);
|
||||
}
|
||||
|
||||
static void i2s_audio_handle_buffer(void) {
|
||||
audio_buffer *buffer = take_audio_buffer(producer_pool, true);
|
||||
printf("buffer@%p\n", buffer);
|
||||
fillsamples(reinterpret_cast<audio_sample*>(buffer->buffer->bytes), buffer->max_sample_count);
|
||||
buffer->sample_count = buffer->max_sample_count;
|
||||
give_audio_buffer(producer_pool, buffer);
|
||||
}
|
||||
|
||||
static void core1_func_tft() {
|
||||
while (true) {
|
||||
if (fillsamples != NULL) pwm_audio_handle_buffer();
|
||||
if (producer_pool && fillsamples) i2s_audio_handle_buffer();
|
||||
__dmb();
|
||||
}
|
||||
}
|
||||
|
||||
void PICO_DSP::begin_audio(int samplesize, void (*callback)(short * stream, int len))
|
||||
{
|
||||
if (!callback) return;
|
||||
|
||||
i2s_audio_init(samplesize, callback);
|
||||
fillsamples = callback;
|
||||
multicore_launch_core1(core1_func_tft);
|
||||
pwm_audio_init(samplesize, callback);
|
||||
}
|
||||
|
||||
void PICO_DSP::end_audio()
|
||||
|
|
@ -1486,8 +1580,7 @@ void PICO_DSP::end_audio()
|
|||
|
||||
void * PICO_DSP::get_buffer_audio(void)
|
||||
{
|
||||
void *buf = audio_buffers[cur_audio_buffer==0?1:0];
|
||||
return buf;
|
||||
return NULL; // not implemented
|
||||
}
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -175,7 +175,7 @@ void emu_sndInit() {
|
|||
|
||||
void * emu_sndGetBuffer(void)
|
||||
{
|
||||
return tft.get_buffer_audio();
|
||||
panic("not implemented");
|
||||
}
|
||||
|
||||
void emu_sndPlaySound(int chan, int volume, int freq)
|
||||
|
|
|
|||
Loading…
Reference in a new issue