stm32/boards: Enable ROMFS partitions on PYBD_SFx boards.

Using unused and previously inaccessible external QSPI flash.

Signed-off-by: Damien George <damien@micropython.org>
This commit is contained in:
Damien George 2025-02-21 00:45:13 +11:00
parent bea7645b2e
commit 45c36f87ea
4 changed files with 21 additions and 2 deletions

View file

@ -20,7 +20,8 @@ MEMORY
{
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K
FLASH_APP (rx) : ORIGIN = 0x08008000, LENGTH = 480K /* sectors 2-7 */
FLASH_EXT (rx) : ORIGIN = 0x90000000, LENGTH = 2048K /* external QSPI */
FLASH_EXT (rx) : ORIGIN = 0x90000000, LENGTH = 1024K /* external QSPI */
FLASH_ROMFS (rx): ORIGIN = 0x90100000, LENGTH = 1024K /* external QSPI */
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 256K /* DTCM+SRAM1+SRAM2 */
}
@ -39,6 +40,10 @@ _ram_end = ORIGIN(RAM) + LENGTH(RAM);
_heap_start = _ebss; /* heap starts just after statically allocated memory */
_heap_end = _sstack;
/* ROMFS location */
_micropy_hw_romfs_part1_start = ORIGIN(FLASH_ROMFS);
_micropy_hw_romfs_part1_size = LENGTH(FLASH_ROMFS);
/* Define output sections */
SECTIONS
{

View file

@ -64,6 +64,11 @@ void board_sleep(int value);
#define MICROPY_HW_RTC_USE_US (1)
#define MICROPY_HW_RTC_USE_CALOUT (1)
// ROMFS config
#define MICROPY_HW_ROMFS_ENABLE_EXTERNAL_QSPI (1)
#define MICROPY_HW_ROMFS_QSPI_SPIFLASH_OBJ (&spi_bdev2.spiflash)
#define MICROPY_HW_ROMFS_ENABLE_PART1 (1)
// SPI flash #1, for R/W storage
#define MICROPY_HW_SOFTQSPI_SCK_LOW(self) (GPIOE->BSRR = (0x10000 << 11))
#define MICROPY_HW_SOFTQSPI_SCK_HIGH(self) (GPIOE->BSRR = (1 << 11))

View file

@ -18,7 +18,7 @@ MEMORY
{
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K
FLASH_APP (rx) : ORIGIN = 0x08008000, LENGTH = 2016K /* sectors 1-11 3x32K 1*128K 7*256K */
FLASH_EXT (rx) : ORIGIN = 0x90000000, LENGTH = 2048K /* external QSPI */
FLASH_ROMFS (rx): ORIGIN = 0x90000000, LENGTH = 2048K /* external QSPI */
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 512K /* DTCM=128k, SRAM1=368K, SRAM2=16K */
}
@ -37,4 +37,8 @@ _ram_end = ORIGIN(RAM) + LENGTH(RAM);
_heap_start = _ebss; /* heap starts just after statically allocated memory */
_heap_end = _sstack;
/* ROMFS location */
_micropy_hw_romfs_part1_start = ORIGIN(FLASH_ROMFS);
_micropy_hw_romfs_part1_size = LENGTH(FLASH_ROMFS);
INCLUDE common_bl.ld

View file

@ -45,6 +45,11 @@
#define MICROPY_HW_CLK_PLLQ (6)
#define MICROPY_HW_FLASH_LATENCY (FLASH_LATENCY_4)
// ROMFS config
#define MICROPY_HW_ROMFS_ENABLE_EXTERNAL_QSPI (1)
#define MICROPY_HW_ROMFS_QSPI_SPIFLASH_OBJ (&spi_bdev2.spiflash)
#define MICROPY_HW_ROMFS_ENABLE_PART1 (1)
// Extra UART config
#define MICROPY_HW_UART7_TX (pyb_pin_W16)
#define MICROPY_HW_UART7_RX (pyb_pin_W22B)