reduce SPI display baudrate from 60 MHz to 5 MHz to reduce display glitch

This commit is contained in:
Kevin Matocha 2021-05-20 21:23:59 -05:00
parent 3bcbf2bdbb
commit b14d573655

View file

@ -71,7 +71,7 @@ void board_init(void) {
&pin_GPIO39, // TFT_DC Command or data
&pin_GPIO40, // TFT_CS Chip select
&pin_GPIO41, // TFT_RESET Reset
60000000, // Baudrate
5000000, // Baudrate
0, // Polarity
0); // Phase