526 lines
16 KiB
C
526 lines
16 KiB
C
//
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// Copyright (C) 2013-2014 Michael Geszkiewicz
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//
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// This program is free software; you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation; either version 2 of the License, or
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// (at your option) any later version.
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//
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with this program; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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//
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#ifdef __linux__
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#include <linux/parport.h>
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#include <sys/ioctl.h>
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#include <sys/io.h>
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#endif
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#include <stdio.h>
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#include <stddef.h>
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#include <string.h>
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#include <errno.h>
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#include <fcntl.h>
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#include <unistd.h>
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#include <stdlib.h>
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#include <sys/stat.h>
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#include "types.h"
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#include "common.h"
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#include "eeprom.h"
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#include "eeprom_local.h"
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#include "bitfile.h"
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#include "epp_boards.h"
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extern board_t boards[MAX_BOARDS];
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extern int boards_count;
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extern u8 boot_block[BOOT_BLOCK_SIZE];
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static u8 file_buffer[SECTOR_SIZE];
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static inline u8 epp_read_status(board_t *board) {
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u8 data = inb(board->base_lo + EPP_STATUS_OFFSET);
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// printf("read status 0x%02X\n", data);
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return data;
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}
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static inline void epp_write_status(board_t *board, u8 status_byte) {
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outb(status_byte, board->base_lo + EPP_STATUS_OFFSET);
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// printf("wrote status 0x%02X\n", status_byte);
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}
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static inline void epp_write_control(board_t *board, u8 control_byte) {
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outb(control_byte, board->base_lo + EPP_CONTROL_OFFSET);
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// printf("wrote control 0x%02X\n", control_byte);
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}
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static inline int epp_check_for_timeout(board_t *board) {
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return epp_read_status(board) & 0x01;
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}
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static int epp_clear_timeout(board_t *board) {
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u8 status;
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if (!epp_check_for_timeout(board)) {
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return 1;
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}
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/* To clear timeout some chips require double read */
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epp_read_status(board);
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// read in the actual status register
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status = epp_read_status(board);
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epp_write_status(board, status | 0x01); // Some reset by writing 1
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epp_write_status(board, status & 0xFE); // Others by writing 0
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if (epp_check_for_timeout(board)) {
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printf("failed to clear EPP Timeout!\n");
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return 0; // fail
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}
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return 1; // success
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}
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inline void epp_addr8(board_t *board, u8 addr) {
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outb(addr, board->base_lo + EPP_ADDRESS_OFFSET);
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// printf("selected address 0x%02X\n", addr);
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}
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static inline void epp_addr16(board_t *board, u16 addr) {
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outb((addr & 0x00FF), board->base_lo + EPP_ADDRESS_OFFSET);
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outb((addr >> 8), board->base_lo + EPP_ADDRESS_OFFSET);
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// printf("selected address 0x%04X\n", addr);
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}
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inline u8 epp_read8(board_t *board) {
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u8 data = inb(board->base_lo + EPP_DATA_OFFSET);
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// printf("read data 0x%02X\n", data);
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return data;
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}
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static inline u32 epp_read32(board_t *board) {
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u32 data;
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if (board->epp_wide) {
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data = inl(board->base_lo + EPP_DATA_OFFSET);
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// printf("read data 0x%08X\n", data);
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} else {
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u8 a, b, c, d;
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a = epp_read8(board);
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b = epp_read8(board);
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c = epp_read8(board);
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d = epp_read8(board);
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data = a + (b << 8) + (c << 16) + (d << 24);
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}
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return data;
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}
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inline void epp_write8(board_t *board, u8 data) {
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outb(data, board->base_lo + EPP_DATA_OFFSET);
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//printf("wrote data 0x%02X\n", data);
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}
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static inline void epp_write32(board_t *board, u32 data) {
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if (board->epp_wide) {
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outl(data, board->base_lo + EPP_DATA_OFFSET);
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// printf("wrote data 0x%08X\n", data);
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} else {
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epp_write8(board, (data) & 0xFF);
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epp_write8(board, (data >> 8) & 0xFF);
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epp_write8(board, (data >> 16) & 0xFF);
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epp_write8(board, (data >> 24) & 0xFF);
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}
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}
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static int epp_read(llio_t *self, u32 addr, void *buffer, int size) {
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int bytes_remaining = size;
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board_t *board = self->board;
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epp_addr16(board, addr | EPP_ADDR_AUTOINCREMENT);
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for (; bytes_remaining > 3; bytes_remaining -= 4) {
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*((u32*)buffer) = epp_read32(board);
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buffer += 4;
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}
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for ( ; bytes_remaining > 0; bytes_remaining --) {
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*((u8*)buffer) = epp_read8(board);
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buffer ++;
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}
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if (epp_check_for_timeout(board)) {
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printf("EPP timeout on data cycle of read(addr=0x%04x, size=%d)\n", addr, size);
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// self->needs_reset = 1;
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epp_clear_timeout(board);
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return 0; // fail
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}
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return 1; // success
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}
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static int epp_write(llio_t *self, u32 addr, void *buffer, int size) {
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int bytes_remaining = size;
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board_t *board = self->board;
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epp_addr16(board, addr | EPP_ADDR_AUTOINCREMENT);
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for (; bytes_remaining > 3; bytes_remaining -= 4) {
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epp_write32(board, *((u32*)buffer));
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buffer += 4;
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}
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for ( ; bytes_remaining > 0; bytes_remaining --) {
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epp_write8(board, *((u8*)buffer));
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buffer ++;
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}
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if (epp_check_for_timeout(board)) {
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printf("EPP timeout on data cycle of write(addr=0x%04x, size=%d)\n", addr, size);
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// self->needs_reset = 1;
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epp_clear_timeout(board);
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return 0;
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}
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return 1;
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}
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static int epp_program_fpga(llio_t *self, char *bitfile_name) {
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board_t *board = self->board;
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int bindex, bytesread;
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char part_name[32];
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char board_name[32];
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struct stat file_stat;
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FILE *fp;
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if (stat(bitfile_name, &file_stat) != 0) {
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printf("Can't find file %s\n", bitfile_name);
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return -1;
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}
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fp = fopen(bitfile_name, "rb");
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if (fp == NULL) {
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printf("Can't open file %s: %s\n", bitfile_name, strerror(errno));
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return -1;
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}
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if (print_bitfile_header(fp, (char*) &part_name, (char*) &board_name, board->llio.verbose) == -1) {
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fclose(fp);
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return -1;
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}
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if (!check_board_name(self->board_name, board_name, bitfile_name)) {
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fclose(fp);
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return -1;
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}
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//
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// send the firmware
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//
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// select the CPLD's data address
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epp_addr8(board, 0);
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printf("Programming FPGA...\n");
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printf(" |");
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fflush(stdout);
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// program the FPGA
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while (!feof(fp)) {
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bytesread = fread(&file_buffer, 1, 8192, fp);
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bindex = 0;
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while (bindex < bytesread) {
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epp_write8(board, bitfile_reverse_bits(file_buffer[bindex]));
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bindex++;
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}
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printf("W");
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fflush(stdout);
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}
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printf("\n");
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fclose(fp);
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// see if it worked
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if (epp_check_for_timeout(board)) {
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printf("EPP Timeout while sending firmware!\n");
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return -EIO;
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}
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printf("Board FPGA programmed successfully.\n");
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return 0;
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}
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// return 0 if the board has been reset, -errno if not
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static int epp_reset(llio_t *self) {
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board_t *board = self->board;
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u8 byte;
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//
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// this resets the FPGA *only* if it's currently configured with the
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// HostMot2 or GPIO firmware
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//
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epp_addr16(board, 0x7F7F);
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epp_write8(board, 0x5A);
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epp_addr16(board, 0x7F7F);
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epp_write8(board, 0x5A);
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//
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// this code resets the FPGA *only* if the CPLD is in charge of the
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// parallel port
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//
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// select the control register
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epp_addr8(board, 1);
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// bring the Spartan3's PROG_B line low for 1 us (the specs require 300-500 ns or longer)
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epp_write8(board, 0x00);
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sleep_ns(1000);
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// bring the Spartan3's PROG_B line high and wait for 2 ms before sending firmware (required by spec)
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epp_write8(board, 0x01);
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sleep_ns(2 * 1000 * 1000);
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// make sure the FPGA is not asserting its /DONE bit
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byte = epp_read8(board);
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if ((byte & 0x01) != 0) {
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printf("/DONE is not low after CPLD reset!\n");
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return -EIO;
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}
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return 0;
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}
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////////////////////////////////////////////////////////////////////////
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int epp_boards_init(board_access_t *access) {
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#ifdef __linux__
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if (seteuid(0) != 0) {
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printf("You need root privileges (or setuid root) to access EPP hardware\n");
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return -1;
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}
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iopl(3);
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#endif
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return 0;
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}
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void epp_boards_cleanup(board_access_t *access) {
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}
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static int epp_board_open(board_t *board) {
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if (board->mode == BOARD_MODE_CPLD) {
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u8 byte;
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epp_addr8(board, 0);
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byte = epp_read8(board);
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if (byte & 0x01) {
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board->llio.fpga_part_number = "3s400tq144";
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} else {
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board->llio.fpga_part_number = "3s200tq144";
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}
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}
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if (board->flash != BOARD_FLASH_NONE) {
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eeprom_init(&(board->llio));
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board->flash_id = read_flash_id(&(board->llio));
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if (board->fallback_support == 1) {
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eeprom_prepare_boot_block(board->flash_id);
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board->flash_start_address = eeprom_calc_user_space(board->flash_id);
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} else {
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board->flash_start_address = 0;
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}
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}
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return 0;
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}
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static int epp_board_close(board_t *board) {
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if (board->flash != BOARD_FLASH_NONE) {
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eeprom_cleanup(&(board->llio));
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}
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return 0;
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}
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void epp_boards_scan(board_access_t *access) {
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#ifdef __linux__
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board_t *board = &boards[boards_count];
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u16 epp_addr = 0, epp_hi_addr = 0;
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u32 hm2_cookie, eppio_cookie;
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board_init_struct(board);
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if (access->address == 0) {
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access->dev_addr = "0x378";
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access->dev_hi_addr = "0x778";
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epp_addr = 0x378;
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epp_hi_addr = 0x778;
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} else {
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if (strncmp(access->dev_addr, "0x", 2) == 0) {
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access->dev_addr[0] = '0';
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access->dev_addr[1] = '0';
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epp_addr = strtol(access->dev_addr, NULL, 16);
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} else {
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epp_addr = strtol(access->dev_addr, NULL, 10);
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}
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if (epp_addr == 0) {
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return;
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}
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// Parse the base_hi address.
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if (access->dev_hi_addr != NULL) {
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if (strncmp(access->dev_hi_addr, "0x", 2) == 0) {
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access->dev_hi_addr[0] = '0';
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access->dev_hi_addr[1] = '0';
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epp_hi_addr = strtol(access->dev_hi_addr, NULL, 16);
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} else {
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epp_hi_addr = strtol(access->dev_hi_addr, NULL, 10);
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}
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}
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}
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if (epp_hi_addr == 0) {
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epp_hi_addr = epp_addr + 0x400;
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}
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board->base_lo = epp_addr;
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board->base_hi = epp_hi_addr;
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// set up the parport for EPP
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if(board->base_hi) {
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outb(0x94, board->base_hi + ECP_CONTROL_HIGH_OFFSET); // select EPP mode in ECR
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}
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// select the device and tell it to make itself ready for io
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epp_write_control(board, 0x04); // set control lines and input mode
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epp_clear_timeout(board);
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board->epp_wide = 1;
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epp_read(&(board->llio), 0, &eppio_cookie, 4);
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epp_read(&(board->llio), HM2_COOKIE_REG, &hm2_cookie, 4);
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// Check for a wide mode failure and re-read
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if ((hm2_cookie & 0x000000FF) == (HM2_COOKIE & 0x000000FF)) {
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board->epp_wide = 0;
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epp_read(&(board->llio), 0, &eppio_cookie, 4);
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epp_read(&(board->llio), HM2_COOKIE_REG, &hm2_cookie, 4);
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// printf("epp wide is broken!\n");
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}
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if (hm2_cookie == HM2_COOKIE) {
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u32 idrom_addr;
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char board_name[8];
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u32 *ptr = (u32 *) &board_name;
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epp_addr16(board, HM2_IDROM_ADDR | EPP_ADDR_AUTOINCREMENT);
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idrom_addr = epp_read32(board);
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epp_addr16(board, (idrom_addr + offsetof(hm2_idrom_desc_t, board_name)) | EPP_ADDR_AUTOINCREMENT);
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*ptr++ = epp_read32(board);
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*ptr = epp_read32(board);
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if (strncmp(board_name, "MESA7I90", 8) == 0) {
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board->type = BOARD_EPP;
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board->mode = BOARD_MODE_FPGA;
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strncpy(board->dev_addr, access->dev_addr, 16);
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strncpy(board->llio.board_name, "7I90HD", 16);
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board->llio.num_ioport_connectors = 3;
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board->llio.pins_per_connector = 24;
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board->llio.ioport_connector_name[0] = "P1";
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board->llio.ioport_connector_name[1] = "P2";
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board->llio.ioport_connector_name[2] = "P3";
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board->llio.fpga_part_number = "6slx9tqg144";
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board->llio.num_leds = 2;
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board->llio.read = &epp_read;
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board->llio.write = &epp_write;
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board->llio.write_flash = &local_write_flash;
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board->llio.verify_flash = &local_verify_flash;
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board->open = &epp_board_open;
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board->close = &epp_board_close;
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board->print_info = &epp_print_info;
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board->flash = BOARD_FLASH_HM2;
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board->fallback_support = 1;
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board->llio.verbose = access->verbose;
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boards_count++;
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} else if (strncmp(board_name, "MESA7I43", 8) == 0) {
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board->type = BOARD_EPP;
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board->mode = BOARD_MODE_FPGA;
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strncpy(board->dev_addr, access->dev_addr, 16);
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strncpy(board->llio.board_name, "7I43", 16);
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board->llio.num_ioport_connectors = 2;
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board->llio.pins_per_connector = 24;
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board->llio.ioport_connector_name[0] = "P4";
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board->llio.ioport_connector_name[1] = "P3";
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board->llio.num_leds = 2;
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board->llio.read = &epp_read;
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board->llio.write = &epp_write;
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board->llio.program_fpga = &epp_program_fpga;
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board->llio.reset = &epp_reset;
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board->open = &epp_board_open;
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board->close = &epp_board_close;
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board->print_info = &epp_print_info;
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board->flash = BOARD_FLASH_HM2;
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board->llio.verbose = access->verbose;
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boards_count++;
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}
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} else if (eppio_cookie == HM2_COOKIE) {
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board->type = BOARD_EPP;
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board->mode = BOARD_MODE_FPGA;
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strncpy(board->dev_addr, access->dev_addr, 16);
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strncpy(board->llio.board_name, "7I43", 16);
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board->llio.num_ioport_connectors = 2;
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board->llio.pins_per_connector = 24;
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board->llio.ioport_connector_name[0] = "P4";
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board->llio.ioport_connector_name[1] = "P3";
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board->llio.num_leds = 2;
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board->llio.read = &epp_read;
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board->llio.write = &epp_write;
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board->llio.program_fpga = &epp_program_fpga;
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board->llio.write_flash = &local_write_flash;
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board->llio.verify_flash = &local_verify_flash;
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board->open = &epp_board_open;
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|
board->close = &epp_board_close;
|
|
board->print_info = &epp_print_info;
|
|
board->flash = BOARD_FLASH_EPP;
|
|
board->llio.verbose = access->verbose;
|
|
|
|
boards_count++;
|
|
} else {
|
|
board->type = BOARD_EPP;
|
|
board->mode = BOARD_MODE_CPLD;
|
|
strncpy(board->dev_addr, access->dev_addr, 16);
|
|
strncpy(board->llio.board_name, "7I43", 16);
|
|
board->llio.num_ioport_connectors = 2;
|
|
board->llio.pins_per_connector = 24;
|
|
board->llio.ioport_connector_name[0] = "P4";
|
|
board->llio.ioport_connector_name[1] = "P3";
|
|
board->llio.num_leds = 2;
|
|
board->llio.program_fpga = &epp_program_fpga;
|
|
board->llio.reset = &epp_reset;
|
|
|
|
board->open = &epp_board_open;
|
|
board->close = &epp_board_close;
|
|
board->print_info = &epp_print_info;
|
|
board->llio.verbose = access->verbose;
|
|
|
|
boards_count++;
|
|
}
|
|
#endif
|
|
}
|
|
|
|
void epp_print_info(board_t *board) {
|
|
printf("\nEPP device %s at 0x%04X:0x%04X\n", board->llio.board_name, board->base_lo, board->base_hi);
|
|
if (board->llio.verbose == 0) {
|
|
return;
|
|
}
|
|
printf("Communication:\n");
|
|
if (board->mode == BOARD_MODE_CPLD) {
|
|
printf(" controlled by CPLD\n");
|
|
} else if (board->mode == BOARD_MODE_FPGA) {
|
|
printf(" controlled by FPGA\n");
|
|
}
|
|
|
|
show_board_info(board);
|
|
}
|