From cd730374ebfe694d6e566c8c04ba5662fcadba79 Mon Sep 17 00:00:00 2001
From: Jeff Epler <jepler@gmail.com>
Date: Fri, 14 Mar 2025 11:22:39 -0500
Subject: [PATCH] bits are emerging in the right order

---
 src/video_hstx.c | 70 +++++++++++++++++++++++++++++-------------------
 1 file changed, 42 insertions(+), 28 deletions(-)

diff --git a/src/video_hstx.c b/src/video_hstx.c
index 76ab416..0b96fdd 100644
--- a/src/video_hstx.c
+++ b/src/video_hstx.c
@@ -72,37 +72,49 @@
 #define HSTX_CMD_TMDS_REPEAT (0x3u << 12)
 #define HSTX_CMD_NOP         (0xfu << 12)
 
+#define DO_BSWAP (1)
+#if DO_BSWAP
+#define BSWAP_MAYBE(x) (\
+    ((x) & 0xff) << 24  \
+|   (((x) >> 8) & 0xff) << 16  \
+|   (((x) >> 16) & 0xff) << 8  \
+|   (((x) >> 24) & 0xff) \
+)
+#else
+#define BSWAP_MAYBE(x) (x)
+#endif
+
 // ----------------------------------------------------------------------------
 // HSTX command lists
 
 static uint32_t vblank_line_vsync_off[] = {
-    HSTX_CMD_RAW_REPEAT | MODE_H_FRONT_PORCH,
-    SYNC_V1_H1,
-    HSTX_CMD_RAW_REPEAT | MODE_H_SYNC_WIDTH,
-    SYNC_V1_H0,
-    HSTX_CMD_RAW_REPEAT | (MODE_H_BACK_PORCH + MODE_H_ACTIVE_PIXELS),
-    SYNC_V1_H1
+    BSWAP_MAYBE(HSTX_CMD_RAW_REPEAT | MODE_H_FRONT_PORCH),
+    BSWAP_MAYBE(SYNC_V1_H1),
+    BSWAP_MAYBE(HSTX_CMD_RAW_REPEAT | MODE_H_SYNC_WIDTH),
+    BSWAP_MAYBE(SYNC_V1_H0),
+    BSWAP_MAYBE(HSTX_CMD_RAW_REPEAT | (MODE_H_BACK_PORCH + MODE_H_ACTIVE_PIXELS)),
+    BSWAP_MAYBE(SYNC_V1_H1),
 };
 
 static uint32_t vblank_line_vsync_on[] = {
-    HSTX_CMD_RAW_REPEAT | MODE_H_FRONT_PORCH,
-    SYNC_V0_H1,
-    HSTX_CMD_RAW_REPEAT | MODE_H_SYNC_WIDTH,
-    SYNC_V0_H0,
-    HSTX_CMD_RAW_REPEAT | (MODE_H_BACK_PORCH + MODE_H_ACTIVE_PIXELS),
-    SYNC_V0_H1
+    BSWAP_MAYBE(HSTX_CMD_RAW_REPEAT | MODE_H_FRONT_PORCH),
+    BSWAP_MAYBE(SYNC_V0_H1),
+    BSWAP_MAYBE(HSTX_CMD_RAW_REPEAT | MODE_H_SYNC_WIDTH),
+    BSWAP_MAYBE(SYNC_V0_H0),
+    BSWAP_MAYBE(HSTX_CMD_RAW_REPEAT | (MODE_H_BACK_PORCH + MODE_H_ACTIVE_PIXELS)),
+    BSWAP_MAYBE(SYNC_V0_H1),
 };
 
 static uint32_t vactive_line[] = {
-    HSTX_CMD_RAW_REPEAT | MODE_H_FRONT_PORCH,
-    SYNC_V1_H1,
-    HSTX_CMD_NOP,
-    HSTX_CMD_RAW_REPEAT | MODE_H_SYNC_WIDTH,
-    SYNC_V1_H0,
-    HSTX_CMD_NOP,
-    HSTX_CMD_RAW_REPEAT | MODE_H_BACK_PORCH,
-    SYNC_V1_H1,
-    HSTX_CMD_TMDS | MODE_H_ACTIVE_PIXELS
+    BSWAP_MAYBE(HSTX_CMD_RAW_REPEAT | MODE_H_FRONT_PORCH),
+    BSWAP_MAYBE(SYNC_V1_H1),
+    BSWAP_MAYBE(HSTX_CMD_NOP),
+    BSWAP_MAYBE(HSTX_CMD_RAW_REPEAT | MODE_H_SYNC_WIDTH),
+    BSWAP_MAYBE(SYNC_V1_H0),
+    BSWAP_MAYBE(HSTX_CMD_NOP),
+    BSWAP_MAYBE(HSTX_CMD_RAW_REPEAT | MODE_H_BACK_PORCH),
+    BSWAP_MAYBE(SYNC_V1_H1),
+    BSWAP_MAYBE(HSTX_CMD_TMDS | MODE_H_ACTIVE_PIXELS),
 };
 
 typedef struct {
@@ -133,7 +145,7 @@ static void __not_in_flash_func(dma_irq_handler)(void) {
 #error Only VGA resolution is supported
 #endif
 
-__attribute__((optimize("-O0")))
+
 void    video_init(uint32_t *framebuffer) {
     picodvi_framebuffer_obj_t *self = &picodvi;
 
@@ -151,7 +163,10 @@ void    video_init(uint32_t *framebuffer) {
     self->dma_pixel_channel = dma_claim_unused_channel(true);
     self->dma_command_channel = dma_claim_unused_channel(true);
 
-    size_t words_per_line = DISP_WIDTH / (8 * sizeof(uint32_t));
+    size_t pixels_per_word = 32;
+    size_t words_per_line = DISP_WIDTH / pixels_per_word;
+    uint8_t rot = 25; // 24 + color_depth;
+    size_t shift_amount = 31; // color_depth % 32;
 
     size_t command_word = 0;
     size_t frontporch_start = MODE_V_TOTAL_LINES - MODE_V_FRONT_PORCH;
@@ -167,8 +182,10 @@ void    video_init(uint32_t *framebuffer) {
         DMA_CH0_CTRL_TRIG_IRQ_QUIET_BITS |
         DMA_CH0_CTRL_TRIG_INCR_READ_BITS |
         DMA_CH0_CTRL_TRIG_EN_BITS;
-    uint32_t dma_pixel_ctrl = dma_ctrl | (DMA_SIZE_32 << DMA_CH0_CTRL_TRIG_DATA_SIZE_LSB);
-    // dma_pixel_ctrl |= DMA_CH0_CTRL_TRIG_BSWAP_BITS;
+    uint32_t dma_pixel_ctrl = dma_ctrl | ((pixels_per_word == 32 ? DMA_SIZE_32 : DMA_SIZE_16) << DMA_CH0_CTRL_TRIG_DATA_SIZE_LSB);
+#if DO_BSWAP
+    dma_pixel_ctrl |= DMA_CH0_CTRL_TRIG_BSWAP_BITS;
+#endif
     dma_ctrl |= (DMA_SIZE_32 << DMA_CH0_CTRL_TRIG_DATA_SIZE_LSB);
 
     uint32_t dma_write_addr = (uint32_t)&hstx_fifo_hw->fifo;
@@ -204,7 +221,6 @@ void    video_init(uint32_t *framebuffer) {
 
     // B&W
     size_t color_depth = 1;
-    uint8_t rot = 1; // 24 + color_depth;
     hstx_ctrl_hw->expand_tmds =
         (color_depth - 1) << HSTX_CTRL_EXPAND_TMDS_L2_NBITS_LSB |
             rot << HSTX_CTRL_EXPAND_TMDS_L2_ROT_LSB |
@@ -212,9 +228,7 @@ void    video_init(uint32_t *framebuffer) {
             rot << HSTX_CTRL_EXPAND_TMDS_L1_ROT_LSB |
                 (color_depth - 1) << HSTX_CTRL_EXPAND_TMDS_L0_NBITS_LSB |
             rot << HSTX_CTRL_EXPAND_TMDS_L0_ROT_LSB;
-    size_t pixels_per_word = 32;
     size_t shifts_before_empty = (pixels_per_word % 32);
-    size_t shift_amount = color_depth % 32;
 
     // Pixels come in 32 bits at a time. color_depth dictates the number
     // of pixels per word. Control symbols (RAW) are an entire 32-bit word.