README.md: small grammatical fix
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@ -6,7 +6,7 @@ the purpose of playing with/testing particular areas of functionality (mostly au
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Finally, you may wonder why many of these demos set the system clock to 48Mhz. The reason is that until we had physical
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chips, we were running at a fixed 48Mhz system clock using an FPGA. Most of these examples were written before the
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RP2040 design was final, so were all developed with that fixed 48MHz system clock. As a result some of the examples do things in a way
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RP2040 design was final, so they were all developed with that fixed 48MHz system clock. As a result some of the examples do things in a way
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that you wouldn't necessarily need to if you had more clock speed available (which you do), but on the plus side,
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you have that much more time to do even more things!
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